© Semiconductor Components Industries, LLC, 2011
October, 2011 − Rev. 7
1Publication Order Number:
NTR4101P/D
NTR4101P, NTRV4101P
Trench Power MOSFET
−20 V, Single P−Channel, SOT−23
Features
•Leading −20 V Trench for Low RDS(on)
•−1.8 V Rated for Low Voltage Gate Drive
•SOT−23 Surface Mount for Small Footprint
•AEC Q101 Qualified − NTRV4101P
•These Devices are Pb−Free and are RoHS Compliant
Applications
•Load/Power Management for Portables
•Load/Power Management for Computing
•Charging Circuits and Battery Protection
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS −20 V
Gate−to−Source Voltage VGS ±8.0 V
Continuous Drain
Current (Note 1)
Steady
State
TA = 25°CID−2.4 A
TA = 85°C−1.7
t ≤10 s TA = 25°C−3.2
Power Dissipation
(Note 1)
Steady
State
TA = 25°C PD0.73 W
t ≤10 s 1.25
Continuous Drain
Current (Note 2)
Steady
State
TA = 25°CID−1.8 A
TA = 85°C−1.3
Power Dissipation
(Note 2)
TA = 25°C PD0.42 W
Pulsed Drain Current tp = 10 msIDM −18 A
ESD Capability (Note 3) C = 100 pF,
RS = 1500 W
ESD 225 V
Operating Junction and Storage Temperature TJ,
TSTG
−55 to
150
°C
Source Current (Body Diode) IS−2.4 A
Lead Temperature for Soldering
Purposes (1/8” from case for 10 s)
TL260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE RATINGS
Parameter Symbol Max Unit
Junction−to−Ambient − Steady State (Note 1) RqJA 170 °C/W
Junction−to−Ambient − t < 10 s (Note 1) RqJA 100
Junction−to−Ambient − Steady State (Note 2) RqJA 300
1. Surface−mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [1 oz] including traces)
2. Surface−mounted on FR4 board using the minimum recommended pad size.
3. ESD Rating Information: HBM Class 0
S
G
D
Device Package Shipping†
ORDERING INFORMATION
P−Channel MOSFET
SOT−23
CASE 318
STYLE 21
TR4 MG
G
TR4 = Device Code
M = Date Code
G= Pb−Free Package
MARKING DIAGRAM &
PIN ASSIGNMENT
3
Drain
1
Gate
2
1
3
2
Source
NTR4101PT1G
http://onsemi.com
SOT−23
Pb−Free
3000 / Tape &
Reel
V(BR)DSS RDS(ON) TYP ID MAX
−20 V
70 mW @ −4.5 V
90 mW @ −2.5 V
112 mW @ −1.8 V
−3.2 A
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
http://onsemi.com
(*Note: Microdot may be in either location)
NTRV4101PT1G SOT−23
Pb−Free
3000 / Tape &
Reel
NTR4101P, NTRV4101P
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2
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 4)
(VGS = 0 V, ID = −250 mA)
V(BR)DSS −20 V
Zero Gate Voltage Drain Current (Note 4)
(VGS = 0 V, VDS = −16 V)
IDSS −1.0 mA
Gate−to−Source Leakage Current
(VGS = ±8.0 V, VDS = 0 V)
IGSS ±100 nA
ON CHARACTERISTICS
Gate Threshold Voltage (Note 4)
(VGS = VDS, ID = −250 mA)
VGS(th) −0.4 −0.72 −1.2 V
Drain−to−Source On−Resistance
(VGS = −4.5 V, ID = −1.6 A)
(VGS = −2.5 V, ID = −1.3 A)
(VGS = −1.8 V, ID = −0.9 A)
RDS(on)
70
90
112
85
120
210
mW
Forward Transconductance (VDS = −5.0 V, ID = −2.3 A) gFS 7.5 S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
(VGS = 0 V, f = 1 MHz, VDS = −10 V)
Ciss 675 pF
Output Capacitance Coss 100
Reverse Transfer Capacitance Crss 75
Total Gate Charge (VGS = −4.5 V, VDS = −10 V, ID = −1.6 A) QG(tot) 7.5 8.5 nC
Gate−to−Source Gate Charge (VDS = −10 V, ID = −1.6 A) QGS 1.2 nC
Gate−to−Drain “Miller” Charge (VDS = −10 V, ID = −1.6 A) QGD 2.2 nC
Gate Resistance RG6.5 W
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
(VGS = −4.5 V, VDS = −10 V,
ID = −1.6 A, RG = 6.0 W)
td(on) 7.5 ns
Rise Time tr12.6
Turn−Off Delay Time td(off) 30.2
Fall Time tf21.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage (VGS = 0 V, IS = −2.4 A) VSD −0.82 −1.2 V
Reverse Recovery Time
(VGS = 0 V,
dISD/dt = 100 A/ms, IS = −1.6 A)
trr 12.8 15 ns
Charge Time ta9.9 ns
Discharge Time tb3.0 ns
Reverse Recovery Charge Qrr 1008 nC
4. Pulse Test: Pulse Width ≤300 ms, Duty Cycle ≤ 2%.
5. Switching characteristics are independent of operating junction temperature.
NTR4101P, NTRV4101P
http://onsemi.com
3
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
08
100
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
100000
1.0
−IDSS, LEAKAGE (nA)
10000
10
1000
46
TJ = 125°C
2
VGS = 0 V
10 12 14 16
.
125°C
0
10
5
8
632
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
−ID, DRAIN CURRENT (AMPS)
6
2
0
1
Figure 1. On−Region Characteristics
0
6
24
10
1
0
6
Figure 2. Transfer Characteristics
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.02
79
0.04
0
Figure 3. On−Resistance vs. Drain Current and
Temperature
−ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
TJ = 25°C
0.1
13
TJ = −55°C
4
25°C
−1.6 V
−1.8 V
−2.0 V
−2.2 V
78
0.06
VGS = −10 V − −2.4 V
T = 125°C
4
0.08
5
3
4
8
0.01
0.03
0.05
0.07
0.09
T = 25°C
T = −55°C
VGS = −5.0 V
0.02
79
0.04
0
−ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0.15
13
0.06
0.08
5
0.01
0.03
0.05
0.07
0.14 TJ = 25°C
VGS = −2.5 V
Figure 4. On−Resistance vs. Drain Current an
d
Temperature
Figure 5. On−Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
ID = −1.6 A
−50 0−25 25
1.2
1.0
0.8
0.6
0.4
50 12510075 150
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
1.4
810246
VGS = −4.5 V
0.10
0.12
0.09
0.11
0.13
TJ = 150°C
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
2
VDS ≥ 20 V
5
9
3
7
1
5
NTR4101P, NTRV4101P
http://onsemi.com
4
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
VGS = 0 V
010
4
800
400
08
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
064
4.0
1.0
0
Qg, TOTAL GATE CHARGE (nC)
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TJ = 25°C
Coss
Ciss
Crss
ID = −1.6 A
TJ = 25°C
2.0
3.0
Qgd
Qgs
101
10
1
100
RG, GATE RESISTANCE (OHMS)
t, TIME (ns)
VDD = −10 V
ID = −1.6 A
VGS = −4.5 V
1000
3.5
td(off)
td(on)
tf
tr
682
0
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
−IS, SOURCE CURRENT (AMPS)
VGS = 0 V
TJ = 25°C
1.00.2 0.4
0.5
4.5
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source
Voltage vs. Total Gate Charge
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
2
1000
600
200
QT
100
0.6 0.8
12 14 16 18 20
1.5
2.5
3.5
0.5
1.5
2.5 VGS
VDS
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0
1
2
3
4
5
NTR4101P, NTRV4101P
http://onsemi.com
5
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
D
A1
3
12
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M,
1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
ǒmm
inchesǓ
SCALE 10:1
0.8
0.031
0.9
0.035
0.95
0.037
0.95
0.037
2.0
0.079
SOLDERING FOOTPRINT*
VIEW C
L
0.25
L1
q
e
EE
b
A
SEE VIEW C
DIM
A
MIN NOM MAX MIN
MILLIMETERS
0.89 1.00 1.11 0.035
INCHES
A1 0.01 0.06 0.10 0.001
b0.37 0.44 0.50 0.015
c0.09 0.13 0.18 0.003
D2.80 2.90 3.04 0.110
E1.20 1.30 1.40 0.047
e1.78 1.90 2.04 0.070
L0.10 0.20 0.30 0.004
0.040 0.044
0.002 0.004
0.018 0.020
0.005 0.007
0.114 0.120
0.051 0.055
0.075 0.081
0.008 0.012
NOM MAX
L1
H
2.10 2.40 2.64 0.083 0.094 0.104
HE
0.35 0.54 0.69 0.014 0.021 0.029
c
0−−− 10 0 −−− 10
q°°°°
STYLE 12:
PIN 1. CATHODE
2. CATHODE
3. ANODE
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NTR4101P/D
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