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Multipoint Switching and Conferencing Unit - Attenuation
MUSAC-A
PEB/F 2445 Version 1.2
Addendum 03.99 to Data Sheet 02.96
1 Wrong Pin Definition
Description
Please refer to the pin description of "ALE", chapter 1.3 Pin Definitions and Functions
(page 15) of Data Sheet 02.96.
There is written "... µP-interface mode this line is hardwired to VSS, in the demultiplexed
Motorola type µP-interface mode it should be connected to VDD."
This is not correct. The MUSAC-A does not support the Motorola type interface.
Please change the description in the Data Sheet 02.96 as follows:
Explanation
A low signal at the RD and simultaneously at the WR pin resets the device.
Workaround
An external interface logic for MUSAC-A connection to Motorola type of processors
(demultiplexed interface mode) is in evaluation.
2ALE I Address Latch Enable:
In the Intel type multiplexed µP-interface mode a
logical high on this line indicates an address of a
MUSAC-A internal register on the external
address/data bus.
In the Intel type demultiplexed µP-interface mode
this line is hardwired to VSS.
If ALE is not connected it will be set to ground inter-
nally.
