Ultra
e.MMC 4.41 I/F
Released Data Sheet
80-36-03666
V1.2
May 2012
SanDisk Corporation
Corporate Headquarters • 601 McCarthy Boulevard • Milpitas, CA 95035
Phone (408) 801-1000 • Fax (408) 801-8657
www.sandisk.com
80-36-03666
SanDisk iNAND e.MMC 4.41 I/F - Data Sheet
© 2012 SanDisk Corporation - 2 - 80-36-03666
REVISION HISTORY
Doc. No
Revision
Date
Description
Reference
80-36-03666
0.1
22-Jan-12
Preliminary
80-36-03666
0.2
20-Feb-12
Update Exported Capacity
80-36-03666
1.0
29-May-12
- Update Boot and RPMB default size
- Added Power Off Notification feature
80-36-03666
1.1
30-May-12
- Fix Typos on EXT_CSD Register:
PWR_CL_DDR_52_360
PWR_CL_26_360
PWR_CL_52_360
MAX_ENH_SIZE_MULT
INI_TIMEOUT_AP
POWER_CLASS
WR_REL_SET
80-36-03666
1.2
30-May-12
- Update SanDisk Japan office contact
info
SanDisk® Corporation general policy does not recommend the use of its products in life support applications where in a failure
or malfunction of the product may directly threaten life or injury. Per SanDisk Terms and Conditions of Sale, the user of SanDisk
products in life support applications assumes all risk of such use and indemnifies SanDisk against all damages. See “Disclaimer
of Liability.”
This document is for information use only and is subject to change without prior notice. SanDisk Corporation assumes no
responsibility for any errors that may appear in this document, nor for incidental or consequential damages resulting from the
furnishing, performance or use of this material. No part of this document may be reproduced, transmitted, transcribed, stored in
a retrievable manner or translated into any language or computer language, in any form or by any means, electronic,
mechanical, magnetic, optical, chemical, manual or otherwise, without the prior written consent of an officer of SanDisk
Corporation.
All parts of the SanDisk documentation are protected by copyright law and all rights are reserved.
SanDisk and the SanDisk logo are registered trademarks of SanDisk Corporation. Product names mentioned herein are for
identification purposes only and may be trademarks and/or registered trademarks of their respective companies.
© 2012 SanDisk Corporation. All rights reserved.
80-36-03666. May 2012 Printed in U.S.A
80-36-03666
© 2012 SanDisk Corporation 80-36-03666
3
TABLE OF CONTENTS
1. Introduction .................................................................................................................... 5
1.1. General Description ................................................................................................. 5
1.2. Plug-and-Play Integration ......................................................................................... 5
1.3. Feature Overview ..................................................................................................... 6
1.4. Functional Description .............................................................................................. 7
1.5. Technology Independence ....................................................................................... 7
1.6. Defect and Error Management .................................................................................. 7
1.7. MMC bus and Power Lines ....................................................................................... 8
1.7.1. Bus operating conditions ............................................................................................. 8
2. e.MMC4.41 Features Overview ..................................................................................... 10
2.1. Configurable Boot partitions Size ............................................................................ 10
2.2. Automatic Sleep Mode ........................................................................................... 10
2.3. Sleep (CMD5) ........................................................................................................ 10
2.4. Enhanced Reliable Write ........................................................................................ 10
2.5. Secure Erase ......................................................................................................... 10
2.6. Secure Trim ........................................................................................................... 11
2.7. Trim ....................................................................................................................... 11
2.8. Partition management ............................................................................................ 11
2.9. Enhanced Write Protection ..................................................................................... 12
2.10. High Priority Interrupt (HPI)..................................................................................... 12
2.11. Power Off Notification ............................................................................................. 12
2.12. H/W Reset ............................................................................................................. 12
2.13. DDR I/F ................................................................................................................. 12
3. Product Specifications ................................................................................................. 13
3.1. Typical Power Requirements .................................................................................. 13
3.2. Operating Conditions.............................................................................................. 13
3.2.1. Operating and Storage Temperature Specifications ................................................... 13
3.2.2. Moisture Sensitivity.................................................................................................... 13
3.3. System Performance .............................................................................................. 13
3.4. Physical Specifications ........................................................................................... 15
4. Interface Description .................................................................................................... 17
4.1. MMC I/F Ball Array ................................................................................................. 17
4.2. Pins and Signal Description .................................................................................... 18
80-36-03666
© 2012 SanDisk Corporation 80-36-03666
4
4.2.1. Table 7 contains the SanDisk iNAND, with MMC interface (153 balls), functional pin
assignment. ........................................................................................................................... 18
4.3. iNAND Registers .................................................................................................... 19
4.3.1. OCR Register ............................................................................................................ 19
4.3.2. CID Register.............................................................................................................. 19
4.3.3. DSR Register ............................................................................................................ 19
4.3.4. CSD Register ............................................................................................................ 20
4.3.5. EXT_CSD Register.................................................................................................... 21
5. Power Delivery and Capacitor Specifications .............................................................. 24
5.1. SanDisk iNAND Power Domains............................................................................. 24
5.2. Capacitor Connection Guidelines ............................................................................ 24
5.2.1. VDDi Connections ..................................................................................................... 24
5.2.2. VCC and VCCQ Connections .................................................................................... 24
6. Marking ......................................................................................................................... 26
7. Ordering Information .................................................................................................... 27
How to Contact Us ............................................................................................................. 28
80-36-03666
Introduction
SanDisk iNAND e.MMC 4.41 I/F - data Sheet
© 2012 SanDisk Corporation - 5 - 80-36-03666
1. INTRODUCTION
1.1. General Description
iNAND is an Embedded Flash Drive (EFD) designed for mobile handsets and consumer electronic
devices. iNAND is a hybrid device combining an embedded thin flash controller and standard MLC
NAND flash memory, with an industry standard e.MMC 4.411 interface.
Empowered with a new e.MMC4.41 feature set such as Boot and RPMB partitions, HPI
(implemented on MLC products only), and HW Reset the iNAND e.MMC is the optimal device for
reliable code and data storage.
Designed specifically for mobile multimedia applications, iNAND is the most mature on board
SD/MMC device since 2005, providing mass storage of up to 64GB in JEDEC compatible form
factors, with low power consumption and high performance - an ideal solution for multimedia
handsets of 2.5G, 3G, 3.5G and 4G.
In addition to the high reliability and high system performance offered by the current iNAND
family of products, iNAND offers plug-and-play integration and support for multiple NAND
technology transitions, as well as features such as advanced power management scheme.
iNAND uses advanced Multi-Level Cell (MLC) NAND flash technology, enhanced by SanDisk‟s
embedded flash management software running as firmware on the flash controller.
iNAND architecture and embedded firmware fully emulates a hard disk to the host processor,
enabling read/write operations that are identical to a standard, sector-based hard drive. In addition,
SanDisk firmware employs patented methods, such as virtual mapping, dynamic and static wear-
leveling, and automatic block management to ensure high data reliability and maximize flash life
expectancy.
SanDisk iNAND provides up to 64GB of memory for use in mass storage applications. In addition
to the mass-storage-specific flash memory chip, iNAND includes an intelligent controller, which
manages interface protocols, data storage and retrieval, error correction code (ECC) algorithms,
defect handling and diagnostics, power management and clock control.
iNAND enables multimedia driven applications such as music, photo, video, TV, GPS, games,
email, office and other applications.
The breakthrough in performance and design makes iNAND the ideal solution for mobile handset
vendors, portable navigation and Automotive Infotainment vendors who require easy integration,
fast time to market and high-capacity.
1.2. Plug-and-Play Integration
iNAND optimized architecture eliminates the need for complicated software integration and testing
processes and enables a practically plug-and-play integration in the system. The replacement of one
iNAND device with another of a newer generation requires virtually no changes to the host. This
makes iNAND the perfect solution for platforms and reference designs, as it allows for the
1 Compatible to JESD84-A441
80-36-03666
Introduction
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
6
utilization of more advanced NAND Flash technology with minimal integration or qualification
efforts.
SanDisk iNAND is well-suited to meet the needs of small, low power, electronic devices. With
JEDEC form factors measuring 12mm x 16mm (169 balls), and 11.5x13mm (153 balls) compatible
with 0.5mm ball pitch, iNAND is fit for a wide variety of portable devices such as multi-media
mobile handsets, personal media players, GPS devices and Automotive infotainment (car
multimedia and car navigation).
To support this wide range of applications, iNAND is offered with an MMC/SD Interface.
The MMC interface allows for easy integration into any design, regardless of the host (chipset) type
used. All device and interface configuration data (such as maximum frequency and device
identification) are stored on the device.
Figure 1 shows a block diagram of the SanDisk iNAND with MMC Interface.
Figure 1 - SanDisk iNAND with MMC I/F Block Diagram
1.3. Feature Overview
SanDisk iNAND, with MMC interface, features include the following:
Memory controller and NAND flash
Complies with e.MMC Specification Ver. 4.412
Mechanical design complies with JEDED MO-276C Specification
Offered in three TFBGA packages of e.MMC 4.413
o 11.5mm x 13mm x 1.0mm (8GB,16GB)
o 11.5mm x 13mm x 1.2mm (32GB)
o 11.5mm x 13mm x 1.4mm (64B)
Operating temperature range: –25C° to +85C°
Dual power system
2 Refer to JEDEC Standards No. JESD84-A441
3 Refer to JEDEC Standards No. JESD84-C441
Data In/Out
MMC Bus
Interface
Single Chip
controller
Control
Flash
Memory
SanDisk iNAND
80-36-03666
Introduction
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
7
Core voltage (VCC) 2.7-3.6v
I/O (VCCQ) voltage, either: 1.7-1.95v or 2.7-3.6v
Up to 64GB of data storage.
Supports three data bus widths: 1bit (default), 4bit, 8bit.
Variable clock frequencies of 0-20 MHz, 0-26 MHz (default), 0-52 MHz (high-speed)
Up to 104 MB/sec bus transfer rate, using 8 parallel data lines at 52 MHz, DDR Mode
Correction of memory field errors
Designed for portable and stationary applications that require high performance and reliable
data storage
1.4. Functional Description
SanDisk iNAND contains a high-level, intelligent subsystem as shown in Figure 1. This intelligent
(microprocessor) subsystem provides many capabilities not found in other types of storage devices.
These capabilities include:
Host independence from details of erasing and programming flash memory
Sophisticated system for managing defects
Sophisticated system for error recovery including a powerful ECC
Power management for low power operation
1.5. Technology Independence
SanDisk iNAND uses 512 bytes as sector size. To write or read a sector (or multiple sectors), the
host software simply issues a read or write command to the device. The command contains the
address and number of sectors to write or read. The host software then waits for the command to
complete.
There is no host software involvement in the details of flash operations such as erase, program or
read. This is extremely important since flash devices are becoming increasingly complex with
current advanced NAND MLC processes. Because iNAND uses an intelligent on-board controller,
host system software will not need to be updated as new flash memory evolves. In other words,
systems that support iNAND technology today will be able to access future SanDisk devices built
with new flash technology without having to update or change the host software.
1.6. Defect and Error Management
The SanDisk iNAND contains a sophisticated defect and error management system. If necessary,
iNAND will rewrite data from a defective sector to a good sector. This is completely transparent to
the host and does not consume any user data space. In the extremely rare case that a read error does
occur, iNAND has innovative algorithms to recover the data. These defect and error management
systems, coupled with the solid state construction, give SanDisk iNAND unparalleled reliability.
80-36-03666
Introduction
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
8
1.7. MMC bus and Power Lines
SanDisk iNAND with MMC interface supports the MMC protocol. For more details regarding
these buses refer to JEDEC standards No. JESD84-A441.
The iNAND bus has the following communication and power lines:
CMD: Command is a bidirectional signal. The host and iNAND operate in two modes, open
drain and push-pull.
DAT0-7: Data lines are bidirectional signals. Host and iNAND operate in push-pull mode.
CLK: Clock input.
RST_n: Hardware Reset Input
VCCQ: VCCQ is the power supply line for host interface.
VCC: VCC is the power supply line for internal flash memory.
VDDi: VDDi is iNAND‟s internal power node, not the power supply. Connect 0.1uF capacitor
from VDDi to ground.
VSS, VSSQ: ground lines.
1.7.1. Bus operating conditions
Table 1 - Bus operating conditions
Parameter
Min
Max
Unit
Peak voltage on all lines
-0.5
VCCQ+0.5
V
Input Leakage Current (before
initializing and/or connecting the
internal pull-up resistors)
-100
100
µA
Input Leakage Current (after changing
the bus width and disconnecting the
internal pull-up resistors)
-2
2
µA
Output Leakage Current (before
initializing and/or connecting the
internal pull-up resistors)
-100
100
µA
Output Leakage Current (after
changing the bus width and
disconnecting the internal pull-up
resistors)
-2
2
µA
80-36-03666
Introduction
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
9
Table 2 – Power supply voltage
Parameter
Symbol
Min
Max
Unit
Supply Voltage
VCCQ (Low)
1.65
1.95
V
VCCQ ( High)
2.7
3.6
V
VCC
2.7
3.6
V
VSS-VSSQ
-0.5
0.5
V
80-36-03666
e.MMC4.41 Features Overview
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
10
2. E.MMC4.41 FEATURES OVERVIEW
2.1. Configurable Boot partitions Size
iNAND supports e.MMC 4.41 boot operation modes
Factory configuration supplies two boot partitions, 4MB in size for 16GB-64GB and 2MB
in size for 8GB
The feature will enable the host to resize the boot partitions ONCE during production, max
boot partition size is 32MB
2.2. Automatic Sleep Mode
A unique feature of iNAND is automatic entrance and exit from sleep mode. Upon completion of
an operation, iNAND enters sleep mode to conserve power if no further commands are received.
Typically the entrance to sleep mode occurs after 200ns, max value entering sleep mode is 850ms
due to housekeeping operation. The host does not have to take any action for this to occur,
however, in order to achieve the lowest sleep current, the host needs to shut down its clock to the
memory device. In most systems, embedded devices are in sleep mode except when accessed by
the host, thus conserving power. When the host is ready to access a memory device in sleep mode,
any command issued to it will cause it to exit sleep and respond immediately.
2.3. Sleep (CMD5)
An iNAND device may be switched between a Sleep and a Standby state using the
SLEEP/AWAKE (CMD5). In the Sleep state the power consumption of the memory device is
minimized and the memory device reacts only to the commands RESET (CMD0) and
SLEEP/AWAKE (CMD5). All the other commands are ignored by the memory device.
The Vcc power supply may be switched off in Sleep state is to enable even further system power
consumption saving.
For additional information please refer JESD84-A441 section number 7.6.15
2.4. Enhanced Reliable Write
iNAND supports enhanced reliable write as defined in e.MMC 4.41 spec4.
Enhanced reliable write is a special write mode in which the old data pointed to by a logical address
must remain unchanged until the new data written to same logical address has been successfully
programmed. This is to ensure that the target address updated by the reliable write transaction never
contains undefined data. When writing in reliable write, data will remain valid even if a sudden
power loss occurs during programming.
2.5. Secure Erase
In addition to the standard erase command the iNAND supports the optional Secure Erase
command5.
4 For additional information refer to JEDEC Standards No. JESD84-A441
5 For additional information refer to JEDEC Standards No. JESD84-A441
80-36-03666
e.MMC4.41 Features Overview
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
11
The Secure Erase command differs from the basic Erase command in that it requires the iNAND to
execute the erase operation on the memory array when the command is issued and requires the
iNAND and host to wait until the operation is complete before moving to the next iNAND
operation.
The secure erase command requires the iNAND to perform a secure purge operation on the erase
groups, and copy items identified for erase, in those erase groups .
A purge operation is defined as overwriting addressable locations with a single character and then
performing an erase.
This new command meets high security application requirements (e,g, those used by military and
government customers) that once data has been erased, it can no longer be retrieved from the
device.
2.6. Secure Trim
The Secure Trim6 command is similar to the Secure Erase command but performs a secure purge
operation on write blocks instead of erase groups. The size of a write block in the iNAND device is
512B
2.7. Trim
The Trim function is similar to the Erase command but applies the erase operation to write blocks
instead of erase groups. The size of a write block in the INAND device is 512B
For additional information on the Trim function, refer to JEDEC standards No. JESD84-A441
2.8. Partition management
The iNAND offers the possibility for the host to configure additional split local memory partitions
with independent addressable space starting from logical address 0x00000000 for different usage
models. Therefore memory block area scan be classified as follows7:
Factory configuration supplies two boot partitions (refer to section 2.1) implemented as
enhanced storage media and one RPMB partitioning of 4MB in size for 16GB-64GB and
2MB in size for 8GB
The host is free to configure one segment in the User Data Area to be implemented as
enhanced storage media, and to specify its starting location and size in terms of Write
Protect Groups. The attributes of this Enhanced User Data Area can be programmed only
once during the device life-cycle (one-time programmable).
Up to four General Purpose Area Partitions can be configured to store user data or sensitive
data, or for other host usage models. The size of these partitions is a multiple of the write
protect group. Size and attributes can be programmed once in device life-cycle (one-time
programmable). Each of the General Purpose Area Partitions can be implemented with
enhanced technological features.
6 For additional information refer to JEDEC Standards No. JESD84-A441
7 For additional information refer to JEDEC Standards No. JESD84-A441
80-36-03666
e.MMC4.41 Features Overview
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
12
2.9. Enhanced Write Protection
To allow the host to protect data against erase or write, the iNAND supports two levels of write
protect command8:
The entire iNAND (including the Boot Area Partitions, General Purpose Area Partition, and
User/Enhanced User Data Area Partition) may be write-protected by setting the permanent
or temporary write protect bits in the CSD.
Specific segments of the iNAND may be permanently, power-on or temporarily write
protected. Segment size can be programmed via the EXT_CSD register.
For additional information please refer JESD84-A441 standard.
2.10. High Priority Interrupt (HPI)
Many operating-systems use demand-paging to launch a process requested by the user. If the host
needs to fetch pages while in a middle of a write operation the request will be delayed until the
completion of the write command.
The high priority interrupt (HPI) as defined in JESD84-A441 enables low read latency operation
by suspending a lower priority operation before it is actually completed. This mechanism can
reduce read latency, in typical condition to below 10msec.
For additional information on the HPI function, refer to JESD84-A441 standard section 7.6.20
Note: HPI is implemented on MLC products only
2.11. Power Off Notification
iNAND supports power off notifications as defined in e.MMC4.5 (JESD84-B45). The usage of power
off notifications allows the device to prepare itself to power off, and improve user experience during
power-on. It is highly recommended for use to guarantee optimal user experience during power-on
states.
2.12. H/W Reset
Hardware reset may be used by host to reset the device, moving the device to a Pre-idle state and
disabling the power-on period write protect on blocks that was set as power-on write protect before
the reset was asserted. For more information, refer to JESD84-A441 standard.
2.13. DDR I/F
Support DDR signaling to double bus performance. For additional information please refer to
JESD84-A441 standard.
8 For additional information refer to JEDEC Standards No. JESD84-A441
80-36-03666
Product Specifications
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
13
3. PRODUCT SPECIFICATIONS
3.1. Typical Power Requirements
Table 3 - iNAND Power Requirements (Ta=25°C@3.3V)
Max Value
X2
Measurement
Auto Sleep mode
350
uA
Sleep (CMD5)
200 (Max)
130 (Typical)
uA
Read
RMS
8GB: 100
16GB-64GB: 150
mA
Peak
8GB: 200
16GB-64GB: 250
mA
Write
RMS
8GB: 100
16GB-64GB: 250
mA
Peak
8GB: 200
16GB-64GB: 250
mA
VCC (ripple: max, 100mV peak-to-peak) 2.7 V – 3.6 V
Note 1: Current measurements are average over 100 mSecs.
Note 2: Sleep is measured at room temperature
Note 3: In sleep state, triggered by CMD5, Flash Vcc power supply is switched off
3.2. Operating Conditions
3.2.1. Operating and Storage Temperature Specifications
Table 4 - Operating and Storage Temperatures
Temperature
Operating
-25° C to 85° C
Non-Operating: After soldered onto PC Board
-40° C to 85° C
3.2.2. Moisture Sensitivity
The moisture sensitivity level for iNAND is MSL = 3.
3.3. System Performance
All performance values for iNAND in Table 5 were measured under the following conditions:
Voltage range:
Core voltage (VCC): 2.7-3.6v
Host voltage (VCCQ), either: 1.7-1.95v or 2.7-3.6v
Operating temperature -25° C to 85° C
80-36-03666
Product Specifications
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
14
Table 5a - System Performance
Note 1: Sustained Read & Write performance is measured under DDR Bus width of 8bit at 52Mhz.
Table 5b - System Timing Performance
SKU
Sustained Write
Sustained Read
X2
SDIN7DU2-8G
11MB/s
70MB/s
SDIN7DU2-16G
SDIN7DU2-32G
SDIN7DU2-64G
20MB/s
90MB/s
Timing
Value
Block Read Access Time (MAX)
100 ms
Block Write Access Time (MAX)
250 ms
CMD1 to Ready after Power-up (MAX)
1000 ms
80-36-03666
Product Specifications
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
15
3.4. Physical Specifications
The SanDisk iNAND is a 153-pin, thin fine-pitched ball grid array (BGA). See Figure 2,
Figure 3 and
Table for physical specifications and dimensions.
Figure 2- INAND Specification Top and Side View (Detail A)
Figure 3- Package Outline Drawing – bottom view
Ball
Test Pad (for SanDisk internal use only).
Legend
80-36-03666
Product Specifications
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
16
Table 6 - iNAND Package Specification
Dimension in millimeters
Dimension in inches
Package
Size
Symbol
Minimum
Nominal
Maximum
Minimum
Nominal
Maximum
11.5X13X1.0
A1
---
---
1.00
---
---
0.039
11.5X13X1.2
A2
---
---
1.20
---
---
0.047
11.5X13X1.4
A3
---
---
1.40
---
---
0.055
All
B
0.17
0.22
0.27
0.007
0.009
0.011
11.5X13X1.0
11.5X13X1.2
11.5X13X1.4
D
11.40
11.50
11.60
0.449
0.453
0.457
11.5X13X1.0
11.5X13X1.2
11.5X13X1.4
E
12.90
13.00
13.10
0.508
0.512
0.516
All
D1
---
6.50
---
---
0.256
---
All
E1
---
6.50
---
---
0.256
---
All
e
---
0.50
---
---
0.020
---
All
b
0.25
0.30
0.35
0.010
0.012
0.014
All
aaa
0.10
0.004
All
bbb
0.10
0.004
All
ddd
0.08
0.003
All
MD/ME
14/14
14/14
80-36-03666
Interface Description
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
17
4. INTERFACE DESCRIPTION
4.1. MMC I/F Ball Array
Figure 4 - 153 balls - Ball Array (Top View)
NC DAT3DAT4DAT5DAT6DAT7NC NC NC NC NC NC NC NC
NC Vddi NC VssQ NC VccQ NC NC NC NC NC NC NC
NC NC NC NC NC NC NC
NC NC NC NC VCC VSS NC NC NC NC NC NC
NC NC NC VCC NC NC NC NC
NC NC NC VSS NC NC NC NC
NC NC NC NC VSS NC NC NC
NC NC NC NC VCC NC NC NC
NC NC NC RESET NC NC NC NC
NC NC NC NC NC NC
NC NC NC VccQ CMD CLK NC NC NC NC NC NC NC NC
NC VssQ NC VccQ VssQ NC NC NC NC NC NC NC NC NC
NC NC VccQ VssQ VccQ VssQ NC NC NC NC NC NC NC NC
NC NC DAT0DAT1DAT2NC NC NC NC NC NC NC NC NC
A
B
C
D
E
F
G
H
J
K
L
M
N
P
9101 2 3 4 5 6 7 8 11 12 13 14
NC
NC NC VSS VCC
Index
80-36-03666
Interface Description
SanDisk iNAND e.MMC 4.41 I/F - data Sheet
© 2012 SanDisk Corporation - 18 - 80-36-03666
4.2. Pins and Signal Description
4.2.1. Table 7 contains the SanDisk iNAND, with MMC interface (153 balls),
functional pin assignment.
Table 7 – Functional Pin Assignment, 153 balls
Note: All other pins are not connected [NC] and can be connected to GND or left floating.
Ball No.
Ball Signal
Type
Description
A3
DAT0
I/O
Data I/O: Bidirectional channel used for data transfer
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M5
CMD
I/O
Command: A bidirectional channel used for device initialization and
command transfers.
M6
CLK
Input
Clock: Each cycle directs a 1-bit transfer on the command and DAT
lines
K5
RST_n
Hardware Reset
E6
VCC
Supply
Flash I/O and memory power supply
F5
VCC
J10
VCC
K9
VCC
C6
VCCQ
Supply
Memory controller core and MMC I/F I/O power supply
M4
VCCQ
N4
VCCQ
P3
VCCQ
P5
VCCQ
E7
VSS
Supply
Flash I/O and memory ground connection
G5
VSS
H10
VSS
K8
VSS
C4
VSSQ
Memory controller core and MMC I/F ground connection
N2
VSSQ
N5
VSSQ
P4
VSSQ
P6
VSSQ
C2
VDDi
Internal power node. Connect 0.1uF capacitor from VDDi to ground
80-36-03666
Interface Description
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
19
4.3. iNAND Registers
4.3.1. OCR Register
Value for 4GB-32GB: 0xC0FF8080
Note: Bit 30 is set because the device is High Capacity; bit 31 will be set only when the device is
ready
Parameter
OCR slice
Description
Value
Width
Access Mode
[30:29]
Access mode
>2GB 10b
2
[23:15]
VDD: 2.7 - 3.6 range
111111111b
9
[14:8]
VDD: 2.0 - 2.6 range
0000000b
7
[7]
VDD: 1.7 - 1.95 range
1b
1
4.3.2. CID Register
4.3.3. DSR Register
DSR is not implemented; in case of read, value of 0x0404 will be returned.
Parameter
CID slice
Description
Value
Width
MID
[127:120]
Manufacturer ID
45h
8
CBX
[113:112]
Card BGA
01h
2
OID
[111:104]
OEM/Application ID
0000h
8
PNM
[103:56]
Product name
8GB: 53454d303847h ("SEM08G")
16GB: 53454d313647h ("SEM16G")
32GB: 53454d333247h ("SEM32G")
64GB: 53454D363447h (“SEM64G”)
48
PRV
[55:48]
Product revision
90h
8
PSN
[47:16]
Product serial number
Random by Production
32
MDT
[15:8]
Manufacturing date
month, year
8
CRC
[7:1]
CRC7 checksum
0000000b
7
Parameter
DSR slice
Description
Value
Width
RSRVD
[15:8]
Reserved
04h
8
RSRVD
[7:0]
Reserved
04h
8
80-36-03666
Interface Description
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
20
4.3.4. CSD Register
Parameter
CSD Slice
Description
Value
Width
CSD_STRUCTURE
[127:126]
CSD structure
11b
3
SPEC_VERS
[125:122]
System specification version
0100b
4
TAAC
[119:112]
Data read access-time 1
0Fh
8
NSAC
[111:104]
Data read access-time 2 in CLK
cycles (NSAC*100)
00h
8
TRAN_SPEED
[103:96]
Max. bus clock frequency
32h
8
CCC
[95:84]
Card command classes
0F5h
12
READ_BL_LEN
[83:80]
Max. read data block length
9h
4
READ_BL_PARTIAL
[79:79]
Partial blocks for read allowed
0b
1
WRITE_BLK_MISALIGN
[78:78]
Write block misalignment
0b
1
READ_BLK_MISALIGN
[77:77]
Read block misalignment
0b
1
DSR_IMP
[76:76]
DSR implemented
0b
1
*C_SIZE
[73:62]
Device size
>2GB FFFh
12
VDD_R_CURR_MIN
[61:59]
Max. read current @ VDD min
111b
3
VDD_R_CURR_MAX
[58:56]
Max. read current @ VDD max
111b
3
VDD_W_CURR_MIN
[55:53]
Max. write current @ VDD min
111b
3
VDD_W_CURR_MAX
[52:50]
Max. write current @ VDD max
111b
3
C_SIZE_MULT
[49:47]
Device size multiplier
111b
3
ERASE_GRP_SIZE
[46:42]
Erase group size
11111b
5
ERASE_GRP_MULT
[41:37]
Erase group size multiplier
>=8GB 11111b
5
WP_GRP_SIZE
[36:32]
Write protect group size
11111b
5
WP_GRP_ENABLE
[31:31]
Write protect group enable
1b
1
DEFAULT_ECC
[30:29]
Manufacturer default
00b
2
R2W_FACTOR
[28:26]
Write speed factor
100b
3
WRITE_BL_LEN
[25:22]
Max. write data block length
9h
4
WRITE_BL_PARTIAL
[21:21]
Partial blocks for write allowed
0b
1
CONTENT_PROT_APP
[16:16]
Content protection application
0b
1
FILE_FORMAT_GRP
[15:15]
File format group
0b
1
COPY
[14:14]
Copy flag (OTP)
1b
1
PERM_WRITE_PROTECT
[13:13]
Permanent write protection
0b
1
TMP_WRITE_PROTECT
[12:12]
Temporary write protection
0b
1
FILE_FORMAT
[11:10]
File format
00b
2
ECC
[9:8]
ECC code
00b
2
CRC
[7:1]
Calculated CRC
0000000b
7
80-36-03666
Interface Description
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
21
4.3.5. EXT_CSD Register
Parameter
ECSD slice
[bytes]
Description
Value
S_CMD_SET
[504]
Supported Command Sets
1h
HPI_FEATURES
[503]
HPI Features
1h
BKOPS_SUPPORT
[502]
Background operations support
1h
BKOPS_STATUS
[246]
Background operations status
Default = 0h
Updated in Run time
CORRECTLY_PRG_SECTORS_
NUM
[245:242]
Number of correctly programmed
sectors
Default = 0h
Updated in Run time
INI_TIMEOUT_AP
[241]
1st Initialization time after partitioning
8-64GB: Ah
PWR_CL_DDR_52_360
[239]
Power class for 52MHz, DDR at 3.6V
8GB-64GB = 22h
TRIM _MULT
[232]
TRIM Multiplier
1h
SEC_FEATURE_SUPPORT
[231]
Secure Feature support
15h
SEC_ERASE_MULT
[230]
Secure Erase Multiplier
96h
SEC_TRIM_MULT
[229]
Secure TRIM Multiplier
2h
BOOT_INFO
[228]
Boot Information
7h
BOOT_SIZE_MULTI
[226]
Boot partition size
8GB = 10h
16GB-64GB = 20h
ACCESS_SIZE
[225]
Access size
0h
HC_ERASE_GROUP_SIZE
[224]
High Capacity Erase unit size
Table 7
ERASE_TIMEOUT_MULT
[223]
High capacity erase time out
3h
REL_WR_SEC_C
[222]
Reliable write sector count
1h
HC_WP_GRP_SIZE
[221]
High capacity write protect group size
Table 7
S_C_VCC
[220]
Sleep current [VCC]
8h
S_C_VCCQ
[219]
Sleep current [VCCQ]
7h
S_A_TIMEOUT
[217]
Sleep/Awake time out
11h
SEC_COUNT
[215:212]
Sector count
Table 6
MIN_PERF_W_8_52
[210]
Minimum Write Performance for 8bit
@52MHz
Ah
MIN_PERF_R_8_52
[209]
Minimum Read Performance for 8bit
@52MHz
Ah
MIN_PERF_W_8_26_4_52
[208]
Minimum Write Performance for 4bit
@52MHz or 8bit @26MHz
Ah
MIN_PERF_R_8_26_4_52
[207]
Minimum Read Performance for 4bit
@52MHz or 8bit @26MHz
Ah
MIN_PERF_W_4_26
[206]
Minimum Write Performance for 4bit
@26MHz
Ah
MIN_PERF_R_4_26
[205]
Minimum Read Performance for 4bit
Ah
80-36-03666
Interface Description
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
22
Parameter
ECSD slice
[bytes]
Description
Value
@26MHz
PWR_CL_26_360
[203]
Power Class for 26MHz @ 3.6V
8GB-64GB = 22h
PWR_CL_52_360
[202]
Power Class for 52MHz @ 3.6V
8GB-64GB = 22h
PWR_CL_26_195
[201]
Power Class for 26MHz @ 1.95V
0h
PWR_CL_52_195
[200]
Power Class for 52MHz @ 1.95V
0h
PARTITION_SWITCH_TIME
[199]
Partition switching timing
1h
OUT_OF_INTERRUPT_TIME
[198]
Out-of-interrupt busy timing
2h
CARD_TYPE
[196]
Card Type
7h
CSD_STRUCTURE
[194]
CSD Structure Version
2h
EXT_CSD_REV
[192]
Extended CSD Revision
5h
CMD_SET
[191]
Command Set
0h
CMD_SET_REV
[189]
Command Set Revision
0h
POWER_CLASS
[187]
Power Class
2h
HS_TIMING
[185]
High Speed Interface Timing
0h
BUS_WIDTH
[183]
Bus Width Mode
0h
ERASE_MEM_CONT
[181]
Content of explicit erased memory range
0h
PARTITION_CONFIG
[179]
Partition Configuration
0h
BOOT_CONFIG_PROT
[178]
Boot config protection
0h
BOOT_BUS_WIDTH
[177]
Boot bus width1
0h
ERASE_GROUP_DEF
[175]
High-density erase group definition
0h
BOOT_WP
[173]
Boot area write protect register
0h
USER_WP
[171]
User area write protect register
0h
FW_CONFIG
[169]
FW Configuration
1h
RPMB_SIZE_MULT
[168]
RPMB Size
8GB = 10h
16GB-64GB = 20h
WR_REL_SET
[167]
Write reliability setting register
1Fh
WR_REL_PARAM
[166]
Write reliability parameter register
4h
BKOPS_START
[164]
Manually start background operations
0h
BKOPS_EN
[163]
Enable background operations
handshake
0h
RST_n_FUNCTION
[162]
H/W reset function
0h
HPI_MGMT
[161]
HPI management
0h
PARTITIONING SUPPORT
[160]
Partitioning support
3h
MAX_ENH_SIZE_MULT
[159:157]
Max Enhanced Area Size
80-36-03666
Interface Description
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
23
Parameter
ECSD slice
[bytes]
Description
Value
8GB
E6h
16GB
E8h
32GB
E7h
64GB
E8h
PARTITIONS_ATTRIBUTE
[156]
Partitions Attribute
0h
GP_SIZE_MULT
[154:143]
General Purpose Partition Size
0h
ENH_SIZE_MULT
[142:140]
Enhanced User Data Area Size
0h
ENH_START_ADDR
[139:136]
Enhanced User Data Start Address
0h
SEC_BAD_BLK_MGMNT
[134]
Bad Block Management mode
0h
The following table shows the capacity available for user data for the various device capacities:
Table 6: Capacity* for User Data
*Note: Exported capacity numbers in Table 6 are the Factory Default exported capacity. By
implementing Enhanced User Data Area the exported capacity is reduced.
Table 7: Write protect group size
Capacity
LBA [Hex]
LBA [Dec]
Capacity [Bytes]
SDIN7DU2-8G
0xE90000
15,269,888
7,818,182,656
SDIN7DU2-16G
0x1D5A000
30,777,344
15,758,000,128
SDIN7DU2-32G
0x3A3E000
61,071,360
31,268,536,320
SDIN7DU2-64G
0x747C000
122,142,720
62,537,072,640
SKU
HC_ERASE_GROU
P_SIZE
HC_WP_GRP_SI
ZE
Erase Unit Size
[MB]
Write Protect Group
Size [MB]
SDIN7DU2-8G
8h
4h
4MB
16MB
SDIN7DU2-16G
8h
8h
4MB
32MB
SDIN7DU2-32G
8h
10h
4MB
64MB
SDIN7DU2-64G
8h
20h
4MB
128MB
80-36-03666
Power Delivery and Capacitor Specifications
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
24
5. POWER DELIVERY AND CAPACITOR SPECIFICATIONS
5.1. SanDisk iNAND Power Domains
SanDisk iNAND has three power domains assigned to VCCQ, VCC and VDDi, as shown in Table
8.
Table 8 - Power Domains
Pin
Power Domain
Comments
VCCQ
Host Interface
Supported voltage ranges:
High Voltage Region: 3.3V (nominal)
Low Voltage Region: 1.8V (nominal)
VCC
Memory
Supported voltage range:
High Voltage Region: 3.3V (nominal)
VDDi
Internal
VDDi is the internal regulator connection to an
external decoupling capacitor.
5.2. Capacitor Connection Guidelines
5.2.1. VDDi Connections
The VDDi (C2/K2) ball must only be connected to an external capacitor that is connected to VSS.
This signal may not be left floating. The capacitor‟s specifications and its placement instructions
are detailed below.
The capacitor is part of an internal voltage regulator that provides power to the controller.
Caution: Failure to follow the guidelines below, or connecting the VDDi ball to any external signal
or power supply, may cause the device to malfunction.
The trace requirements for the VDDi (C2/K2) ball to the capacitor are as follows:
Resistance: <2 ohm
Inductance: <5 nH
The capacitor requirements are as follows:
Capacitance: >=0.1 uF
Voltage Rating: >=6.3 V
Dielectric: X7R or X5R
5.2.2. VCC and VCCQ Connections
All VCC balls should be connected to a 3.3V supply
All VCCQ balls should be connected either to a 3.3V or 1.8V supply
SanDisk recommends providing separate bypass capacitors for each power domain as shown in
Figure 5.
80-36-03666
Power Delivery and Capacitor Specifications
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
25
Note: Signal routing in the diagram is for illustration purposes only and the final routing depends
on your PCB layout. Also, for clarity, the diagram does not show the VSS connection. All
balls marked VSS should be connected to a ground (GND) plane.
Figure 5- Recommended Power Domain Connections
T10
Vcc
U9
Vcc
K6
VccQ M6
Vcc
AA5
VccQ
W4
VccQ Y4
VccQ
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A B C D E F G H J K L M N P
AA3
VccQ
N5
Vcc
C_1 C_2C_3 C_4C_5
VSS VSS VSS VSS VSS
C_1=C_3>=4.7uF
C_2=C_4<=100nF
Close to
Ball N5 Close to
Ball AA3
Capacitor C_5:
Capacitance >= 0.1uF
Voltage >= 6.3V
Dielectric: X7R or X5R
Trace Requirements (C_5):
Resistance < 2 ohm
Inductance < 5nH
K2
VDDi
Top
View
VccQ
power
supply
Vcc = 3.3V (nom)
R T V W Y AA AB AC AD AE AF AG AHU
80-36-03666
Marking
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
26
6. MARKING
First row: Simplified SanDisk Logo
Second row: Sales item P/N
Third row: Country of origin i.e. „TAIWAN‟ or „CHINA‟
* No ES marking for product in mass production.
Fourth row: Y- Last digit of year
WW- Work week
D- A day within the week.
MLLXXX – Internal use
2D barcode: Store the 10 Digital unique ID information as reflected in the fourth row.
Figure 6: Product marking
80-36-03666
Ordering Information
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation 80-36-03666
27
7. ORDERING INFORMATION
Table 9 – Ordering Information
Capacity
Technology
Part Number
Package
8GB
X2
SDIN7DU2-8G
11.5mm x 13mm x 1.0mm
16GB
X2
SDIN7DU2-16G
11.5mm x 13mm x 1.0mm
32GB
X2
SDIN7DU2-32G
11.5mm x 13mm x 1.2mm
64GB
X2
SDIN7DU2-64G
11.5mm x 13mm x 1.4mm
Note: Suffix “T” added to the P/N indicates tape/reel. For example, SDIN7DU2-8G would become
SDIN7DU2-8G-T. The default P/Ns in Table 9 are shipped in trays.
80-36-03462
Ordering Information
SanDisk iNAND e.MMC 4.41 I/F -Data Sheet
© 2012 SanDisk Corporation - 28 - 80-36-03666
HOW TO CONTACT US
USA
SanDisk Corporation, Corporate Headquarters.
601 McCarthy Blvd
Milpitas, CA 95035
Phone: +1-408-801-1000
Fax: +1-408-801-8657
Japan
SanDisk Japan Ltd
Shinagawa Tokyu Bldg. 3F,
Konan 1-6-31, Minato-ku, Tokyo
108-0075 Japan
Phone: +81-3-4334-7110
Fax: +81-3-5463-2011
Taiwan
SanDisk Asia Ltd.
37F, Taipei 101 Tower, No 7,
Xinyi Rd, Section 5.
Taipei, Taiwan, 110
Tel: +886-2-8758-2966
Fax: +886-2-8758-2999
Internet
http://www.SanDisk.com/mobile