5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is low or high without affecting the outputs as long as the data setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs. Features Y Alternate Military/Aerospace device (5474) is available. Contact a National Semiconductor Sales Office/Distributor for specifications. Connection Diagram Dual-In-Line Package TL/F/6526 - 1 Order Number 5474DMQB, 5474FMQB, DM5474J, DM5474W, DM7474M or DM7474N See NS Package Number J14A, M14A, N14A or W14B Function Table Inputs Outputs PR CLR CLK D Q Q L H L H H H H L L H H H X X X X X X H L X H L H* H L Q0 L H H* L H Q0 u u L H e High Logic Level X e Either Low or High Logic Level L e Low Logic Level e Positive-going transition of the clock. * e This configuration is nonstable; that is, it will not persist when either the preset and/or clear inputs return to their inactive (high) level. Q0 e The output logic level of Q before the indicated input conditions were established. u C1995 National Semiconductor Corporation TL/F/6526 RRD-B30M105/Printed in U. S. A. 5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs June 1989 Absolute Maximum Ratings (Note) Note: The ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the absolute maximum ratings. The ``Recommended Operating Conditions'' table will define the conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range b 55 C to a 125 C DM54 and 54 DM74 0 C to a 70 C Storage Temperature Range b 65 C to a 150 C Recommended Operating Conditions Symbol DM5474 Parameter DM7474 Nom Max Min Nom Max 4.5 5 5.5 4.75 5 5.25 VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage IOH High Level Output Current IOL Low Level Output Current fCLK Clock Frequency (Note 2) 0 tW Pulse Width (Note 2) Clock High 30 30 Clock Low 37 37 Clear Low 30 30 2 2 0.8 0.8 V b 0.4 b 0.4 mA 16 Preset Low V V 15 0 30 30 tSU Input Setup Time (Notes 1 & 2) 20u 20u tH Input Hold Time (Notes 1 & 2) 5u 5u TA Free Air Operating Temperature b 55 Note 1: The symbol ( Units Min 125 16 mA 15 MHz ns ns ns 0 70 C u) indicates the rising edge of the clock pulse is used for reference. Note 2: TA e 25 C and VCC e 5V. Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min VI Input Clamp Voltage VCC e Min, II e b12 mA VOH High Level Output Voltage VCC e Min, IOH e Max VIL e Max, VIH e Min VOL Low Level Output Voltage VCC e Min, IOL e Max VIH e Min, VIL e Max II Input Current @ Max Input Voltage VCC e Max, VI e 5.5V IIH High Level Input Current VCC e Max VI e 2.4V 2.4 Typ (Note 3) Low Level Input Current 0.2 D ICC b 1.5 V V 0.4 V 1 mA 40 Clock 80 Clear 120 D b 1.6 Clock b 3.2 (Note 6) Clear b 3.2 Short Circuit Output Current VCC e Max (Note 4) DM54 b 20 b 55 DM74 b 18 b 55 Supply Current VCC e Max (Note 5) 17 30 Note 4: Not more than one output should be shorted at a time. Note 5: With all outputs open, ICC is measured with the Q and Q outputs high in turn. At the time of measurement the clock is grounded. 2 mA b 1.6 Note 3: All typicals are at VCC e 5V, TA e 25 C. Note 6: Clear is tested with preset high and preset is tested with clear high. mA 40 VCC e Max VI e 0.4V Preset IOS Units 3.4 Preset IIL Max mA mA Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load) Symbol Parameter RL e 400X CL e 15 pF From (Input) To (Output) Min Units Max fMAX Maximum Clock Frequency tPHL Propagation Delay Time High to Low Level Output Preset to Q 40 ns tPLH Propagation Delay Time Low to High Level Output Preset to Q 25 ns tPHL Propagation Delay Time High to Low Level Output Clear to Q 40 ns tPLH Propagation Delay Time Low to High Level Output Clear to Q 25 ns tPHL Propagation Delay Time High to Low Level Output Clock to Q or Q 40 ns tPLH Propagation Delay Time Low to High Level Output Clock to Q or Q 25 ns 15 3 MHz Physical Dimensions inches (millimeters) 14-Lead Ceramic Dual-In-Line Package (J) Order Number 5474DMQB or DM5474J NS Package Number J14A 4 Physical Dimensions inches (millimeters) (Continued) 14-Lead Small Outline Molded Package (M) Order Number DM7474M NS Package Number M14A 14-Lead Molded Dual-In-Line Package (N) Order Number DM7474N NS Package Number N14A 5 5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Flat Package (W) Order Number 5474FMQB or DM5474W NS Package Number W14B LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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