January 2012 Doc ID 022370 Rev 3 1/24
1
VNH7013XP-E
Automotive integrated H-bridge
Features
■Maximum VCC voltage: 72 V
■10 V compatible inputs
■RDS(on) per leg: 13 mΩ typical
■Embedded thermal sensor: -8.1 mV/°K
■Very low stray inductance in power line
Description
The VNH7013XP-E is an automotive integrated
H-bridge intended for a wide range of automotive
applications driving DC motors. The device
incorporates a dual channel and two single
channel MOSFETs. All the devices are designed
using STMicroelectronics® well known and
proven proprietary VIPower® M0-S7 technology
that allows to integrate in a package four different
channels in H-bridge topology.
This package, specifically designed for the harsh
automotive environment offers improved thermal
performance thanks to exposed die pads.
Moreover, its fully symmetrical mechanical design
allows superior manufacturability at board level.
Type RDS(on) I
out Vccmax
VNH7013XP-E 13 mΩ typ
(per leg) 40 A 72 V(1)
1. Per leg: sum of the two BVdss (HSD + LSD);
VCC > 36 V whole bridge must be switched off;
PowerSSO-36 TP
Table 1. Device summary
Package
Order codes
Tube Tape and reel
PowerSSO-36 TP VNH7013XP-E VNH7013XPTR-E
www.st.com
Contents VNH7013XP-E
2/24 Doc ID 022370 Rev 3
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1 PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.1 Thermal calculation in clockwise and anti-clockwise operation in steady-
state mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.2 Thermal resistances definition (values according to the PCB heatsink
area) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.3 Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.4 Single pulse thermal impedance definition (values according to the PCB
heatsink area) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2 PowerSSO-36 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.3 PowerSSO-36 TP packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
VNH7013XP-E List of tables
Doc ID 022370 Rev 3 3/24
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Power off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power on. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Gate resistance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Switching on HSD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Switching on LSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Switching off HSD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Switching off LSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Thermal sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 14. Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 16
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 16. PowerSSO-36 TP mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
List of figures VNH7013XP-E
4/24 Doc ID 022370 Rev 3
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Single pulse maximum current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Gate charge vs gate-source voltage HS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Gate charge vs gate-source voltage LS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Capacitance variations HS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 7. Capacitance variations LS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 8. Thermal sensor voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. Gate charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Test circuit for inductive load switching and diode recovery times . . . . . . . . . . . . . . . . . . . 13
Figure 11. Switching times test circuit for resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. PowerSSO-36 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . 16
Figure 15. PowerSSO-36 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 18
Figure 16. PowerSSO-36 LSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 18
Figure 17. Thermal fitting model of an H-bridge in PowerSSO-36. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. PowerSSO-36 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 19. PowerSSO-36 TP tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 20. PowerSSO-36 TP tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
VNH7013XP-E Block diagram and pin description
Doc ID 022370 Rev 3 5/24
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram
Drain M4
Drain M1,M2
Gate 4
Drain M3
Source4
Source4
Source4
Source4
Source4
Source4
TSA+ TSA-
Gate 2
Source2
Source2
Source2
Source2
Source2
Source3
Source3
Source3
Source3
Gate 3
Source3
Source2
Source3
Gate 1
Source1
Source1
Source1
Source1
Source1
Source1
Drain4
Drain4
Drain2
Drain3
Drain3
Drain1
Drain M4
Drain M1,M2
Gate 4
Drain M3
Source4
Source4
Source4
Source4
Source4
Source4
TSA+ TSA-
Gate 2
Source2
Source2
Source2
Source2
Source2
Source3
Source3
Source3
Source3
Gate 3
Source3
Source2
Source3
Gate 1
Source1
Source1
Source1
Source1
Source1
Source1
Drain4
Drain4
Drain2
Drain3
Drain3
Drain1
TSK-
Block diagram and pin description VNH7013XP-E
6/24 Doc ID 022370 Rev 3
Table 2. Pin definitions and functions
Pin number Symbol Function
1 Gate 4 Gate of the LSD 4
2, 8 Drain 4 Drain of the LSD 4
3, 4, 5, 6, 7, 9 Source 4 Source of the LSD 4
10 TSA+ Thermal sensor anode
11, 12, 14, 15,
16, 17 Source 2 Source of the HSD 2
13 Drain 2 Drain of the HSD 2
18 Gate 2 Gate of the HSD 2
19 Gate 1 Gate of the HSD 1
20, 21, 22, 23,
25, 26 Source 1 Source of the HSD 1
24 Drain 1 Drain of the HSD 1
27 TSK- Thermal sensor cathode
28, 30, 31, 32,
33, 34 Source 3 Source of the LSD 3
29, 35 Drain 3 Drain of the LSD 3
36 Gate 3 Gate of the LSD 3
VNH7013XP-E Electrical specifications
Doc ID 022370 Rev 3 7/24
2 Electrical specifications
2.1 Absolute maximum rating
Figure 3. Single pulse maximum current
Table 3. Absolute maximum rating
Symbol Parameter Value Unit
VCC Supply voltage (whole bridge switched off) 72 V
Imax Maximum output current (continuous) 40 A
VGS_max Maximum gate source voltage 18 V
IPulse_max Maximum Single Pulse output current 80(1)
1. Pulse duration = 20 ms (see
Figure 3
).
A
Tj Junction operating temperature 175 °C
Tc Case operating temperature -40 to 150 °C
TSTG Storage temperature -55 to 150 °C
ISDiode continuous forward current 40 A
Electrical specifications VNH7013XP-E
8/24 Doc ID 022370 Rev 3
2.2 Electrical characteristics
Tj= 25 °C, unless otherwise specified.
Table 4. Power off
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSS
Drain-source breakdown
voltage ID =10mA, V
GS = 0 V 36 — V
IDSS
Zero gate voltage drain
current (VGS=0V)
VDS =28V;
-40 °C < Tj<150°C — 100 µA
VDS =28V; T
j= 25 °C — 10 µA
IGSS Gate-source leakage current
(VDS=0V) VGS = ±10 V — ±100 nA
Table 5. Power on
Symbol Parameter Test conditions Min. Typ. Max. Unit
VGS(th) Gate threshold voltage VDS = VGS; ID = 1 mA 2 4 V
dVGS(th)/dT
Gate threshold voltage
temperature derating VDS = VGS; ID = 1 mA 7.5 mV/°C
RDS(on) HS Static drain-source on
resistance
VGS = 10 V; ID = 5 A; Tj=25°C 5.7 mΩ
VGS = 10 V; ID = 5 A; Tj= 150 °C 11.9 mΩ
RDS(on) LS Static drain-source on
resistance
VGS = 10 V; ID = 5 A; Tj = 25 °C 7.3 mΩ
VGS = 10 V; ID = 5 A; Tj = 150 °C 15.1 mΩ
Table 6. Dynamic
Symbol Parameter Test condition Min. Typ. Max. Unit
Gfs_HS(1)
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%.
Forward transconductance VDS =15V; I
D=20A;
Tj=25°C
—20 —S
Gfs_LS(1) Forward transconductance — 17.5 — S
Ciss_HS Input capacitance
VDS = 25 V; f = 1 MHz;
VGS =0V (see
Figure 6
)
— 1836 — pF
Coss_HS Output capacitance — 426 — pF
Crss_HS Reverse transfer capacitance — 55 — pF
Ciss_LS Input capacitance
VDS =25V; f=1MHz;
VGS =0V (see
Figure 7
)
— 1250 — pF
Coss_LS Output capacitance — 311 — pF
Crss_LS Reverse transfer capacitance — 49 — pF
VNH7013XP-E Electrical specifications
Doc ID 022370 Rev 3 9/24
Table 7. Gate resistance
Symbol Parameter Test condition Min. Typ. Max. Unit
RG_HS Gate resistance HS VDD =15V; f
gate =1MHz —20 —Ω
RG_LS Gate resistance LS — 13 — Ω
Table 8. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VSD(1)
1. Pulse width limited by safe operating area.
Forward on voltage ISD =20A; V
GS =0V;
Tj=25°C —0.91.1V
trr Reverse recovery time ISD = 20 A; di/dt = 100 A/µs;
VDD =20V; T
j= 150 °C
(see
Figure 10
)
—50 ns
Qrr Reverse recovery charge — 28 nC
IRRM Reverse recovery current — 0.8 A
Table 9. Switching on HSD
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn on delay time VDD =15V; I
D=20A;
RG=4.7Ω; VGS =10V
— 53 — ns
trRise time — 319 — ns
QgTotal gate charge VDD =15V; I
D=20A;
VGS =10V
(see
Figure 4
and
Figure 9
)
—36—nC
Qgs Gate-source charge — 8.5 — nC
Qgd Gate-drain charge — 5 — nC
Table 10. Switching on LSD
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn on delay time VDD =15V; I
D=20A;
RG=4.7Ω; VGS =10V
— 53 — ns
trRise time — 430 — ns
QgTotal gate charge VDD =15V; I
D=20A;
VGS =10V
(see
Figure 5
and
Figure 9
)
—23—nC
Qgs Gate-source charge — 6 — nC
Qgd Gate-drain charge — 2.5 — nC
Table 11. Switching off HSD
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(off) Turn-off delay time VDD =15V; I
D=20A;
RG=4.7Ω; VGS =10V
(see
Figure 11
)
—253—ns
tf Fall time — 169 — ns
Electrical specifications VNH7013XP-E
10/24 Doc ID 022370 Rev 3
Figure 4. Gate charge vs gate-source voltage HS
Table 12. Switching off LSD
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(off) Turn-off delay time VDD =15V; I
D=20A;
RG=4.7Ω; VGS =10V
(see
Figure 11
)
—124—ns
tf Fall time — 293 — ns
Table 13. Thermal sensor(1)
1. See
Figure 8
.
Symbol Parameter Test conditions Min. Typ. Max. Unit
VF
Chain diode forward
voltage
Tj = 25 °C; IF = 250 µA
(see
Figure 8
)3.72 3.88 4.04 V
SF
Chain temperature
coefficient -40 °C < Tj<175°C; I
F= 250 µA -8.1 mV/°K
6GS6
1GN#
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VNH7013XP-E Electrical specifications
Doc ID 022370 Rev 3 11/24
Figure 5. Gate charge vs gate-source voltage LS
Figure 6. Capacitance variations HS
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#P&
6DS6
#OSS
#ISS
#RSS
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Electrical specifications VNH7013XP-E
12/24 Doc ID 022370 Rev 3
Figure 7. Capacitance variations LS
Figure 8. Thermal sensor voltage vs temperature
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VNH7013XP-E Electrical specifications
Doc ID 022370 Rev 3 13/24
Figure 9. Gate charge test circuit
Figure 10. Test circuit for inductive load switching and diode recovery times
Electrical specifications VNH7013XP-E
14/24 Doc ID 022370 Rev 3
Figure 11. Switching times test circuit for resistive load
VNH7013XP-E Package and PCB thermal data
Doc ID 022370 Rev 3 15/24
3 Package and PCB thermal data
3.1 PowerSSO-36 thermal data
Figure 12. PowerSSO-36 PC board
TBD
Double layers: footprint
Double layers: 2cm2 of Cu
Double layers: 8cm2 of Cu
Four layers: Cu on top layer: 16 cm2; Cu on bottom layer: 32 cm2; Cu on middle layer: total coverage
Package and PCB thermal data VNH7013XP-E
16/24 Doc ID 022370 Rev 3
Figure 13. Chipset configuration
Figure 14. Auto and mutual Rthj-amb vs PCB copper area in open box free air
condition
3.1.1 Thermal calculation in clockwise and anti-clockwise operation in
steady-state mode
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Note: Referred to double layer PCB
Table 14. Thermal calculation in clockwise and anti-clockwise operation in steady-
state mode
HSAHSBLSALSBTjHSAB TjLSA TjLSB
ON OFF OFF ON PdHSA x RthHS + PdLSB
x RthHSLS + Tamb
PdHSA x RthHSLS +
PdLSB x RthLSLS + Tamb
PdHSA x RthHSLS + PdLSB
x RthLS + Tamb
OFF ON ON OFF PdHSB x RthHS + PdLSA
x RthHSLS + Tamb
PdHSB x RthHSLS +
PdLSA x RthLS + Tamb
PdHSB x RthHSLS + PdLSA
x RthLSLS + Tamb
VNH7013XP-E Package and PCB thermal data
Doc ID 022370 Rev 3 17/24
3.1.2 Thermal resistances definition (values according to the PCB heatsink
area)
RthHS = RthHSA = RthHSB = High Side Chip Thermal Resistance Junction to Ambient (HSA or
HSB in ON state)
RthLS = RthLSA = RthLSB = Low Side Chip Thermal Resistance Junction to Ambient
RthHSLS = RthHSALSB = RthHSBLSA = Mutual Thermal Resistance Junction to Ambient
between High Side and Low Side Chips
RthLSLS = RthLSALSB = Mutual Thermal Resistance Junction to Ambient between Low Side
Chips
3.1.3 Thermal calculation in transient mode(a)
TjHSAB = ZthHS x PdHSAB + ZthHSLS x (PdLSA + PdLSB) + Tamb
TjLSA = ZthHSLS x PdHSAB + ZthLS x PdLSA + ZthLSLS x PdLSB + Tamb
TjLSB = ZthHSLS x PdHSAB + ZthLSLS x PdLSA + ZthLS x PdLSB + Tamb
3.1.4 Single pulse thermal impedance definition (values according to the
PCB heatsink area)
ZthHS = High Side Chip Thermal Impedance Junction to Ambient
ZthLS = ZthLSA = ZthLSB = Low Side Chip Thermal Impedance Junction to Ambient
ZthHSLS = ZthHSABLSA = ZthHSABLSB = Mutual Thermal Impedance Junction to Ambient
between High Side and Low Side Chips
ZthLSLS = ZthLSALSB = Mutual Thermal Impedance Junction to Ambient between Low Side
Chips
Equation 1: pulse calculation formula
a. Calculation is valid in any dynamic operating condition. Pd values set by user.
ZTHδRTH δZTHtp 1δ–()+Þ=
where δtpT⁄=
Package and PCB thermal data VNH7013XP-E
18/24 Doc ID 022370 Rev 3
Figure 15. PowerSSO-36 HSD thermal impedance junction ambient single pulse
Figure 16. PowerSSO-36 LSD thermal impedance junction ambient single pulse
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VNH7013XP-E Package and PCB thermal data
Doc ID 022370 Rev 3 19/24
Figure 17. Thermal fitting model of an H-bridge in PowerSSO-36
Table 15. Thermal parameters(1)
1. The blank space means that the value is the same as the previous one.
Area/island (cm2) Footprint 2 8 4L
R1 = R7 (°C/W) 0.2
R2 = R8 (°C/W) 1.6
R3 (°C/W) 8
R4 (°C/W) 30 16 16 10
R5 (°C/W) 40 22 12 5
R6 (°C/W) 36 28 10 6
R9 = R15 (°C/W) 0.1
R10 = R16 (°C/W) 2.8
R11 = R17 (°C/W) 22 14 14 14
R12 = R18 (°C/W) 49 30 30 20
R13 = R19 (°C/W) 52 36 28 16
R14 = R20 (°C/W) 50 32 26 18
R21 = R22 (°C/W) 80 60 50 40
R23 (°C/W) 80 50 45 30
C1 = C7 = C9 = C15 (W.s/°C) 0.001
C2 = C8 (W.s/°C) 0.009
C3 (W.s/°C) 0.09
C4 (W.s/°C) 0.5 0.8 0.8 0.8
C5 (W.s/°C) 0.8 1.4 2 3
C6 (W.s/°C) 5 6 8 10
C10 = C16 (W.s/°C) 0.1
C11 = C17 (W.s/°C) 0.07
C12 = C18 (W.s/°C) 0.45 0.45 0.45 0.6
C13 = C19 (W.s/°C) 0.8 1 1.2 2.5
C14 = C20 (W.s/°C) 4 5 6 8
C21 = C22 = C23 (W.s/°C) 0.01 0.006 0.005 0.005
Package and packing information VNH7013XP-E
20/24 Doc ID 022370 Rev 3
4 Package and packing information
4.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.2 PowerSSO-36 TP package information
Figure 18. PowerSSO-36 TP package dimensions
VNH7013XP-E Package and packing information
Doc ID 022370 Rev 3 21/24
Table 16. PowerSSO-36 TP mechanical data
Symbol
Millimeters
Min. Typ. Max.
A 2.15 2.47
A2 2.15 2.40
a1 0 0.1
b 0.18 0.36
c 0.23 0.32
D 10.10 10.50
E7.4 7.6
e0.5
e3 8.5
F2.3
G0.1
H 10.1 10.5
h0.4
k 0 deg 8 deg
L0.6 1
M4.3
N10 deg
O1.2
Q0.8
S2.9
T3.65
U1.0
X1 1.85 2.35
Y1 3 3.5
X2 1.85 2.35
Y2 3 3.5
X3 4.7 5.2
Y3 3 3.5
Z1 0.4
Z2 0.4
Package and packing information VNH7013XP-E
22/24 Doc ID 022370 Rev 3
4.3 PowerSSO-36 TP packing information
Figure 19. PowerSSO-36 TP tube shipment (no suffix)
Figure 20. PowerSSO-36 TP tape and reel shipment (suffix “TR”)
All dimensions are in mm.
Base Qty 49
Bulk Qty 1225
Tube length (±0.5) 532
A3.5
B13.8
C (±0.1) 0.6
A
C
B
Base Qty 1000
Bulk Qty 1000
A (max) 330
B (min) 1.5
C (±0.2) 13
F20.2
G (+2 / -0) 24.4
N (min) 100
T (max) 30.4
Reel dimensions
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 24
Tape Hole Spacing P0 (±0.1) 4
Component Spacing P 12
Hole Diameter D (±0.05) 1.55
Hole Diameter D1 (min) 1.5
Hole Position F (±0.1) 11.5
Compartment Depth K (max) 2.85
Hole Spacing P1 (±0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min 500mm min
Empty components pockets
sealed with cover tape.
User direction of feed
VNH7013XP-E Revision history
Doc ID 022370 Rev 3 23/24
5 Revision history
Table 17. Document revision history
Date Revision Changes
07-Nov-2011 1 Initial release
18-Jan-2012 2 Changed document status from preliminary data to datasheet.
20-Jan-2012 3 Updated features list.
VNH7013XP-E
24/24 Doc ID 022370 Rev 3
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