MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
Typical Operating Circuit appears at end of data sheet.
19-6147; Rev 0; 12/11
Ordering Information/Selector Guide appears at end of data
sheet.
General Description
The MAX14606/MAX14607 overvoltage protection devic-
es feature low 54mI (typ) on-resistance (RON) internal
FETs and protect low-voltage systems against voltage
faults up to +36V. When the input voltage exceeds the
overvoltage threshold, the internal FET is turned off to
prevent damage to the protected components.
The devices automatically choose the accurate internal
trip thresholds. The internal OVLO are preset to typical
5.87V (MAX14606) or 6.8V (MAX14607).
The MAX14606/MAX14607 feature reverse bias blocking
capability. Unlike other overvoltage protectors, when the
MAX14606/MAX14607 are disabled, the voltage applied to
OUT does not feed back into IN. These devices also feature
thermal shutdown to protect against overcurrent events.
The MAX14606/MAX14607 are specified over the extend-
ed -40NC to +85NC temperature range, and are available
in 9-bump WLP packages.
Applications
Tablets
Smart Phones
Portable Media Players
Benefits and Features
S Protect High-Power Portable Devices
Wide Operating Input Voltage Protection from
+2.3V to +36V
3A Continuous Current Capability
Integrated 54mI (typ) nMOSFET Switch
S Flexible Overvoltage Protection Design
Easy Paralleling
ACOK Indicates Input Is in Range
Preset Accurate Internal OVLO Thresholds
5.87V ±3% (MAX14606)
6.8V ±3% (MAX14607)
S Additional Protection Features Increase System
Reliability
Reverse Bias Blocking Capability
Soft-Start to Minimize Inrush Current
Internal 15ms Startup Debounce
Thermal Shutdown Protection
S Save Space
9-Bump, 1.3mm x 1.3mm, WLP Package
Visit www.maximintegrated.com/products/patents for
product patent marking information.
For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAX14606.related.
EVALUATION KIT AVAILABLE
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
2Maxim Integrated
(All voltages referenced to GND.)
IN ........................................................................... -0.3V to +40V
OUT .......................................................................-0.3V to +40V
IN - OUT ...................................................................-6V to +40V
EN, ACOK ...............................................................-0.3V to +6V
OVLO ..................................................................... -0.3V to +10V
Continuous Current into IN, OUT ......................................... Q3A
Continuous Power Dissipation (TA = +70NC)
WLP (derate 11.9mW/NC above +70NC)......................952mW
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range ............................ -65NC to +150NC
Soldering Temperature (reflow) ......................................+260NC
WLP
Junction-to-Ambient Thermal Resistance (BJA)........+84NC/W
ABSOLUTE MAXIMUM RATINGS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
ELECTRICAL CHARACTERISTICS
(VIN = +2.3V to +36V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VIN = +5V, TA = +25NC.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Voltage VIN VIN goes from low to high, ACOK goes from
high to low 2.3 36 V
Input Supply Current IIN EN low, VIN = 5V, IOUT = 0mA 70 120 FA
Input Disable Current IIN_DIS EN low, VIN = 5V, VOVLO < VOVLO_TH 60 120 FA
Input Shutdown Current IIN_Q EN high, VIN = 5V, VOUT = 0V 6 12 FA
Output Disable Current IOUT_DIS
EN low, VOUT = 5V, VIN = 5V, VOVLO <
VOVLO_TH or EN low, VOUT = 5V, VIN >
VIN_OVLO
3FA
Output Shutdown Current IOUT_SD EN high, VOUT = 5V, VIN = 5V 5.5 FA
OVP (IN TO OUT)
On-Resistance (IN to OUT) RON VIN = 5V, IOUT = 100mA 54 100 mI
Internal Overvoltage Lockout
Threshold VIN_OVLO
IN rising MAX14606 5.75 5.87 6.00
V
MAX14607 6.6 6.8 7.0
IN falling MAX14606 5.5
MAX14607 6.4
OUT Load Capacitance COUT 1000 FF
OVLO
OVLO Clamp Current VOVLO = 5.5V, VIN = 5V 9.7 25 FA
OVLO Open Voltage VOVLO_OP VEN = 0V 2.95 3.6 V
OVLO Pullup Resistance ROVLO_PU 500 kI
OVLO Force Off Voltage VOVLO_TH 0.6 1.221 1.4 V
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
3Maxim Integrated
Note 2: All devices are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by
design and not production tested.
Figure 1. Timing Diagram
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +2.3V to +36V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VIN = +5V, TA = +25NC.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL SIGNALS (EN, ACOK)
EN Input High Voltage VIH 1.4 V
EN Input Low Voltage VIL 0.4 V
EN Input Leakage Current IEN_LEAK VIN_OVLO or 5.5V -1 +1 FA
ACOK Output Low Voltage VOL VIO = 3.3V, ISINK = 1mA (see the Typical
Operating Circuit)0.4 V
ACOK Leakage Current VACOK_LEAK VIO = 3.3V, ACOK deasserted (see the
Typical Operating Circuit)-1 +1 FA
TIMING CHARACTERISTICS
IN Debounce Time tDEB 2.3V < VIN < VOVLO to charge-pump on,
Figure 1 10 15 35 ms
IN/OUT OVP Soft-Start Time tSS 2.3V < VIN < VOVLO to 90% of VOUT 30 ms
OVP Turn-On Time During
Soft-Start tON VIN = 5V, RL = 50I, CL = 10FF,
VOUT = 20% of VIN to 80% of VIN, Figure 1 2 ms
Turn-Off Time tOFF
VIN > VOVLO 2V/Fs to VOUT = 80% of VIN,
RL = 50I, Figure 1 1.5
Fs
EN low to high to VOUT = 80% of VIN, RL =
50I, Figure 1 84
THERMAL PROTECTION
Thermal Shutdown TSHDN +150 NC
Thermal Hysteresis THYST 20 NC
tDEB
tON
tOFF
tDEB
tDEB
tON
tOFF tDEB
THERMAL SHUTDOWN
OVLO
2.3V
IN
OUT
EN
ACOK
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
4Maxim Integrated
Typical Operating Characteristics
(VIN = +5V, CIN = 1FF, COUT = 1FF, TA = +25NC, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX14606/7 toc01
IN SUPPLY VOLTAGE (V)
IN SUPPLY CURRENT (µA)
27189
10
20
30
40
50
60
70
0
03
6
VEN = 3V
VOVLO = 1V
TA = +85°C
TA = +25°C
TA = -40°C
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX14606/7 toc02
IN SUPPLY VOLTAGE (V)
IN SUPPLY CURRENT (µA)
27189
50
100
150
200
250
300
350
0
03
6
MAX14606
VEN = 0V
VOVLO = 3V TA = +85°C
TA = +25°C
TA = -40°C
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX14606/7 toc03
IN SUPPLY VOLTAGE (V)
IN SUPPLY CURRENT (µA)
27189
50
100
150
200
250
300
350
0
03
6
TA = +85°C
TA = +25°C
TA = -40°C
VEN = 0V
VOVLO = 0V
OUTPUT LEAKAGE CURRENT
vs. OUTPUT VOLTAGE
MAX14606/7 toc04
VOUT (V)
OUTPUT LEAKAGE CURRENT (µA)
5.04.53.5 4.01.0 1.5 2.0 2.5 3.00.5
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
0 5.5
VEN = 3V
VOVLO = 0V
VIN = 6V
OUTPUT LEAKAGE CURRENT
vs. OUTPUT VOLTAGE
MAX14606/7 toc05
VOUT (V)
OUTPUT LEAKAGE CURRENT (µA)
5.04.50.5 1.0 1.5 2.5 3.0 3.52.0 4.0
1
2
3
4
5
6
7
8
0
0 5.5
VEN = 3V
VOVLO = 0V
VIN = 0V
NORMALIZED RON vs. TEMPERATURE
MAX14606/7 toc06
TEMPERATURE (°C)
NORMALIZED RON
603510-15
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
0.5
-40 85
IOUT = 100mA
NORMALIZED OVLO THRESHOLD
vs. TEMPERATURE
MAX14606/7 toc07
TEMPERATURE (°C)
NORMALIZED OVLO THRESHOLD
603510-15
0.96
0.97
0.98
0.99
1.00
1.01
1.02
1.03
1.04
1.05
0.95
-40 85
OVLO = OPEN
DEBOUNCE TIME vs. TEMPERATURE
MAX14606/7 toc08
TEMPERATURE (°C)
DEBOUNCE TIME (ms)
603510-15
16
17
18
19
20
21
22
23
24
25
15
-40 85
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
5Maxim Integrated
Typical Operating Characteristics (continued)
(VIN = +5V, CIN = 1FF, COUT = 1FF, TA = +25NC, unless otherwise noted.)
POWER-UP RESPONSE
(IOUT = 0.5A, COUT = 100µF)
MAX14606/7 toc09
10ms/div
0V
0V
0mA
VIN
5V/div
VOUT
5V/div
IOUT
500mA/div
POWER-UP RESPONSE
(IOUT = 0.5A, COUT = 1000µF)
MAX14606/7 toc10
10ms/div
0V
0V
0mA
VIN
5V/div
VOUT
5V/div
IOUT
500mA/div
OVERVOLTAGE FAULT RESPONSE
(MAX14606, IOUT = 0.5A, COUT = 1µF)
MAX14606/7 toc11
10µs/div
0V
5V
5V
0V
0mA
500mA
VIN
5V/div
VOUT
5V/div
IOUT
500mA/div
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
6Maxim Integrated
Bump Description
Bump Configuration
PIN NAME FUNCTION
A1 ACOK
Open-Drain Flag Output. ACOK is driven low after input voltage is stable between minimum VIN and
VOVLO after debounce. Connect a pullup resistor from ACOK to the logic I/O voltage of the host system.
ACOK is high impedence after thermal shutdown.
A2 OVLO Overvoltage Lockout Input. When forced low, it forces the pass element to be switched off. When left
unconnected, the part operates normally using its internal OVLO threshold.
A3 EN Active-Low Enable Input. Drive EN low to turn on the device. Drive EN high to turn off the device.
B1, C1 IN Overvoltage Protection Input. Bypass IN with a 1FF ceramic capacitor for high Q15kV HBM ESD
protection. No capacitor is required for Q2kV HBM ESD protection. Externally connect both IN together.
B2 I.C. Internally Connected. I.C. is internally connected to ground. Leave I.C. unconnected or connect to GND.
B3, C3 OUT Overvoltage Protection Output. Bypass OUT with a 1FF ceramic capacitor. Externally connect both
OUT together.
C2 GND Ground
WLP
TOP VIEW
BUMPS ON BOTTOM
GNDIN OUT
I.C.IN OUT
OVLO
21
A
B
C
3
MAX14606
MAX14607
+ACOK EN
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
7Maxim Integrated
Detailed Description
The MAX14606/MAX14607 overvoltage protection (OVP)
devices feature low on-resistance (RON) internal FETs
(Q1+Q2) and protect low-voltage systems against
voltage faults up to +36V. If the input voltage exceeds
the overvoltage threshold, the output is disconnected
from the input to prevent damage to the protected
components. The 15ms debounce time prevents false
turn-on of the internal FETs during startup.
Soft-Start
To minimize inrush current, the MAX14606/MAX14607
feature a soft-start capability to slowly turn on Q1 and
Q2. Soft-start begins when ACOK is asserted and ends
after 15ms (typ).
Overvoltage Lockout (OVLO)
The MAX14606/MAX14607 use the internal OVLO com-
parator with the internally set OVLO value. When IN goes
above the overvoltage lockout threshold (VIN_OVLO),
OUT is disconnected from IN and ACOK is deasserted.
When IN drops below VIN_OVLO, the debounce time
starts counting. After the debounce time, OUT follows IN
again and ACOK is asserted.
There are a few options of ACOK and shutdown condi-
tions to choose from with different OVLO and EN input
combinations (Table 1). For applications that need ACOK
present and OVP open, drive EN low and use OVLO as a
digital input to enable and disable the OVP switch.
Table 1. Logic Input Table
Functional Diagram
EN
OVLO LOW HIGH
Low
OVP Disabled
(Reverse Blocking
Present)
ACOK Present;
IIN = 70FA (typ)
OVP Shutdown
(Reverse Blocking
Present)
ACOK Not Present;
IIN = 5FA (typ)
High
OVP Enabled
ACOK Present;
IIN = 70FA (typ)
OVP Shutdown
(Reverse Blocking
Present)
ACOK Not Present;
IIN = 5FA (typ)
Q1 Q2
OUT
GATE DRIVER
CHARGE PUMP
TIMING AND
CONTROL
LOGIC
BG
POK
VBG
R2
INOVLO
ROVLO_OP
VOVLO_OP
R1
OVLO
IN
EN
OK
MAX14606/MAX14607
ACOK
EN
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
8Maxim Integrated
Reverse Bias Blocking
When the MAX14606/MAX14607 are in overvoltage con-
dition, EN is high, OVLO is low, or thermal shutdown is
on, then the switch between IN and OUT is open and the
two back-to-back diodes of the two series switches block
reverse bias. Therefore, when the voltage is applied at
the output, current does not travel back to the input.
Thermal Shutdown Protection
The MAX14606/MAX14607 feature thermal shutdown
protection to protect the device from overheating. The
device enters thermal shutdown when the junction tem-
perature exceeds +150NC (typ), and the device is back
to normal operation again after the temperature drops by
approximately 20NC (typ). In thermal shutdown, the over-
voltage protector is disabled and ACOK is high.
Applications Information
IN Bypass Capacitor
For most applications, it is recommended to bypass IN to
GND with a 1µF, 30V ceramic capacitor as close to the
device as possible to enable ±15kV HBM ESD protection
on IN. In addition, observe good layout practices such as
placing the bypass capacitor next to the connector. IC
power and ground must also be routed from the connec-
tor to the bypass capacitor and then to the MAX14606/
MAX14607. In this way, the capacitor will absorb the
ESD energy and thereby protect the device from a high-
voltage ESD event.
OUT Output Capacitor
The slow turn-on time provides a soft-start function that
allows the devices to charge an output capacitor up to
1000FF without turning off due to an overcurrent condition.
ESD Test Conditions
ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents test
methodology and results.
Human Body Model ESD Protection
Figure 2 shows the HBM, and Figure 3 shows the cur-
rent waveform it generates when discharged into a
low-impedance state. This model consists of a 100pF
capacitor charged to the ESD voltage of interest, which is
then discharged into the device through a 1.5kI resistor.
Figure 2. Human Body ESD Test Model Figure 3. Human Body Current Waveform
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
100pF
RC
1MΩ
RD
1.5kΩ
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
IP 100%
90%
36.8%
tRL TIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
IR
10%
0
0
AMPERES
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
9Maxim Integrated
Typical Operating Circuit
OTG EN FROM
SYSTEM
CHARGER IN
PMIC
KRX102
MAX14607
OUTIN
EN ACOK
OVLO
TO SYSTEM
MAX14607
OUTIN
EN ACOK
OVLO
1µF1µF
1µF
TRAVEL
ADAPTER
WIRELESS
CHARGER
VIO
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
10Maxim Integrated
Ordering Information/Selector Guide
Note: All devices are specified over the -40°C to +85°C operating temperature range.
+Denotes a lead(Pb)-free package/RoHS-compliant package.
T = Tape and reel.
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
Chip Information
PROCESS: BiCMOS
PART OVLO (V) TOP MARK PIN-PACKAGE
MAX14606EWL+T 5.87 AJR 9 WLP
MAX14607EWL+T 6.80 AJS 9 WLP
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
9 WLP W91B1+6 21-0430
Refer to
Application
Note 1891
MAX14606/MAX14607
Overvoltage Protectors with
Reverse Bias Blocking
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 11
© 2011 Maxim Integrated Products, Inc. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 12/11 Initial release —
