AU6371-JEL
USB2.0 Single LUN
Multiple Flash Card Reader Controller
Technical Reference Manual
AU6371-JEL
USB2.0 Single LUN
Multiple Flash Card Reader Controller
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Copyright © 1997 - 2007. Alcor Micro, Corp. All Rights Reserved. No part of this data
sheet may be reproduced, transmitted, transcribed, stored in a retrieval system or
translated into any language or computer language, in any form or by any means,
electronic, mechanical, magnetic, optical, chemical, manual or otherwise, without prior
written permission from Alcor Micro, Corp.
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The company and product names mentioned in this document may be the trademarks
or registered trademarks of their manufacturers.
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Alcor Micro, Corp. reserves the right to change this product without prior notice. Alcor
Micro, Corp. makes no warranty for the use of its products and bears no responsibility
for any error that appear in this document. Specifications are subject to change
without prior notice.
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Date Revision Description
Feb 2007 1.00W Official release
Apr 2007 1.01W Modify “5.6 Power Switch Feature”
Sep 2007 1.02W Modify “5.6 Power Switch Feature”
Dec 2007 1.03W Modify “1.2 Features”
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Web site: http://www.alcormicro.com/
Taiwan China ShenZhen Office
Alcor Micro, Corp. Rm.2407-08, Industrial Bank Building
4F, No 200 Kang Chien Rd., Nei Hu, No.4013, Shennan Road,
Taipei, Taiwan, R.O.C. ShenZhen,China. 518026
Phone: 886-2-8751-1984 Phone: (0755) 8366-9039
Fax: 886-2-2659-7723 Fax: (0755) 8366-9101
Santa Clara Office Los Angeles Office
2901 Tasman Drive, Suite 206 9070 Rancho Park Court
Santa Clara, CA 95054 Rancho Cucamonga, CA 91730
USA USA
Phone: (408) 845-9300 Phone: (909) 483-8821
Fax: (408) 845-9086 Fax: (909) 944-0464
<Memo>
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Table of Contents
1. Introduction ............................................................ 1
1.1 Description...................................................................................1
1.2 Features........................................................................................1
2. Application Block Diagram ................................... 2
3. Pin Assignment...................................................... 3
4. System Architecture and Reference Design .......6
4.1 AU6371 Block Diagram ...............................................................6
5. Electrical Characteristics......................................7
5.1 Absolute Maximum Ratings........................................................7
5.2 Recommended Operating Conditions .......................................7
5.3 General DC Characteristics........................................................7
5.4 DC Electrical Characteristics of 3.3V I/O Cells..........................7
5.5 USB Transceiver Characteristics...............................................8
5.6 Power Switch Feature .................................................................11
6. Mechanical Information.........................................12
7. Abbreviations.........................................................13
ii
List of Figures
Figure 2.1 Block Diagram..................................................................2
Figure 3.1 Pin Assignment Diagram ................................................3
Figure 4.1 AU6371 Block Diagram ...................................................6
Figure 5.1 Built-in card power switch I-V curve..............................11
Figure 5.2 Card Detect Power-on Timing.........................................11
Figure 6.1 Mechanical Information Diagram ...................................12
List of Tables
Table 3.1 Pin Descriptions................................................................4
Table 5.1 Absolute Maximum Ratings .............................................7
Table 5.2 Recommended Operating Conditions.............................7
Table 5.3 General DC Characteristics..............................................7
Table 5.4 DC Electrical Characteristics of 3.3V I/O Cells ...............8
Table 5.5 Electrical characteristics..................................................8
Table 5.6 Static characteristicDigital pin .....................................9
Table 5.7 Static characteristicAnalog I/O pinsDP/DM..........9
Table 5.8 Dynamic characteristicAnalog I/O pinsDP/DM.....10
AU6371-JEL USB 2.0 Single LUN Multiple Flash Card Reader Controller V1.03W 1
1. Introduction
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The AU6371 is a highly integrated single chip media USB card reader controller that
supports all popular form factor digital cards, such as CF, MD, SMC, SD, MMC, MS,
MS Pro, MS Duo and XD. In addition to the small form factor and low BOM cost the
solution also implement high performance operation a sophisticated DMA engine.
With the compliance with USB Storage Class V1.0, AU6371 not only exhibits wide
acceptance in various OS platforms, its multiple slot design further enables the
solution adapters become the content exchange center for mobile media. It can read
digital contents stored on memory card designed to cover a wide area of applications
such as digital cameras, PDAs, MP3 players and smart phones…etc. With the
AU6371, users can transfer digital data between flash memory card and PC or these
electronic devices.
The AU6371 used 48 pin package specifically designed for small foot print applicatio n,
such as Note book and printer.
In addition to its high performance and outstanding compatibility, the solution of
AU6371 comes with a user-friendly utility to enhance users’ experience. Moreover,
AU6371 integrates power switch to reduce the overall BOM cost.
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Supports USB 2.0 specification and USB Device Class Definition for Mass
Storage, Bulk-Transport V1.0
Supports CF/MD/SD/MMC/MS/MS_Pro/MS_Duo/xD/SMC compatible flash
card in 48 pin package
Supports the latest flash card specif ication: CF 4.0 (with T rue IDE PIO mode 6),
SD 2.0 (SDHC), MMC 4.2 (8-bit), MS Pro parallel mode (4-bit), xD 1.2,
SMC2003.
A built-in DMA engine for data transmission performance enhancement
Work with default driver from Windows ME/2000/XP and Mac OS X; Vendor
device driver from Alcor Micro are available to run under Windows
98/2000(SP1/SP2) and Mac OS 9
Ping-pong FIFO implementation for concurrent bus operation
Supports multiple sector burst transfer for optimized performance
Supports Dynamic Icon Utility to enhance user experience
Supports LED for bus activities indication
Power switch integrated to reduce production BOM cost
Support power saving mode for notebook when no card inserted.
AU6371-JEL USB 2.0 Single LUN Multiple Flash Card Reader Controller V1.03W
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2. Application Block Diagram
The following application drawing demonstrates a typical card reader block diagram
using AU6371. By connecting one card reader to a desktop or notebook PC through
USB bus, the AU6371 becomes a bus-powered, high speed USB card reader, which
can be used as a bridge for data transfer between Desktop PC and Notebook PC.
Figure 2.1 Block Diagram
PC with USB Host Controller
CF/MS/MD/
xD/SMC/SD/
MMC
PC
AU6371 Moble Phones
PDA
MP3 Player
Digital Camera
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3. Pin Assignment
The AU6371 is delivered in 48pin LQFP form factor. Documented below is a figure
shows signal names of each pin and a table in the following page describes each pin
in more details.
Figure 3.1 Pin Assignment Diagram
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31
29
30
34
46 45 44 43 42
12
35
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28
27
26
25
41 40 39 38 374748
13 14 15 16 17 18 19 20 21 22 23 24
VDD
REXT
VD33P
DP
DM
VS33P
XI
XO
GNDU
VDDU
NC
NC CONTROLOUT3
CONTROLOUT2
CONTROLOUT1
CONTROLOUT0
GPON6
CARDDATA0
CARDDATA1
CARDDATA2
CARDDATA5
CARDDATA6
CARDDATA3
CARDDATA4
CONTROLOUT4
CFCDN
SMCDN
XDCDN
CONTROLOUT5
SDCDN
VSSH
READER_EN
V18
CF_V33
MSINS
VDDH
CARDDATA7
CARDDATA8
CARDDATA9
CARDDATA10
CARDDATA11
CARDDATA12
CARDDATA13
CARDDATA14
CARDDATA15
CFWTN
GND
CHIPRESETN
ALCOR MICRO
AU6371
48PIN LQFP
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Table 3.1 Pin Descriptions
Pin # Pin Name I/O Description
1 VDD I Core Power 1.8V
2 REXT O External Resistor to Ground
3 VD33P 3.3V Power
4 DP I/O USB DP
5 DM I/O USB DM
6 VS33P Ground Power
7 XI I 12 MHz crystal input.
8 XO O 12 MHz crystal output.
9 GNDU UTMI Gound
10 VDDU UTMI Power 1.8 V
11 NC
12 NC
13 V18 O Core Power 1.8V
14 VDDH I 3.3V for IO pad
15 CF_V33 O Card Power 3.3V
16 READER_EN I Reader function enable("1" : Card reader function
enable; "0" : Card only mode)
17 VSSH IO Power Ground
18 MSINS I MS Card detect
19 SMCDN I SMC Card detect
20 CFCDN I CF Card detect
21 SDCDN I SD Card detect
22 XDCDN I XD Card detect
23 CONTROLOUT5 O CFRESETN and SMWRN/XDWRN
24 CONTROLOUT4 O CFWRN and SMRDN/XDRDN
25 CONTROLOUT3 O CFRDN and XDCEN/SMCEN
26 CONTROLOUT2 O CFAD2 and SMALE/XDALE
27 CONTROLOUT1 O CFAD1, MSCLK and SMCLE/XDCLE
28 CONTROLOUT0 O CFAD0, SDCLK and MSBS
29 GPON6 O LED indicator for card operation
AU6371-JEL USB 2.0 Single LUN Multiple Flash Card Reader Controller V1.03W 5
Pin # Pin Name I/O Description
30 CARDDATA0 I/O CFDATA0, MSDATA0,and SDCMD
31 CARDDATA1 I/O CFDATA1,MSDATA1,XDWPN,and SMWPN
32 CARDDATA2 I/O CFDATA2,MSDATA2,and SDWP
33 CARDDATA3 I/O CFDATA3,MSDATA3,SMRBN,and XDRBN
34 CARDDATA4 I/O CFDATA4 and SDDATA0
35 CARDDATA5 I/O CFDATA5 and SDDATA1
36 CARDDATA6 I/O CFDATA6 and SDDATA2
37 CARDDATA7 I/O CFDATA7 and SDDATA3
38 CARDDATA8 I/O CFDATA8,XDDATA0, and SDDATA4
39 CARDDATA9 I/O CFDATA9,XDDATA1, and SDDATA5
40 CARDDATA10 I/O CFDATA10,XDDATA2, and SDDATA6
41 CARDDATA11 I/O CFDATA11,XDDATA3, and SDD ATA7
42 CARDDATA12 I/O CFDATA12 and XDDATA4
43 CARDDATA13 I/O CFDADA13 and XDDATA5
44 CARDDATA14 I/O CFDATA14 and XDDATA6
45 CARDDATA15 I/O CFDATA15 & XDDATA7
46 CFWTN I CF WAITN
47 CHIPRESETN I Chip Reset (low active to reset the whole chip),
must be pull up with RC.
48 GND I Core Power Gound
4. System Architecture and Reference
Design
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Figure 4.1 AU6371 Block Diagram
3.3V
PLL
Card
Power
1.8V
Voltage
Regulator
/Power Switch
12MHz
XTAL
USB
SIE RAM CF/MD/SMC/
SD/MMC/MS/
xD Control FIFO
Processor ArbitratorROM
XCVR
CF
MD
SMC
SD
MMC
MS
xD
USB
Upstream
Port
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5. Electrical Characteristics
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Table 5.1 Absolute Maximum Ratings
SYMBOL PARAMETER RATING UNITS
VDDH Power Supply -0.3 to 3.6 V
VIN Input Signal Voltage -0.3 to VDDH +0.3 V
TSTG Storage Temperature -40 to 150 OC
5.2 Recommended Operating Conditions
Table 5.2 Recommended Operating Conditions
SYMBOL PARAMETER MIN TYP MAX UNITS
VDDH Power Supply 3.0 3.3 3.6 V
VDD
V18 Digital Supply 1.62 1.8 1.98 V
VIN Input Signal Voltage -0.3 VDDH + 0.3 V
TOPR Operating Temperature 0 85 OC
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Table 5.3 General DC Characteristics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IIN Input current No pull-up or
p
ull-down -10 ±1 10 µA
IOZ Tri-state leakage current -10 ±1 10 µA
CIN Input capacitance Pad Limit 2.8 ρF
COUT Output capacitance Pad Limit 2.8 ρF
CBID Bi-directional buffer
ca
p
acitance Pad Limit 2.8 ρF
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Table 5.4 DC Electrical Characteristics of 3.3V I/O Cells
Limits
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
VDDH Power supply 3.3V I/O 3.0 3.3 3.6 V
Vil Input low voltage 0.8 V
Vih Input high voltage LVTTL 2.0 V
Vol Output low voltage Iol=2~16mA 0.4 V
Voh Output high voltage Ioh=2~16mA 2.4 V
Rpu Input pull-up resistance PU=high, PD=low 55 75 110 KΩ
Rpd Input pull-down resistance PU=low, PD=high 40 75 150 KΩ
Iin Input leakage current Vin= VDDH or 0 -10 ±1 10 μA
Ioz Tri-state output leakage
current -10 ±1 10 μA
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Table 5.5 Electrical characteristics
Symbol Parameter Conditions Min. Typ. Max. Unit
VD33 Analog supply Voltage 3.0 3.3 3.6 V
VDDU
VDDA Digital supply Vo ltage 1.62 1.8 1.98 V
ICC Operating supply current High speed operating
at 480 MHz 55 mA
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Table 5.6 Static characteristicDigital pin
Symbol Parameter Conditions Min. Typ. Max. Unit
Input levels
VIL Low-level input voltage 0.8 V
VIH High-level input voltage 2.0 V
Output levels
VOL Low-level output voltage 0.2 V
VOH High-level output voltage VDDH-0.2 V
Table 5.7 Static characteristicAnalog I/O pinsDP/DM
Symbol Parameter Conditions Min. Typ. Max. Unit
USB2.0 T r ansceiverHS
Input Levelsdifferential receiver
VHSDIFF High speed differential
input sensitivity
VIDP-VIDM
measured at the
connection as
application circuit
300 mV
VHSCM High speed data signaling
common mode voltage
range -50 500 mV
Squelch detected 100 mV
VHSSQ High speed squelch
detection threshold No squelch detected 150 mV
Disconnection
detected 625 mV
VHSDSC High speed disconnection
detection threshold Disconnection not
detected 525 mV
Output Levels
VHSOI High speed idle level
output voltage(differential) -10 10 mV
VHSOL High speed low level
output voltage(differential) -10 10 mV
VHSOH High speed high level
output voltage(differential) -360 400 mV
VCHIRPJ Chirp-J output voltage
differential 700 1100 mV
VCHIRPK Chirp-K output voltage
differential -900 -500 mV
Resistance
RDRV Driver output impedance Equivalent resistance
used as internal chip
only 3 6 9
Ω
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Overall resistance
including external
resistor 40.5 45 49.5
Termination
VTERM Termination voltage for
pull-up resistor on pin
RPU 3.0 3.6 V
USB1.1 T r ansceiverFS
Input Levelsdifferential receiver
VDI Differential input
sensitivity VIDP-VIDM 0.2 V
VCM Differential common
mode voltage 0.8 2.5 V
Input Levelssingle-ended receivers
VSE Single ended receiver
threshold 0.8 2.0 V
Output levels
VOL Low-level output voltage 0 0.3 V
VOH High-level output voltage 2.8 3.6 V
Table 5.8 Dynamic characteristicAnalog I/O pinsDP/DM
Symbol Parameter Conditions Min. Typ. Max. Unit
Driver Characteristics
High-Speed Mode
tHSR High-speed differential
rise time 500 ps
tHSF High-speed differential fall
time 500 ps
Full-Speed Mode
tFR Rise time
CL=50pF10 to 90
ofVOH-VOL∣; 4 20 ns
tFF Fall time
CL=50pF90 to 10
ofVOH-VOL∣; 4 20 ns
tFRMA Differential rise/fall time
matchingtFR / tFF Excluding the first
transition from idle
mode 90 110
VCRS Output signal crossover
voltage
Excluding the first
transition from idle
mode 1.3 2.0 V
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I-V Cure of Card Sw itch
2.850
2.900
2.950
3.000
3.050
3.100
3.150
3.200
3.250
0 100 200 300 400 500
Current (mA )
CFPWR-B(V)
Figure 5.1 Built-in card power switch I-V curve
3.3V+/- 0.3V
1ms to 10ms ( Depend
Load Capacitor )
CARD_POWER
CARD_DETECT
100ms + System
Polling timing
Figure 5.2 Card Detect Power-on Timing
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6. Mechanical Information
Figure 6.1 Mechanical Information Diagram
be
C
1A
2A
L1
L
0.25
GAUGE PLANE
SEATING PLANE
A
1
E1
E
DD
1
SYMBOLS MIN. MAX.
A -- 1.6
A1 0.05 0.15
A2 1.35 1.45
c1 0.09 0.16
D 9.00 BSC
D1 7.00 BSC
E 9.00 BSC
E1 7.00 BSC
e 0.5 BSC
b 0.17 0.27
L 0.45 0.75
L1 1 REF
1. JEDEC OUTLINE: MS-026 BBC
2. DIMENSIONS D1 AND E1 DO NOT
INCLU DE MOL D PROTRUS I ON.
ALLOWABLE PROTRUSION IS 0.25mm
PER SIDE. D1 AND E1 ARE MAXIMUM
PLASTIC BODY SIZE DIMENSIONS
IMCLUDING MOLD MISMATCH.
3. DIMENSION b DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL NOT
CAUSE THE LEAD WIDTH TO EXCEED
THE MAXIMUM b DIMENSION BY MORE
THAN 0.08mm
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7. Abbreviations
In this chapter some of the terms and abbreviations used throughout the technical
reference manual are listed as follows.
SIE Serial Interface Engine
CF Compact Flash
MD Micro Drive
SMC SmartMedia Card
MS Memory Stick
SD Secure Digital
MMC Multimedia Card
UTMI USB Transceiver Macrocell Interface
About Alcor Micro, Corp.
Alcor Micro, Corp. designs, develops and markets highly integrated and advanced
peripheral semiconductor, and software driver solutions for the personal computer
and consumer electronics markets worldwide. We specialize in USB solutions and
focus on emerging technology such as USB and IEEE 1394. The company offers a
range of semiconductors including controllers for USB hub, integrated keyboard/USB
hub and USB Flash memory card reader…etc. Alcor Micro, Corp. is based in Taipei,
Taiwan, with sales offices in Taipei, Japan, Korea and California. Alcor Micro is
distinguished by its ability to provide innovative solutions for spec-driven products.
Innovations like single chip solutions for traditional multiple chip products and
on-board voltage regulators enable the company to provide cost-efficiency solutions
for the computer peripheral device OEM customers worldwide.
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