Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6 1Publication Order Number:
SN74LS670/D
SN74LS670
4 x 4 Register File
with 3-State Outputs
The TTL/MSI SN74LS670 is a high-speed, low-power 4 x 4
Register File organized as four words by four bits. Separate read and
write inputs, both address and enable, allow simultaneous read and
write operation.
The 3-state outputs make it possible to connect up to 128 outputs to
increase the word capacity up to 512 words. Any number of these
devices can be operated in parallel to generate an n-bit length.
Simultaneous Read/Write Operation
Expandable to 512 Words by n-Bits
Typical Access Time to 20 ns
3-State Outputs for Expansion
Typical Power Dissipation of 125 mW
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 4.75 5.0 5.25 V
TAOperating Ambient
Temperature Range 0 25 70 °C
IOH Output Current – High 2.6 mA
IOL Output Current – Low 24 mA
LOW
POWER
SCHOTTKY
Device Package Shipping
ORDERING INFORMATION
SN74LS670N 16 Pin DIP 2000 Units/Box
SN74LS670D 16 Pin
SOIC
D SUFFIX
CASE 751B
http://onsemi.com
2500/Tape & Reel
PLASTIC
N SUFFIX
CASE 648
16
1
16
1
SN74LS670
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2
CONNECTION DIAGRAM DIP (TOP VIEW)
Data Inputs
Write Address Inputs
Write Enable (Active LOW) Input
Read Address Inputs
Read Enable (Active LOW) Input
Outputs
D1 – D4
WA, WB
EW
RA, RB
ER
Q1 – Q4
0.5 U.L.
0.5 U.L.
1.0 U.L.
0.5 U.L.
1.5 U.L.
65 U.L.
0.25 U.L.
0.25 U.L.
0.5 U.L.
0.25 U.L.
0.75 U.L.
15 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
m
A HIGH/1.6 mA LOW.
HIGH LOW
(Note a)LOADING
PIN NAMES
LOGIC SYMBOL
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
14 13 12 11 10 9
1234567
16 15
8
VCC
D2
D1WAWBEWQ1
ERQ2
D3D4RBRAQ4Q3GND
VCC = PIN 16
GND = PIN 8
14
13
5
4
12 15 1 2 3
11 10 9 7 6
WA
WB
RA
RB
EW
ER
D1D2D3D4
Q1Q2Q3Q4
SN74LS670
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3
LOGIC DIAGRAM
14
12
67
3
4
5
9
11
12
10
13
15
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
GD
QGD
QGD
QGD
Q
GD
Q
GD
Q
GD
Q
GD
Q
GD
QGD
QGD
QGD
Q
GD
Q
GD
Q
GD
Q
GD
Q
WORD
0
WORD
1
WORD
2
WORD
3
D4D3D2D1
Q4Q3Q2Q1
RA
ER
RB
WA
WB
EW
SN74LS670
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4
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
VIH Input HIGH Voltage 2.0 VGuaranteed Input HIGH Voltage for
All Inputs
VIL Input LOW Voltage 0.8 VGuaranteed Input LOW Voltage for
All Inputs
VIK Input Clamp Diode Voltage 0.65 1.5 V VCC = MIN, IIN = –18 mA
VOH Output HIGH Voltage 2.4 3.1 VVCC = MIN, IOH = MAX, VIN = VIH
or VIL per T ruth Table
VO
Out
p
ut LOW Voltage
0.25 0.4 V IOL = 12 mA VCC = VCC MIN,
VIN =V
IL or VIH
V
OL
O
u
tp
u
t
LOW
Voltage
0.35 0.5 V IOL = 24 mA
V
IN =
V
IL
or
V
IH
per T ruth Table
IOZH Output Off Current HIGH 20 µA VCC = MAX, VO = 2.7 V
IOZL Output Off Current LOW –20 µA VCC = MAX, VO = 0.4 V
IIH
Input HIGH Current
D, R, W
EW
ER
20
40
60
µA VCC = MAX, VIN = 2.7 V
IH
D, R, W
EW
ER
0.1
0.2
0.3 mA VCC = MAX, VIN = 7.0 V
IIL
Input LOW Current
D, R, W
EW
ER
0.4
0.8
–1.2
mA VCC = MAX, VIN = 0.4 V
IOS Short Circuit Current (Note 1) –30 130 mA VCC = MAX
ICC Power Supply Current 50 mA VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
SN74LS670
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5
AC CHARACTERISTICS (TA = 25°C)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
tPLH
tPHL Propagation Delay, RA or RB
to Output 23
25 40
45 ns
tPLH
tPHL Propagation Delay, EW to
Output 26
28 45
50 ns VCC = 5.0 V,
tPLH
tPHL Propagation Delay, Data
to Output 25
23 45
40 ns
CC
CL = 45 pF
tPZH
tPZL Output Enable T ime 15
22 35
40 ns
tPLZ
tPHZ Output Disable T ime 16
30 35
50 ns CL = 5.0 pF
AC SETUP REQUIREMENTS (TA = 25°C)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
tWPulse Width 25 ns
tsSetup T ime, (D) 10 ns
tsSetup T ime, (W) 15 ns
VCC =50V
thHold T ime, (D) 15 ns
V
CC =
5
.
0
V
thHold T ime, (W) 5.0 ns
trec Recovery Time 25 ns
AC WAVEFORMS
Figure 1. Figure 2.
Figure 3.
1.3 V 1.3 V 1.3 V 1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V 1.3 V
1.3 V1.3 V
1.3 V1.3 V
RA, RB
QQ
D, EW
WA, WB
D
EW
ts
th
th
ts
tW
tPHL tPLH tPHL tPLH
SN74LS670
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6
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
B
FC
S
HGD
J
L
M
16 PL
SEATING
18
916
K
PLANE
–T–
M
A
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.740 0.770 18.80 19.55
B0.250 0.270 6.35 6.85
C0.145 0.175 3.69 4.44
D0.015 0.021 0.39 0.53
F0.040 0.70 1.02 1.77
G0.100 BSC 2.54 BSC
H0.050 BSC 1.27 BSC
J0.008 0.015 0.21 0.38
K0.110 0.130 2.80 3.30
L0.295 0.305 7.50 7.74
M0 10 0 10
S0.020 0.040 0.51 1.01
____
SN74LS670
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7
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
RX 45
_
G
8 PLP
–B–
–A–
M
0.25 (0.010) B S
–T–
D
K
C
16 PL
S
B
M
0.25 (0.010) A S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.80 10.00 0.386 0.393
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.229 0.244
R0.25 0.50 0.010 0.019
____
SN74LS670
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8
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