FO dvricnisce ULN2003/ULN2004 High-Voltage, High-Current Darlington Arrays (THESE HIGH-VOLTAGE, HIGH-CURRENT arlington arrays are comprised of seven silicon NPN darlington pairs on a common monolithic substrate. All units have open-collector outputs and integral diodes for inductive load transient suppression. ULN2003 has a 2.7 kQ series base resistor for each darlington pair, allowing operation directly with TTL or CMOS operating at a supply voltage of 5 V. These devices will handle numerous interface needs particularly those beyond the capabilities of standard logic buffers. (DEVICE NUMBER DESIGNATION VCEMAX) 50V IC(MAX) 500mA Logic Type Number 5V TTL, CMOS ULN2003 6-15V CMOS,PMOS ULN2004 _) ULN2004 has a 10.5 kQ series input resistor that permits operation directly from CMOS or PMOS outputs utilizing supply voltages of 6 to 15 V. ULN2003/ULN2004 is the original high-voltage, high- current darlington array. The output transistors are capable of sinking 500 mA and will sustain at least 50 V in the off state. Output may be paraile-led for higher load-current capability. ULN2003/ULN2004 darlington arrays are furnished in a 16-Pin dual in-line plastic package. These can also be supplyed in a hermetic dual in-line package for use in military and aerospace applications. ALLOWABLE AVERAGE POWER DISSIPATION AS A FUNCTION OF AMBIENT TEMPERATURE 2.0 0.5 ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS 9 6 a 50 100 150 AMBIENT TEMPERATURE INC 6-1 ULN2003/ULN2004 High-Voltage, High-Current PE Ta larch eeu ek oo (ABSOLUTE MAXIMUM RATINGS } at +25 Free- Air Temperature (unless otherwise noted ) Input Voltage, Vn (ULN2003, ULN2004) . ts 30V Continuous Input Current,Imp ses 25 mA Power Dissipation, Pp ( one Darlington pair) ---- ssc ttt 1.0 W. (total package preteens ee 20W Operating Ambient Temperature Range, TAs cttt -20% tot+85e Storage Temperature Range, Ts ---- ttt te ~$5% to+ 150% Debate at the rate of 16.67 mW/T above + 25%. Under normal operating conditions, these devices will sustain 350 mA per output with Vesistay = 1.6 V at +70% with a pulse width of 20 ms and a duty cycle of 34%. (PARTIAL SCHEMATICS . ) Series ULN2003 Series ULN2004 (each driver) (each driver) 25 Fol | z < I 2.0 < z we Lo E _ 15 sony, z : ett . = 1.0 =| S MAK _ 2 AREA Of NORMAL e 05 OPERATION WITH iss > STANDARD OR & SCHOTICY TIL z z 2025 35 4045 50 5.5 60 65 12014 #16 #18 20 22 24 26 INPUT VOLTAGE ~VIN INPUT VOLTAGE ViNn PEAK COLLECTOR CURRENT AS A FUNCTION OF DUTY CYCLE oD 600 + RECOMMENDED MAXIMUM CURRENT-SERIES ULN2000 400 TTT 4 3 sh 200 I i Le NUMBER OF OUTPUT. CONDUCTING O LSIMULTANEOUSLY 0 20 40 60 80 100 PEAK COLLECTOR CURRENT IN mA AT +70C PEAK COLLECTOR CURRENT IN mA AT -75" PER CENT DUTY CYCLE ULN2003/ULN2004 High-Voltage, High-Current PPV eee Nh co {ELECTRICAL CHARACTERISTICS AT +25_( unless otherwise noted | ) Characteristic Symbol | Test Fig. | Applicable Test Conditions 1A > 3 1B - 2 Saturation Voltage Input Current Input Voltage COLLECTOR CURRENT AS A FUNCTION COLLECTOR CURRENT AS A FUNCTION OF SATRATION VOLTAGE OF INPUT CURRENT 600 TF 600 g | el 2 < 7 7 i 5 Br | z Z 400 4 z / & 400 z / g x = > o 200 7 e 200 a 2 2 / a a l 3 @ + 3 3 /. Lwowon REQUIRED oO 0 g 0 / INPUT CURRENT 0.5 1.0 1.5 2.0 0 200 400 600 SATURATION VOLTAGE-V CE(SAT} INPUT CURRENT INpA.ly 6-3 io ULN2003/ULN2004 High-Voltage, High-Current DEVO TruKy wee eek hy ({(NPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE } SERIES ULN2003 TTL TO LOAD +Vee ULN2003/5D Vv LAMP TEST BUFFER FOR HIGH-CURRENT LOAD +vDD ULN2004 +V 2N4901 CMOS OUTPUT SERIES ULN2004 USE OF PULL-UP RESISTORS TO INCREASE DRIVE CURRENT +Vee UVIN2003 a ULN2003/ULN2004 High-Voltage, High-Current Ele acn wee ee he FE rico (TEST FIGURES it u it}+ qf y ll OPEN Vce FIGURE 1B OPEN Vez FIGURE 4 FIGURE 7