Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

    
  
SLOS331C − AUGUST 2000 − REVISED MARCH 2007
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DMinimal External Components Required
D1.6-V to 3.6-V Supply Voltage Range
D50-mW Stereo Output
DLow Supply Current . . . 0.75 mA
DLow Shutdown Current ...50 nA
DGain Set Internally to 2 dB
DPop Reduction Circuitry
DInternal Mid-Rail Generation
DThermal and Short-Circuit Protection
DSurface-Mount Packaging
− 3-mm y 5-mm MSOP Package (DGN)
− 5-mm y 6-mm SOIC Package (D)
− 2,5-mm y 2,5-mm MicroStar JuniorE BGA
Package (ZQY)
description
The TPA6101A2 is a stereo audio power amplifier packaged in an 8-pin SOIC package, an 8-pin MSOP
package, or a 15-ball BGA package, capable of delivering 50 mW of continuous RMS power per channel into
16- loads. Amplifier gain is internally set to 2 dB (inverting) to save board space by eliminating six external
resistors.
The TPA6101A2 is optimized for battery applications because of its low supply current, shutdown current, and
THD+N. To obtain the low-supply-voltage range, the TPA6101A2 biases BYPASS to VDD/4.
When driving a 16- load with 40-mW output power from 3.3 V, THD+N is 0.08% at 1 kHz, and less than 0.2%
across the audio band of 20 Hz to 20 kHz. For 30 mW into 32- loads, the THD+N is reduced to less than 0.06%
at 1 kHz, and is less than 0.3% across the audio band of 20 Hz to 20 kHz.
typical application circuit
Audio
Input
Bias
Control
VO1
VO2
VDD
IN1−
BYPASS
SHUTDOWN
VDD/4
CI80 k
RF
80 k
CB
CS
Audio
Input CI
IN2−
VDD
From Shutdown
Control Circuit
+
+
CC
CC
80 k
RI
80 k
RF
80 k
NOTE: All internal resistor
values are ±20%.
80 k
RI
MicroStar BGA is a trademark of Texas Instruments.
Copyright 2007, Texas Instruments Incorporated
1
2
3
4
8
7
6
5
BYPASS
GND
SHUTDOWN
IN2−
IN1−
VO1
VDD
VO2
D or DGK PACKAGE
(TOP VIEW)
  !"#$! % &'""($ #% ! )'*+&#$! ,#$(-
"!,'&$% &!!" $! %)(&&#$!% )(" $.( $("% ! (/#% %$"'($%
%$#,#", 0#""#$1- "!,'&$! )"!&(%%2 ,!(% !$ (&(%%#"+1 &+',(
$(%$2 ! #++ )#"#($("%-
IN2−
IN1−
GND
BYPASS
VO1
GND
(A1)
VDD
S
HUTDOWN
VO2
ZQY PACKAGE
(TOP VIEW)
(B1)
(C1)
(D1)
(A4)
(B4)
(C4)
(D4)

    
  
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
AVAILABLE OPTIONS
TA
PACKAGED DEVICE
MSOP
BGA
T
ASMALL OUTLINE (D) MSOP (DGK) BGA (ZQY)
MSOP
SYMBOLIZATION
BGA
SYMBOLIZATION
−40°C to 85°C TPA6101A2D TPA6101A2DGK TPA6101A2ZQYR AJM AAQI
Terminal Functions
TERMINAL
NO.
I/O
DESCRIPTION
NAME D,
DGK ZQY
I/O
DESCRIPTION
BYPASS 1 A1 I Tap to voltage divider for internal mid-supply bias supply . BYPASS is set at VDD/4. Connect to a 0.1-µF
to 1-µF low-ESR capacitor for best performance.
GND 2 B1 GND is the ground connection.
IN1− 8 A4 I IN1− is the inverting input for channel 1.
IN2− 4 D1 I IN2− is the inverting input for channel 2.
SHUTDOWN 3 C1 I Active-low input. When held low, the device is placed in a low-supply-current mode.
VDD 6 C4 VDD is the supply voltage terminal.
VO1 7 B4 O VO1 is the audio output for channel 1.
VO2 5 D4 O VO2 is the audio output for channel 2.
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, VDD 4 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI 0.3 V to VDD + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation Internally Limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating junction temperature range, TJ −40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE TA 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING
D710 mW 5.68 mW/°C454 mW 369 mW
DGK 469 mW 3.75 mW/°C300 mW 244 mW
ZQY 2 W 17.1 mW/°C1.28 W 1.04 W
recommended operating conditions
MIN MAX UNIT
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Supply voltage, VDD
ÁÁÁÁÁ
ÁÁÁÁÁ
1.6
ÁÁÁÁÁ
ÁÁÁÁÁ
3.6
V
ÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁ
High-level input voltage, VIH (SHUTDOWN)
ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
0.6 VDD
ÁÁÁÁÁ
ÁÁÁÁÁ
V
ÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁ
Low-level input voltage, VIL (SHUTDOWN)
ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
0.25 VDD
V
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Operating free-air temperature, TA
ÁÁÁÁÁ
ÁÁÁÁÁ
–40
ÁÁÁÁÁ
ÁÁÁÁÁ
85
°C

    
  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
dc electrical characteristics at TA = 25°C, VDD = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOO Output offset voltage AV = 2 dB 5 40 mV
PSRR Power supply rejection ratio VDD = 3 V to 3.6 V 72 dB
IDD Supply current SHUTDOWN = 3.6 V 0.75 1.5 mA
IDD(SD) Supply current in SHUTDOWN mode SHUTDOWN = 0 V 50 250 nA
|IIH|High-level input current (SHUTDOWN) VDD = 3.6 V, VI = VDD 1µA
|IIL|Low-level input current (SHUTDOWN) VDD = 3.6 V, VI = 0 V 1µA
ZIInput impedance 80 k
ac operating characteristics, VDD = 3.3 V, TA = 25°C, RL = 16
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
G Gain 2 dB
POOutput power (each channel) THD 0.1%, f = 1 kHz 50 mW
THD+N Total harmonic distortion + noise PO = 45 mW, 20 Hz−20 kHz 0.4%
BOM Maximum output power BW THD < 0.5% > 20 kHz
kSVR Supply ripple rejection ratio f = 1 kHz 47 dB
SNR Signal-to-noise ratio PO = 50 mW 86 dB
VnNoise output voltage (no-noise weighting filter) 45 µV(rms)
ac operating characteristics, VDD = 3.3 V, TA = 25°C, RL = 32
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
G Gain 2 dB
POOutput power (each channel) THD 0.1%, f = 1 kHz 35 mW
THD+N Total harmonic distortion + noise PO = 30 mW, 20 Hz−20 kHz 0.4%
BOM Maximum output power BW THD < 0.4% >20 kHz
kSVR Supply ripple rejection ratio f = 1 kHz 47 dB
SNR Signal-to-noise ratio PO = 30 mW 86 dB
VnNoise output voltage (no-noise weighting filter) 50 µV(rms)

    
  
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
dc electrical characteristics at TA = 25°C, VDD = 1.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOO Output offset voltage AV = 2 dB 5 40 mV
PSRR Power supply rejection ratio VDD = 1.4 V to 1.8 V 80 dB
IDD Supply current SHUTDOWN = 1.6 V 0.65 1.2 mA
IDD(SD) Supply current in SHUTDOWN mode SHUTDOWN = 0 V 50 250 nA
|IIH|High-level input current (SHUTDOWN) VDD = 1.6 V, VI = VDD 1µA
|IIL|Low-level input current (SHUTDOWN) VDD = 1.6 V, VI = 0 V 1µA
ZIInput impedance 80 k
ac operating characteristics, VDD = 1.6 V, TA = 25°C, RL = 16
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
G Gain 2 dB
POOutput power (each channel) THD 0.5%, f = 1 kHz 10 mW
THD+N Total harmonic distortion + noise PO = 9.5 mW, 20 Hz−20 kHz 0.06%
BOM Maximum output power BW THD < 1% > 20 kHz
kSVR Supply ripple rejection ratio f = 1 kHz 47 dB
SNR Signal-to-noise ratio PO = 10 mW 82 dB
VnNoise output voltage (no-noise weighting filter) 32 µV(rms)
ac operating characteristics, VDD = 1.6 V, TA = 25°C, RL = 32
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
G Gain 2 dB
POOutput power (each channel) THD 0.5%, f = 1 kHz 7.5 mW
THD+N Total harmonic distortion + noise PO = 6.5 mW, 20 Hz−20 kHz 0.05%
BOM Maximum output power BW THD < 1% >20 kHz
kSVR Supply ripple rejection ratio f = 1 kHz 47 dB
SNR Signal-to-noise ratio PO = 7.5 mW 84 dB
VnNoise output voltage (no-noise weighting filter) 32 µV(rms)
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Frequency 1, 3, 5, 7, 9, 11
THD+N Total harmonic distortion plus noise vs Output power 2, 4, 6, 8, 10, 12
THD+N
Total harmonic distortion plus noise
vs Output voltage 13, 14
POOutput power vs Load resistance 15, 16
kSVR Supply ripple rejection ratio vs Frequency 17, 18
Vn Output noise voltage vs Frequency 19, 20
Crosstalk vs Frequency 21, 22
Closed−loop gain and phase vs Frequency 23, 24, 25, 26
IDD Supply current vs Supply voltage 27
PDPower dissipation vs Output power 28

    
  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 1
0.001
10
0.01
0.1
1
20 20 k100 1 k 10 k
THD+N − Total Harmonic Distortion Plus Noise − %
f − Frequency − Hz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
VDD = 1.6 V
PO = 9.5 mW
CB = 1 µF
RL = 16
Figure 2
0.001
10
0.01
0.1
1
140510
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 1.6 V
CB = 1 µF
RL = 16
f = 1 kHz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
PO − Output Power − mW
0.001
0.01
0.1
1
Figure 3
10
20 20 k100 1 k 10 k
THD+N − Total Harmonic Distortion Plus Noise − %
f − Frequency − Hz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
VDD = 1.6 V
PO = 6.5 mW
CB = 1 µF
RL = 32
0.001
0.01
0.1
1
Figure 4
10
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 1.6 V
CB = 1 µF
RL = 32
f = 1 kHz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
PO − Output Power − mW
140510

    
  
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0.001
0.01
0.1
1
10
20 20 k100 1 k 10 k
THD+N − Total Harmonic Distortion Plus Noise − %
f − Frequency − Hz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
VDD = 1.6 V
PO = 4.5 mW
CB = 1 µF
RL = 50
Figure 5
0.001
10
0.01
0.1
1
140510
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 1.6 V
CB = 1 µF
RL = 50
f = 1 kHz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
PO − Output Power − mW
Figure 6
0.001
0.01
0.1
1
Figure 7
10
20 20 k100 1 k 10 k
THD+N − Total Harmonic Distortion Plus Noise − %
f − Frequency − Hz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
VDD = 3.3 V
PO = 45 mW
CB = 1 µF
RL = 16
Figure 8
0.001
10
0.01
0.1
1
1 20010 100
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V
CB = 1 µF
RL = 16
f = 1 kHz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
PO − Output Power − mW

    
  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0.001
0.01
0.1
1
Figure 9
10
20 20 k100 1 k 10 k
THD+N − Total Harmonic Distortion Plus Noise − %
f − Frequency − Hz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
VDD = 3.3 V
PO = 30 mW
CB = 1 µF
RL = 32
Figure 10
0.001
10
0.01
0.1
1
1 20010 100
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V
CB = 1 µF
RL = 32
f = 1 kHz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
PO − Output Power − mW
0.001
0.01
0.1
1
Figure 11
10
20 20 k100 1 k 10 k
THD+N − Total Harmonic Distortion Plus Noise − %
f − Frequency − Hz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
VDD = 3.3 V
PO = 20 mW
CB = 1 µF
RL = 50
Figure 12
0.001
10
0.01
0.1
1
1 20010 100
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V
CB = 1 µF
RL = 50
f = 1 kHz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
PO − Output Power − mW

    
  
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 13
0.001
10
0.01
0.1
1
010.1 0.5
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 1.6 V
RL = 10 k
CB = 1 µF
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT VOLTAGE
VO − Output Voltage − V
0.2 0.3 0.4 0.6 0.7 0.8 0.9
Figure 14
0.001
10
0.01
0.1
1
0 0.2 0.4 0.6 0.8 1 1.2 1.4
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V
RL = 10 k
CB = 1 µF
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT VOLTAGE
VO − Output Voltage − V
Figure 15
0
3
6
9
12
15
16 20 24 28 32 36 40 44 48 50
Channel 1
Channel 2
− Output Power − mW
OUTPUT POWER
vs
LOAD RESISTANCE
PO
RL − Load Resistance −
VDD = 1.6 V
THD+N = 1%
Mode = Stereo
Figure 16
0
25
50
75
100
125
150
16 20 24 28 32 36 40 44 48 50
Channel 1
Channel 2
− Output Power − mW
OUTPUT POWER
vs
LOAD RESISTANCE
PO
RL − Load Resistance −
VDD = 3.6 V
THD+N = 1%
Mode = Stereo

    
  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 17
−140
0
−130
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20 k100 1 k 10 k
− Supply Ripple Rejection Ratio − dB
f − Frequency − Hz
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
VDD = 1.6 V
CB = 1 µF
RL = 32
kSVR
Figure 18
−140
0
−130
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20
k
100 1 k 10 k
− Supply Ripple Rejection Ratio − dB
f − Frequency − Hz
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
VDD = 3.3 V
CB = 1 µF
RL = 32
kSVR
Figure 19
1
100
10
20 20 k100 1 k 10 k
− Output Noise Voltage −
f − Frequency − Hz
OUTPUT NOISE VOLTAGE
vs
FREQUENCY
VDD = 1.6 V
CB = 1 µF
RL = 16
VnVµ(rms)
Figure 20
1
100
10
20 20 k100 1 k 10 k
− Output Noise Voltage −
f − Frequency − Hz
OUTPUT NOISE VOLTAGE
vs
FREQUENCY
VDD = 3.3 V
CB = 1 µF
RL = 16
VnVµ(rms)

    
  
10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 21
−140
0
−130
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20 k100 1 k 10 k
Crosstalk − dB
f − Frequency − Hz
CROSSTALK
vs
FREQUENCY
VDD = 1.6 V
PO = 4.5 mW
RL = 50
Figure 22
−140
0
−130
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20 k100 1 k 10 k
Crosstalk − dB
f − Frequency − Hz
CROSSTALK
vs
FREQUENCY
VDD = 3.3 V
PO = 20 mW
RL = 50
−60
−50
−40
−30
−20
−10
0
10
20
30
40
10 100 1 k 10 k 100 k 1 M 10 M 100 M
Phase
Gain
VDD = 1.6 V
RL = 16
TA = 25°C
Closed-Loop Gain − dB
f − Frequency − Hz
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
Phase
Figure 23
180°
−180°
60°
−60°
150°
120°
30°
−30°
−120°
−150°
−90°
0°
90°

    
  
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
−60
−50
−40
−30
−20
−10
0
10
20
30
40
10 100 1 k 10 k 100 k 1 M 10 M 100 M
Phase
Gain
VDD = 1.6 V
RL = 32
TA = 25°C
Closed-Loop Gain − dB
f − Frequency − Hz
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
Phase
Figure 24
180°
−180°
60°
−60°
150°
120°
30°
−30°
−120°
−150°
−90°
0°
90°
−60
−50
−40
−30
−20
−10
0
10
20
30
40
10 100 1 k 10 k 100 k 1 M 10 M 100 M
Phase
Gain
VDD = 3.3 V
RL = 16
TA = 25°C
Closed-Loop Gain − dB
f − Frequency − Hz
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
Phase
Figure 25
180°
−180°
60°
−60°
150°
120°
30°
−30°
−120°
−150°
−90°
0°
90°

    
  
12 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
−60
−50
−40
−30
−20
−10
0
10
20
30
40
10 100 1 k 10 k 100 k 1 M 10 M 100 M
Phase
Gain
VDD = 3.3 V
RL = 32
TA = 25°C
Closed-Loop Gain − dB
f − Frequency − Hz
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
Phase
Figure 26
180°
−180°
60°
−60°
150°
120°
30°
−30°
−120°
−150°
−90°
0°
90°
Figure 27
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6
TA = 125°C
TA = 25°C
TA = −40°C
− Supply Current − mA
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
IDD
VDD − Supply Voltage − V
VDD Low-to-High
TA = 25°C
Figure 28
0
5
10
15
20
25
30
35
40 16
32
50
0102030
− Power Dissipation − mW
POWER DISSIPATION
vs
OUTPUT POWER
40 50 60 70
PO − Output Power − mW
PD
VDD = 3.3 V

    
  
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
input capacitor, CI
In the typical application, an input capacitor (CI) is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and RI form a high-pass filter with the corner frequency
determined in equation 1. RI is set internally and is fixed at 80 kΩ.
(1)
fc+1
2pRICI
The value of CI is important to consider , as it directly af fects the bass (low-frequency) performance of the circuit.
Consider the example where the specification calls for a flat bass response down to 20 Hz. Equation 1 is
reconfigured as equation 2.
(2)
CI+1
2pRIfc
In this example, CI is approximately 0.1 µF. A further consideration for this capacitor is the leakage path from
the input source through the input network (RI, CI) and the feedback resistor (RF) to the load. This leakage
current creates a dc-offset voltage at the input to the amplifier that reduces useful headroom. For this reason,
a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive
side of the capacitor should face the amplifier input in most applications, as the dc level there is held at VDD/4,
which is likely higher than the source dc level. It is important to confirm the capacitor polarity in the application.
power supply decoupling, CS
The T PA6101A2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved b y using two capacitors of different types that target dif ferent types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance
(ESR) ceramic capacitor, typically 0.1 µF, placed as close as possible to the device VDD lead, works best. For
filtering lower-frequency noise signals, a larger, aluminum electrolytic capacitor of 10 µF or greater placed near
the power amplifier is recommended.
midrail bypass capacitor, CB
The midrail bypass capacitor (CB) serves several important functions. During start-up, CB determines the rate
at which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it
can not be heard). The second function is to reduce noise produced by the power supply caused by coupling
into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor
is fed from a 55-k source inside the amplifier. To keep the start-up pop as low as possible, the relationship
shown in Euation 3 should be maintained.
(3)
1
ǒCB 55 kǓv1
ǒCIRIǓ
As an example, consider a circuit where CB is 1 µF, CI is 0.1 µF, and RI is 80 k. Inserting these values into
Euation 3 results in: 18.18 125 which satisfies the rule. Bypass capacitor (CB) values of 0.47 µF to 1 µF and
ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance.

    
  
14 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
output coupling capacitor, CC
In the typical single-supply, single-ended (SE) configuration, an output coupling capacitor (CC) is required to
block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling
capacitor, the output coupling capacitor and impedance of the load from a high-pass filter is governed by
Equation 4.
(4)
fc+1
2pRLCC
The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the
low-frequency corner higher. Large values of CC are required to pass low-frequencies into the load. Consider
the example where a CC of 68 µF is chosen and loads vary from 32 to 47 k. Table 1 summarizes the
frequency response characteristics of each configuration.
Table 1. Common Load Impedances vs Low-Frequency Output Characteristics in SE Mode
RLCCLOWEST FREQUENCY
32 68 µFĄ73 Hz
10,000 68 µF0.23 Hz
47,000 68 µF0.05 Hz
As Table 1 indicates, headphone response is adequate and drive into line-level inputs (a home stereo for
example) is very good.
The output coupling capacitor required in single-supply SE mode also places additional constraints on the
selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following
relationship:
(5)
1
ǒCB 55 kǓv1
ǒCIRIǓƠ1
RLCC
using low-ESR capacitors
Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply as
a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects
of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor
behaves like an ideal capacitor.
3.3-V versus 1.6-V operation
The TPA6101A2 was designed for operation over a supply range of 1.6 V to 3.6 V. There are no special
considerations for 1.6-V versus 3.3-V operation as far as supply bypassing, gain setting, or stability. Supply
current is slightly reduced from 0.75 mA (typical) to 0.65 mA (typical). The most important consideration is that
of output power. Each amplifier can produce a maxium output voltage swing within a few hundred millivolts of
the rails with a 10-k load. However, this voltage swing decreases as the load resistance decreases, and the
rDS(on) of the output stage transistors becomes more significant. For example, for a 32- load, the maximum
peak output voltage with VDD = 1.6 V is approximately 0.7 V with no clipping distortion. This reduced voltage
swing effectively reduces the maximum undistorted output power.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPA6101A2D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6101A2DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6101A2DGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6101A2DGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6101A2ZQYR ACTIVE BGA
MICROSTAR
JUNIOR
ZQY 15 2500 Green (RoHS
& no Sb/Br) SNAGCU Level-2-260C-1 YEAR
TPA6101A2ZQYRG1 ACTIVE BGA
MICROSTAR
JUNIOR
ZQY 15 2500 Green (RoHS
& no Sb/Br) SNAGCU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPA6101A2DGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPA6101A2ZQYR BGA MI
CROSTA
R JUNI
OR
ZQY 15 2500 330.0 8.4 2.8 2.8 1.25 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA6101A2DGKR VSSOP DGK 8 2500 358.0 335.0 35.0
TPA6101A2ZQYR BGA MICROSTAR
JUNIOR ZQY 15 2500 338.1 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
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