AUIRF7342Q
VDSS -55V
RDS(on) max. 0.105
ID -3.4A
Description
Specifically designed for Automotive applications, this cellular design of
HEXFET® Power MOSFETs utilizes the latest processing techniques
to achieve low on-resistance per silicon area. This benefit combined
with the fast switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use in Automotive
and a wide variety of other applications.
Features
Advanced Planar Technology
Low On-Resistance
Logic Level Gate Drive
Dual P Channel MOSFET
Dynamic dv/dt Rating
150°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Lead-Free, RoHS Compliant
Automotive Qualified *
1 2015-9-30
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
AUTOMOTIVE GRADE
Symbol Parameter Max. Units
VDS Drain-Source Voltage -55 V
ID @ TA = 25°C Continuous Drain Current, VGS @ -10V -3.4
A
ID @ TA = 70°C Continuous Drain Current, VGS @ -10V -2.7
IDM Pulsed Drain Current -27
PD @TA = 25°C Maximum Power Dissipation 2.0
W
PD @TA = 70°C Maximum Power Dissipation 1.3
Linear Dearating Factor 0.016 mW°/C
VGS Gate-to-Source Voltage ± 20 V
VGSM Gate-to-Source Voltage Single Pulse tp < 10µs 30
EAS Single Pulse Avalanche Energy (Thermally Limited) 114
mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJ Operating Junction and -55 to + 150 °C
TSTG Storage Temperature Range
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Thermal Resistance
Symbol Parameter Typ. Max. Units
°C/W
RJA Junction-to-Ambient ––– 62.5
SO-8
AUIRF7342Q
Base part number Package Type Standard Pack Orderable Part Number
Form Quantity
AUIRF7342Q SO-8 Tape and Reel 4000 AUIRF7342QTR
G D S
Gate Drain Source
D1
D1
D2
D2
G1
S2
G2
S1
Top View
8
1
2
3
45
6
7
AUIRF7342Q
2 2015-9-30
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 11)
Starting TJ = 25°C, L = 20mH, RG = 25, IAS = -3.4A. (See Fig. 8)
ISD -3.4A, di/dt 150A/µs, VDD V(BR)DSS, TJ 150°C.
Pulse width 300µs; duty cycle 2%.
When mounted on 1" square copper board , t 10sec.
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -55 ––– ––– V VGS = 0V, ID = -250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– -0.054 ––– V/°C Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 0.095 0.105  VGS = -10V, ID = -3.4A
––– 0.150 0.170 VGS = -4.5V, ID = -2.7A
VGS(th) Gate Threshold Voltage -1.0 ––– -3.0 V VDS = VGS, ID = -250µA
gfs Forward Trans conductance 3.3 ––– ––– S VDS = -10V, ID = -3.1A
IDSS Drain-to-Source Leakage Current ––– ––– -2.0 µA VDS = -55V, VGS = 0V
––– ––– -25 VDS = -55V,VGS = 0V,TJ =55°C
IGSS Gate-to-Source Forward Leakage ––– ––– -100 nA VGS = -20V
Gate-to-Source Reverse Leakage ––– ––– 100 VGS = 20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg Total Gate Charge ––– 26 38
nC
ID = -3.1A
Qgs Gate-to-Source Charge ––– 3.0 4.5
VDS = -44V
Qgd Gate-to-Drain Charge ––– 8.4 13 VGS = -10V, See Fig.10
td(on) Turn-On Delay Time ––– 14 22
ns
VDD = -28V
tr Rise Time ––– 10 15 ID = -1.0A
td(off) Turn-Off Delay Time ––– 43 64 RG = 6.0
tf Fall Time ––– 22 32 RD = 16
Ciss Input Capacitance ––– 690 –––
pF
VGS = 0V
Coss Output Capacitance ––– 210 ––– VDS = -25V
Crss Reverse Transfer Capacitance ––– 86 ––– ƒ = 1.0MHz, See Fig.9
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– -2.0
A
MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– -27 integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– ––– -1.2 V TJ = 25°C,IS = -2.0A,VGS = 0V 
trr Reverse Recovery Time ––– 54 80 ns TJ = 25°C ,IF = -2.0A,
Qrr Reverse Recovery Charge ––– 85 130 nC di/dt = 100A/µs 
AUIRF7342Q
3 2015-9-30
Fig. 2 Typical Output Characteristics
Fig. 3 Typical Output Characteristics
Fig. 1 Typical Output Characteristics
0.1 110 100 1000
-VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
-ID, Drain-to-Source Current (A)
VGS
TOP -15V
-12V
-10V
-8.0V
-4.5V
-4.0V
-3.5V
BOTTOM -3.0V
60µs PULSE WIDTH
Tj = -40°C
-3.0V
0.1 110 100 1000
-VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
-ID, Drain-to-Source Current (A)
VGS
TOP -15V
-12V
-10V
-8.0V
-4.5V
-4.0V
-3.5V
BOTTOM -3.0V
60µs PULSE WIDTH
Tj = 25°C
-3.0V
0.1 110 100 1000
-VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
-ID, Drain-to-Source Current (A)
-3.0V
60µs PULSE WIDTH
Tj = 150°C
VGS
TOP -15V
-12V
-10V
-8.0V
-4.5V
-4.0V
-3.5V
BOTTOM -3.0V
Fig. 4 Typical Transfer Characteristics
1 2 3 4 5 6 7
-VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
-ID, Drain-to-Source Current (A)
TJ = -40°C
TJ = 25°C
TJ = 150°C
VDS = -25V
60µs PULSE WIDTH
AUIRF7342Q
4 2015-9-30
Fig 5. Normalized On-Resistance
Vs. Temperature
Fig 6. Typical On-Resistance Vs. Drain
Current
Fig 8. Maximum Avalanche Energy
Vs. Drain Current
Fig. 7 Typical On-Resistance Vs. Gate Voltage
-60 -40 -20 020 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
T , Junction Temperature( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
-10V
-3.4 A
25 50 75 100 125 150
0
50
100
150
200
250
300
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
-1.5A
-2.7A
-3.4A
AUIRF7342Q
5 2015-9-30
Fig. 11 Typical Source-Drain Diode
Forward Voltage
Fig 9. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig. 12 Maximum Safe Operating Area
Fig 10. Typical Gate Charge Vs.
Gate-to-Source Voltage
1 10 100
0
240
480
720
960
1200
-V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss gs gd , ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
010 20 30 40
0
4
8
12
16
20
Q , Total Gate Charge (nC)
-V , Gate-to-Source Voltage (V)
G
GS
I =
D-3.1A
V =-12V
DS
V =-30V
DS
V =-48V
DS
0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4
-VSD, Source-to-Drain Voltage (V)
1.0
10
100
-ISD, Reverse Drain Current (A)
VGS = 0V
TJ = -40°C
TJ = 25°C
TJ = 150°C
110100
-VDS , Drain-toSource Voltage (V)
0.1
1
10
100
-ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
AUIRF7342Q
6 2015-9-30
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig 13. Maximum Drain Current vs.
Ambient Temperature
25 50 75 100 125 150
TA , Ambient Temperature (°C)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
-ID, Drain Current (A)
0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10 100
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJA A
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJA
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
AUIRF7342Q
7 2015-9-30
SO-8 Part Marking Information
SO-8 Package Outline (Dimensions are shown in millimeters (inches)
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX
MILLIMETERSIN C H ES
MIN MAX
DIM
e
c .0075 .0098 0.19 0.25
.025 BASIC 0.635 BASIC
87
5
65
D B
E
A
e
6X
H
0.25 [.010] A
6
7
K x 45°
8X L 8X c
y
0.25 [.010] C AB
e1
A
A1
8X b
C
0.10 [.004]
4312
FOOTPRINT
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050]
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
N O TES:
1. D IM EN SIO N IN G & TO LERAN C IN G PER ASM E Y14.5M -1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIM ETERS [INCHES].
5 DIM EN SIO N D O ES N O T INC LU D E M O LD PRO TRUSIO N S.
6 DIM EN SIO N D O ES N O T INC LU D E M O LD PRO TRUSIO N S.
M O LD PRO TRU SIO N S N O T TO EXC EED 0.25 [.010].
7 D IM EN SIO N IS TH E LEN G TH O F LEAD FO R SO LD ER IN G TO
A S U B S T R A T E .
M O LD PRO TRU SIO N S N O T TO EXC EED 0.15 [.006].
8X 1.78 [.070]
AUIRF7342Q
8 2015-9-30
SO-8 Tape and Reel (Dimensions are shown in millimeters (inches)
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
AUIRF7342Q
9 2015-9-30
Qualification Information
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
Moisture Sensitivity Level SO-8 MSL1
ESD
Machine Model Class M2 (+/- 200V)
AEC-Q101-002
Human Body Model Class H1A (+/- 500V)
AEC-Q101-001
Charged Device Model Class C5 (+/- 1125V)
AEC-Q101-005
RoHS Compliant Yes
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
Revision History
Date Comments
9/30/2015  Updated datasheet with corporate template
 Corrected ordering table on page 1.
3/27/2014  Added "Logic Level Gate Drive" bullet in the features section on page 1
 Updated data sheet with new IR corporate template
† Highest passing voltage.