www.ti.com
FEATURES DESCRIPTION
BLOCK DIAGRAM
15
7
6
16
VIN REFERENCE
VREF
+5V TO ALL
INTERNAL
RT
CT
OSC
(RAMP)
3
OSC OUT
Q
Q
R
+5V 12
11
CA
EA
13
14
CB
EB
9
+5V
5
4
–SENSE
+SENSE
C L
COMPENSATION
10k
1k
10
8
GROUND
+
–
+5V
E A
1
2
INV INPUT
NI INPUT
COMPARATOR
SHUTDOWN
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
ADVANCED REGULATING PULSE WIDTH MODULATORS
•Complete PWM Power Control Circuitry
The UC1524, UC2524 and UC3524 incorporate on asingle monolithic chip all the functions required for the•Uncommitted Outputs for Single-Ended or
construction of regulating power supplies, inverters orPush-Pull Applications
switching regulators. They can also be used as the•Low Standby Current . . . 8 mA Typical
control element for high-power-output applications.•Interchangeable With SG1524, SG2524 and
The UC1524 family was designed for switchingSG3524, Respectively
regulators of either polarity, transformer-coupleddc-to-dc converters, transformerless voltage doublersand polarity converter applications employing fixed-frequency, pulse-width modulation techniques. Thedual alternating outputs allow either single-ended orpush-pull applications. Each device includes anon-chip reference, error amplifier, programmableoscillator, pulse-steering flip-flop, two uncommittedoutput transistors, a high-gain comparator, andcurrent-limiting and shut-down circuitry. The UC1524is characterized for operation over the full militarytemperature range of –55 °C to 125 °C. The UC2524and UC3524 are designed for operation from –25 °Cto 85 °C and 0 °C to 70 °C, respectively.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
www.ti.com
CONNECTION DIAGRAM
+
–
+
–
OSCILLATOR
S/D
REFERENCE
REGULATOR
12345678
16 15 14 13 12 11 10 9
ERROR
AMP
CURRENT
AMP
VREF VIN EBCBCAEAS/D COMP
INV INPUT NON INV
INPUT
OSC OUT CL
SENSE(+)
CL
SENSE (–-)
RT
GND
CT
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
over operating free-air temperature range (unless otherwise noted)
UNIT
V
CC
Supply voltage
(1) (2)
40 VCollector output current 100 mAReference output current 50 mACurrent through C
T
terminalg –50 mAT
A
= 25 °C
(3)
1000 mWPower dissipation
T
C
= 25 °C
(3)
2000 mWOperating junction temperature range –55 °C to 150 °CStorage temperature range –65 °C to +150 °C
(1) All voltage values are with respect to the ground terminal, pin 8.(2) The reference regulator may be bypassed for operation from a fixed 5 V supply by connecting the V
CC
and reference output pins both tothe supply voltage. In this configuration the maximum supply voltage is 6 V.(3) Consult packaging section of data book for thermal limitations and considerations of package.
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
CC
Supply voltage 8 40 VReference output current 0 20 mACurrent through C
T
terminal –0.03 –2 mAR
T
Timing resistor 1.8 100 k ΩC
T
Timing capacitor 0.001 0.1 µFUC1524 –55 125Operating ambient temperature range UC2524 –25 85 °CUC3524 0 70
2
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ELECTRICAL CHARACTERISTICS
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
these specifications apply for T
A
= –55 °C to 125 °C for the UC1524, –25 °C to 85 °C for the UC2524, and 0 °C to 70 °C for theUC3524, V
IN
= 20 V, and f = 20 kHz, T
A
= T
J
, over operating free-air temperature range (unless otherwise noted)
UC1524/UC2524 UC3524PARAMETER TEST CONDITIONS UNITMIN TYP MAX MIN TYP MAX
REFERENCE SECTION
Output voltage 4.8 5.0 5.2 4.6 5.0 5.4 VLine regulation V
IN
= 8 V to 40 V 10 20 10 30 mVLoad regulation I
L
= 0 mA to 20 mA 20 50 20 50 mVRipple rejection f = 120 Hz, T
J
= 25 °C 66 66 dBShort circuit current limit V
REF
= 0, T
J
= 25 °C 100 100 mATemperature stability Over operating temperature range 0.3% 1% 0.3% 1%Long term stability T
J
= 125 °C, t = 1000 Hrs 20 20 mV
OSCILLATOR SECTION
Maximum frequency C
T
= 1 nF, R
T
= 2 k Ω300 300 kHzInitial accuracy R
T
and C
T
constant 5% 5%Voltage stability V
IN
= 8 V to 40 V, T
J
= 25 °C 1% 1%Temperature stability Over operating temperature range 5% 5%Output amplitude Pin 3, T
J
= 25 °C 3.5 3.5 VOutput pulse width C
T
= 0.01 mfd, T
J
= 25 °C 0.5 0.5 µs
ERROR AMPLIFIER SECTION
Input offset voltage V
CM
= 2.5 V 0.5 5 2 10 mVInput bias current V
CM
= 2.5 V 2 10 2 10 µAOpen loop voltage gain 72 80 60 80 dBCommon mode voltage T
J
= 25 °C 1.8 3.4 1.8 3.4 VCommon mode rejection ratio T
J
= 25 °C 70 70 dBSmall signal bandwidth A
V
= 0 dB, T
J
= 25 °C 3 3 MHzOutput voltage T
J
= 25 °C 0.5 3.8 0.5 3.8 V
COMPARATOR SECTION
Duty-cycle % Each output on 0% 45% 0% 45%Zero duty-cycle 1 1Input threshold VMaximum duty-cycle 3.5 3.5Input bias current 1 1 µA
CURRENT LIMITING SECTION
Sense voltage Pin 9 = 2 V with error amplifier set for 190 200 210 180 200 220 mVmaximum out, T
J
= 25 °CSense voltage T.C. 0.2 0.2 mV/ °CT
J
= –55 °C to 85 °C for the –1 V to 1 V limit –1 1 –1 1Common mode voltage VT
J
= 25 °C –0.3 1
OUTPUT SECTION (EACH OUTPUT)
Collector-emitter voltage 40 40 VCollector leakage current V
CE
= 40 V 0.1 50 0.1 50 µASaturation voltage I
C
= 50 mA 1 2 1 2 VEmitter output voltage V
IN
= 20 V 17 18 17 18 VRise Time R
C
= 2 k Ω, T
J
= 25 °C 0.2 0.2 µsFall Time R
C
= 2 k Ω, T
J
= 25 °C 0.1 0.1 µsTotal standby current (Note) V
IN
= 40 V 8 10 8 10 mA
3
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PRINCIPLES OF OPERATION
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
flip-flop, which is synchronously toggled by theThe UC1524 is a fixed-frequency pulse-width-modu-
oscillator output. The oscillator output pulse alsolation voltage regulator control circuit. The regulator
serves as a blanking pulse to assure both outputs areoperates at a frequency that is programmed by one
never on simultaneously during the transition times.timing resistor (R
T
), and one timing capacitor (C
T
), R
T
The width of the blanking pulse is controlled by theestablishes a constant charging current for C
T
. This
valve of C
T
. The outputs may be applied in aresults in a linear voltage ramp at C
T
, which is fed to
push-pull configuration in which their frequency is halfthe comparator providing linear control of the output
that of the base oscillator Note that for buck regulatorpulse width by the error amplifier. The UC1524
topologies, the two outputs can be wire-ORed for ancontains an on-board 5 V regulator that serves as a
effective 0-90% duty cycle range. With thisreference as well as powering the UC1524’s internal
connection, the output frequency is the same as thecontrol circuitry and is also useful in supplying
oscillator frequency. The output of the error amplifierexternal support functions. This reference voltage is
shares a common input to the comparator with thelowered externally by a resistor divider to provide a
current limiting and shutdown circuitry and can bereference within the common-mode range of the error
overridden by signals from either of these inputs. Thisamplifier or an external reference may be used. The
common point is also available externally and may bepower supply output is sensed by a second resistor
employed to control the gain of, or to compensate,divider network to generate a feedback signal to the
the error amplifier or to provide additional control toerror amplifier. The amplifier output voltage is then
the regulator.compared to the linear voltage ramp at C
T
. Theresulting modulated pulse out of the high-gaincomparator is then steered to the appropriate outputpass transistor (Q
1
or Q
2
) by the pulse-steering
4
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TYPICAL CHARACTERISTICS
40
30
10
−10
100 1 k 10 k 100 k
Open-Loop Voltage Amplification −dB
60
70
f−Frequency −Hz
90
1 M 10 M
0
20
50
80
RF=VIN= 20 V
TJ= 25 C
RF= 1M
RF= 300 k
RF= 100 k
RF= 30 k
RFis Resistance From
Pin 9 to Ground
NOTE: Value of RFBelow 30 kW
Will Began to Limit Maximum Duty-Cycle
10 k
1 k
100
12510 20
Osscilator Frequency −Hz
100 k
1 M
50 100
RT−Timing Resistor −kW
VIN= 20 V
TJ= 25 C
CT= 0.001 mF
CT= 0.003 mF
CT= 0.01 mF
CT= 0.003 mF
CT= 0.1 mF
1
0.4
0.1
0.001 0.004 0.01
Output Dead Time −
4
10
0.04 0.1
µs
CT−Capacitance −F
VIN= 20 V
TJ= 25 C
NOTE: Dead Time = Blanking Pulse Width
Plus Outplay Delay
2
1.5
0.5
0
020 40 60
Collector-To-Emitter Voltage −V
2.5
3.5
Load Current −mA
4
80 100
1
3
VCC= 20 V
TJ= 125 C
TJ= 25 C
TJ=−55 C
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
OPEN-LOOP VOLTRAGE AMPLIFICATION OSCILLATOR FREQUENCYOF ERROR AMPLIFIER vsvs TIMING COMPONENTSFREQUENCY
Figure 1. Figure 2.
OUTPUT DEAD TIME OUTPUT SATURATION VOLTAGEvs vsTIMING CAPACITANCE VALUE LOAD CURRENT
Figure 3. Figure 4.
5
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APPLICATION INFORMATION
OSCILLATOR SYNCHRONOUS OPERATIONS
f1.18
RTCT
(1)
BLANKING
V+
+28 V
V−
1
2
16
6
7
3
10
15
12
11
13
14
4
5
9
9
5 k
R2
5 k
5 k
0.1 mF5 k
3 k
0.02 mF
500 mF
1.5 k
0.001 mF
50 k
0.1
UC1524
PIC600
+5V, 5A
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
The oscillator controls the frequency of the UC1524 When an external clock is desired, a clock pulse ofand is programmed by R
T
and C
T
according to the approximately 3 V can be applied directly to theapproximate formula: oscillator output terminal. The impedance to groundat this point is approximately 2 k Ω. In thisconfiguration R
T
C
T
must be selected for a clockperiod slightly greater than that of the external clock.where
If two or more UC1524 regulators are to operatedR
T
is in k Ω
synchronously, all oscillator output terminals shouldbe tied together, all C
T
terminals connected to singleC
T
is in µF
timing capacitor, and the timing resistor connected tof is in kHz
a single R
T
, terminal.Practical values of C
T
fall between 1 nF and 100 nF.Practical values of R
T
fall between 1.8 k Ωand 100kΩ. This results in a frequency range typically from120 Hz to 500 kHz.
The output pulse of the oscillator is used as ablanking pulse at the output. This pulse width is
Figure 5. Error Amplifier Clampcontrolled by the value of C
T
. If small values of C
T
arerequired for frequency control, the oscillator outputpulse width may still be increased by applying a shunt
The other R
T
terminals can be left open or shorted tocapacitance of up to 100 pF from pin 3 to ground. If
V
REF
. Minimum lead lengths should be used betweenstill greater dead-time is required, it should be
the C
T
terminals.accomplished by limiting the maximum duty cycle byclamping the output of the error amplifier. This caneasily be done with the circuit in Figure 5 .
Figure 6. Single-Ended LC Switching Regulator Circuit
6
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1
2
15
INV INPUT
NON INV INPUT
16
6
VREF
RT
7
3
10
12
11
13
4
5
9
CA
EA
CB
EB
CLSENSE(+)
CLSENSE(−)
COMP
8
GND
+
2N4150
2N4150
20T
20T
5T
5T
CT
SD
OSC OUT
14
5 k
V+
+28 V
VIN
UC1524
1 k
1 W
1 k
1 W
100
100
0.001 mF
500 mF
50 k
0.1 k
1500 mF
5 V
5 A
5 k
2 k
0.1 mF
0.1 mF
5 k
5 k
IS
VIN
Osc. OUT
VREF
VIN
8-40 V
15
3
16 86721910 454
11
13
12
2 k
1 W
2 k
1 W
0.1 R1 C1
RAMP N.I.
INPUT
INV.
INPUT COMP SHUT
Down
CURRENT
LIMET
2 k 2 k 10 k
1 k
1 k
10 k
OUTPUT
UC1524
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
Figure 7. Push-Pull Transformer Coupled Circuit
Figure 8. Open Loop Test Circuit
7
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
UC1524J OBSOLETE CDIP J 16 TBD Call TI Call TI
UC1524J/80937 OBSOLETE CDIP J 16 TBD Call TI Call TI
UC1524J883B OBSOLETE CDIP J 16 TBD Call TI Call TI
UC2524DW ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2524DWG4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2524J OBSOLETE CDIP J 16 TBD Call TI Call TI
UC2524N ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
UC2524NG4 ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
UC3524D ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3524DG4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3524DW ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3524DWG4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3524DWTR ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3524DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3524J OBSOLETE CDIP J 16 TBD Call TI Call TI
UC3524N ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
UC3524NG4 ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 1
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UC3524DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UC3524DWTR SOIC DW 16 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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