ByNational TL/F/10048-1 Connection Diagrams August 1990 Semiconductor Low Power Triple 4-Input Multiplexer with Enable General Description Features The F100371 contains three 4-input multiplexers which 35% power reduction of the F100171 share a common decoder (inputs Sg and S;). Output buffer 2000V ESD protection gates provide true and complement outputs. A HIGH on the = =Pin/function compatible with F100171 Enable input (E) forces all true outputs LOW (see Truth Ta- gm Voltage compensated operating range = 4.2V to ble). All inputs have 50 kQ. pull-down resistors. 5.7V Logic Symbol | | | | | | | | | | | | Pin Names Description ts, E low Ita Ve Ia bod tid Fan tab boc he bee lac lox!3x Date Inputs _i. So, $4 Select Inputs ' moh Ok E Enable Input {Active LOW) 7 | 7 | 7 Za-Ze Data Outputs Za-Ze Compiementary Data Outputs TL/F/10048-2 24-Pin DIP 24-Pin Quad Cerpak 28-Pin PCC 7 yb lob Yee Sy So Im toe taers on Zn Za eq! 24 Flo. Liilpetld i 1 (9) 2) GG) Ise] 2 23 Is, 24 23 22 21 20 19 [Nal al Nal had hal) Isp3 22a, lon 41 18 Pigg 7414 21bt, is, 42 17 low 7.45 20 Fly, loc 3 16 Flin Vec46 19F-E le y4 15 Flog Yeca 7 185-Vr_ lag 45 rn Za 74-48 17s, I5 ~] 6 re 2 z,-49 16s 7 8 9 10 11 12 wb 0 Trrsrtyt 15) 20 Gil Ba 6S Bo Bs Zqy'0 1ST Isa Z, 2 VeeVocaZy 2b lop byt loeV EES te !2e 56 24H " i4 lon TL/F/10048-3 TL/F/10148-4 loa] 12 13kl,, 1990 National Semiconductor Corporation TL/F/10148 | RAD-B20M80/Printed in U. S. A. aiqeuy YM Jexaldninw induj-p aid 4aMod MOF |} ZE0014Logic Diagram lap lio fob l2a Na loa $1 So Truth Table Inputs Outputs E So Sy Zn L L L lox L H L Ity L L H lox L H H lay H x xX L H = HIGH Voltage Levet L = LOW Voltage Level X = Don't Care TL/F/10148-5Absolute Maximum Ratings Recommended Operating Above which the useful life may be impaired. (Note 1) Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales case veomperature (Tc) OC to + 85C Ottice/ Distributors for availability and specifications, Military 55C to + 125C Storage Temperature (Tsta) 65C to + 150C Supply Voltage (Vee) Maximum Junction Temperature (Ty) Commercial 5.7V to 4.2V Ceramic + 175C Military 5.7V to 4.2V Plastic + 150C Veg Pin Potential to Ground Pin 7.0V to +0.5V Input Voltage (DC) Veg to +0.5V Output current (DC Output HIGH) 50 mA ESD (Note 2) 2 2000V Commercial Version DC Electrical Characteristics Vee = 4.2V to 5.7V, Voc = Veca = GND, Tc = 0C to + 85C (Note 3) Symbol Parameter Min Typ Max Units Conditions Vou Output HIGH Voltage 1025 955 870 mV Vin = Vin (Max) Loading with VoL Output LOW Voltage ~1830 | -1705 | 1620 mV or Vit (Min) 502 to 2.0V Vouc Output HIGH Voltage 1035 mV Vin = Vin (Min) Loading with Votc Output LOW Voltage 1610 mv or Vi, (Max) 502 to 2.0V Vin Input HIGH Voltage 14165 870 mV Guaranteed HIGH Signal for All Inputs VIL Input LOW Voltage 1830 _ 4475 mV Guaranteed LOW Signal for All Inputs Ne Input LOW Current 0.50 pA Vin = Vic (Min) liv Input HIGH Current lox-!gx 340 A Vin = Vin (Max) So, $1, E 300 lee Power Supply Current -75 -39 mA Inputs Open Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Note 3: The specified limits represent the worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under worst case conditions.Commercial Version (continued) Ceramic Dual-In-Line Package AC Electrical Characteristics Vee = 42V to 5.7V, Voc = Veca = GND =? = +95 = +85 Symbol Parameter Te = OC Te 25C Te 85C Units Conditions Min Max Min Max Min Max PLH Propagation Delay 045 1.50 | 045 1.50 | 045 1.60 ns tPHL lox!3x to Output teLH Propagation Delay Figures fand 2 0.90 2.40 0.90 2.40 1.00 . tPHL So, S; to Cutput 2.60 ns (Note 1) IPLH Propagation Delay = 0.65 2.30 0.65 2.30 0.75 2.40 ns teHL E to Output tTLH Transition Time . . 1.2 235 . . . } tre 20% to 80%, 80% to 20% 0.35 0 0.3 1.20 0.35 1.20 ns Figures 1 and 2 Note 1: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. PCC and Cerpak AC Electrical Characteristics Vee = 4.2V to 5.7V, Voc = Voca = GND =o = +25 = +85 Symbol Parameter Te = OC Tc 25 Tc Bs" Units Conditions Min Max Min Max Min Max PLH Propagation Delay 045 130 | 045 130 | 045 1.40 ns tpHL Iox-I3, to Output teLH Propagation Delay Figures 1 and 2 0.90 2.20 0. - 1.00 2.40 tpHL So, $1 to Output 90 2.20 ns (Note 2) PLH Propagation Delay 065 210 | 065 210 | 075 2.20 ns tPHL E to Output 'TLH Transition Time 035 110 | 035 4140 | 036 1.10 ns | Figures fand2 tre 20% to 80%, 80% to 20% 9 ts, G-G Skew, Gate to Gate TBD TBD TBD ps PCC Only (Note 1) Note 1: Gate to gate skew is defined as the difference in propagation delays between each of the outputs. Note 2: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.Military Version - Preliminary DC Electrical Characteristics Vee = 4.2V to 5.7V, Voc = Voca = GND, To = 55C to + 126C Symbol Parameter Min Max Units Te Conditions Notes Vou Output HIGH Voltage _ _ 0C to 1025 870 mV +4125C 1085 870 mv 55C Vin = V (Max) Loading with 123 Vv Output LOW Voltage 0C to Or VIL (Min) 50M to 2.0V - Ol 1830 | 1620 | mv ; + 125C 1830 ~~ 1555 mV 58C Vou Output HIGH Voltage _ 0Cc to 1035 mv + 125C 1085 mv 55C | Vin = Vin (Min) | Loading with 123 VoLc Output LOW Voltage 4610 | mv Octo | oF Vit (Max) 502 to 2.0V + 125C 1555 mV 55C Vin Input HIGH Voltage _ _ 55Cto | Guaranteed HIGH Signal M165 | 870 | mV | + 426%C | for All Inputs 12.3.4 VIL Input LOW Voltage _ _ 55C to | Guaranteed LOW Signal 1830 1475 mv + 125C for All Inputs 1,2,3,4 Ie Input LOW Current 0.50 pA 55C to | Veg = 4.2V 123 +125C Vin = Vit (Min) bie Input HIGH Current loxlax 340 A 0C to So, $1,E 300 Me +125C | Veg = 5.7V 123 loxlax 490 A 55C Vin = Vin (Max) So, S1,E 450 b IEE Power Supply Current 80 30 mA ; os to Inputs Open 1,23 Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals 55C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissapation after power-up. This provides cold start" specs which can be considered a worst case condition at cold temperatures. Note 2: Screen tested 100% on each device at 55C, + 25C, and + 125C, Subgroups 1, 2, 3, 7, and 8. Note 3: Sample tested (Method 5005, Table !) on each manufactured lot at 55C, + 25C, and + 125C, Subgroups 1, 2, 3, 7, and 8. Note 4: Guaranteed by applying specified input condition and testing Vou/Vo--Military Version - Preliminary (Continued) Ceramic Dual-In-Line Package AC Electrical Characteristics Vee = 4.2V to 5.7V, Voc = Veca = GND = 55 = + 95 = +4 Symbol Parameter Tc 55C Te 25r | Te 125C Units Conditions Notes Min Max Min Max Min Max 'PLH Propagation Delay 0.30 190 | 040 1.70 | 030 2.00 | ns tPHL loxl4x to Output , . , , , 'PLH Propagation Delay 0.40 2.70 | 060 240 | 050 290 | ns 4,2,3,5 tPHL So, S1 to Output Figures 1 and 2 'PLH Propagation Delay 0.50 2.70 | 060 240 | 050 290 | ns tPHL E to Output , , , , tTLH Transition Time tr 20% 10 80%, 80% toz0% | 220 160 | 030 1.50 | 0.20 1.60 ns 4 Cerpak AC Electrical Characteristics Vee = 42V to 5.7V, Voc = Voca = GND == = + 2 =+ o Symbol Parameter Te 58C Te 2sc | Te 125C Units Conditions Notes Min Max Min Max Min Max 'PLH Propagation Delay 0.30 1.90 | 040 1.70 | 030 2.00 | ns tPHL lox-'3x to Output , , , , , tpLH Propagation Delay 0.40 270 | 060 240] 050 2,90 ns 1,2,3,5 {PHL So, $1 to Output Figures 1 and 2 PLH Propagation Delay 0.50 270 | 060 240 | 050 290] ns tPHL E to Output , , , , tTLH Transition Time . . . , 1. tren 20% to 80%, 80% to 20% | 20 160 | 030 1.80 | 0.20 60 ns 4 Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals 55C}, then testing immediately after power-up. This provides cold start specs which can be considered a worst case condition at cold temperatures. Note 2: Screen tested 100% on each device at + 25C temperature only, Subgroup AQ. Note 3: Sample tested (Method 5005, Table 1} on each mfg. lot at + 25C, Subgroup A9, and at + 125C and 55C temperatures, Subgroups A10 and A11. Note 4: Not tested at + 25C, + 125C and ~ 55C temperature (design characterization data). Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.Test Circuitry Vee 04 uF im PULSE T x GENERATOR 24 23 22 21 20 19 Ma 18 - rv SCOPE 2 7 or CHAN A rI 3 6 e- I Rr 14 15 ) Notes: 5 1s 50 1) w Veo. Voca = +2V, Veg = 2.5V in SCOPE - : jE 13 vt CHAN B Li and L2 = equal length 500 impedance lines 7 8 9 10 11 12 Ry = 502 terminator internal to scope 500 50 1) IT Decoupling 0.1 uF from GND to Vec and Vee All unused outputs are loaded with 500 to GND 50 1 501) Rr CL = Fixture and stray capacitance < 3 pF Pin numbers shown are for flatpak; for DIP see logic symbol TL/F/10148-6 FIGURE 1. AC Test Circuit Switching Waveforms 0.7+0.1 ns e| a _ 0.7+0.1ns +1.05 V 80% INPUT 50% % 20% +0.31 V {pHi < e| ~ tPLH TRUE 50% OUTPUT tpLy - tpHe 30% 50% COMPLEMENT 20% ron . . a FIGURE 2. Propagation Delay and Transition Times TL/F/10148-~-7Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 100371 DB C QR Device Type (Basic) Lo Special Variations OR = Commercial Grade device with burn-in QB = Military grade device with environmental and burn-in processing. Package Code D = Ceramic Dual-in-Line F = Quad Cerpak Q = Plastic Leaded Chip Carrier (PCC) Temperature Range C = Commercial (0C to + 85C) M = Military ( 55C to + 125C)Physical Dimensions inches (millimeters) _ 1.215 el (30.86) 0.025 MAX 0.030 0.055 (0.635) {0.762 1.397) RAD RAD TYP 0.390 (9.906) , MAX ue 0.037 0.008 0.005 GLASS 0.055 +.0.005 (0.940+0.127) 0.400 0.430 0.180 (0.127) SEALANT (1.397 0.127) . 9.020 - 0.070 (10.16 10.92) (4.572) MIN (0.508 1.778) t MAX i \ a a ) | | ] A ry oy 78) Th A 86 94 4 he \ s5+5 \ son-201 TYP l TYP eis 0-203 0.305) 0.125 Tye 0.055 0.10040.010 0.018 + 0,003 3.175) 0.485 + 0.050 (1.397 (2.540-0.254) (0.457 +0.076) MIN (12.32 41.276) MAX TYP TYP SOTH ENDS J24E (REV G) 24-Lead Ceramic Dual-In-Line Package (D) NS Package Number J24E 6 SPACES AT 0.056 (1.270) 01390 (3.302) OA NOM 15 PEDESTAL O.410-0.430 {10.41 10.92) SQUARE (CONTACT DIMENSION) 0.026 0.013 0.018 0.032 0.040 (0.508) i (0.330 0.457) 0.1650.180 (0.8131 i iT TYP (4.191 4.572) 15 t t Lf 0.005 ons | - (0.1270.381) PIN NO. + { aq. 9.026 0.032. REF SQ 0.485 0.495 (12.32 12.57) SQUARE Note: Pedestal as shown on base is not available for F100K ECL products. t ores 6.118 IDENT t (0.660 0.813) ee . 813} (2.642 2.997) Leg 0.480 450 me 117.43) 43) 28-Lead Plastic Chip Carrier (Q) NS Package Number V284 z (.143} age V2BA (REV G?F 100371 Low Power Triple 4-Input Multiplexer with Enable Physical Dimensions inches (millimeters) (Continued) Lit. # 114926 0.370 0,004 0.006 le jae - ess 0,250 0.360 (9.398) 0.250 0.360 (0,102 0.152} (6.350 9.144) MIN SQUARE (6.350 9.144) TYP TYP PIN NO. 1 \ 24 23 22 21 20 19 ", 18 0 __]2 tt a _Ty3 6. a yA 8 _____ oO J5 J a 3B___ Q 789101112 ay 0.075 (1.905) 8 PLCS 0.016 -9.018 | MAX 0.035 0,050 i | (0.406 0.457) 0.050 0.005 (0.889 1.270) P eo Nv {1.270 20.927) 0.085 0.400 TYP (2.159) (10.16) MAX SQUARE MAX GLASS LIFE SUPPORT POLICY 24-Lead Ceramic Flatpak (F) NS Package Number W24B W24B {REV C) NATIONALS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. A Corporation GmbH P.O. Box 58090 Japan Ltd. 2900 Semiconductor Drive Industiestrasse 10 Sanseido Bldg. 5F 0-8080 Furstenfeidoruck 4-15 Nishi Shinjuku Santa Clara, CA 95052-8090 West Germany Shinjuku-Ky, Tot: (408) 721-5000 Tel: (0-81-41) 103-0 Tokyo 160, Japan TWX: (940) 339-9240 Telex: 527-4649 Tel: 3-299-7001 Fax: (08141) 103554 FAX: 3-299-7000 Hong Kong Ltd. Suite 513, Sth Fioor Chinachem Golden Plaza, 77 Mody Road, Tsimshatsui East, Kowloon, Hong Kong Tel: 3-7231290 Telex: 52896 NSSEA HX Fax: 3-3112536 Bo Grasi Ltda. Av. Brig. Faria Lima, 1383 6.0 Andor-Conj. 62 01451 Sao Paulo, SP, Brasil Tal: (55/14) 212-5066 Fax: (55/41) 211-1181 NSBR BR {Austraia) PTY, Ltd. ist Floor, 441 St. Kilda Ad. Melbourne, 3004 Victory, Australia Tet: (03) 267-5000 Fax: 61-3-2677458 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the nght al any tme without notice to change said circuitry and specifications. 10