1/9August 2002
STP20NM50FD
STB20NM50FD-1
N-CHANNEL 500V - 0.22Ω -20ATO-220/I
2
PAK
FDmesh™ Power MOSFET (with FAST DIODE)
(1)ISD ≤20A, di/dt ≤200A/µs, VDD ≤V(BR)DSS,T
j≤T
JMAX.
(*)Limited only by maximum temperature allowed
■TYPICAL RDS(on) = 0.22Ω
■HIGH dv/dt AND AVALANCHE CAPABILITIES
■100% AVALANCHE TESTED
■LOW INPUT CAPACITANCE AND GATE CHARGE
■LOW GATE INPUT RESISTANCE
■TIGHT PROCESS CONTROL AND HIGH
MANUFACTURING YIELDS
DESCRIPTION
The FDmesh™ associates all advantages of reduced
on-resistance and fast switching with an intrinsic fast-
recovery body diode. It is therefore strongly recom-
mended for bridge topologies, in particular ZVS phase-
shift converters.
APPLICATIONS
■ZVSPHASE-SHIFTFULLBRIDGECONVERTERS
FOR SMPS AND WELDING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
(•)Pulse width limited by safe operating area
TYPE VDSS RDS(on) Rds(on)*QgID
STP20NM50FD
STB20NM50FD-1 500V
500V <0.25Ω
<0.25Ω8.36 Ω*nC
8.36 Ω*nC 20 A
20 A
Symbol Parameter Value Unit
VDS Drain-source Voltage (VGS =0) 500 V
VDGR Drain-gate Voltage (RGS =20kΩ)500 V
VGS Gate- source Voltage ±30 V
IDDrain Current (continuos) at TC= 25°C 20 A
IDDrain Current (continuos) at TC= 100°C 14 A
IDM (●)Drain Current (pulsed) 80 A
PTOT Total Dissipation at TC= 25°C 192 W
Derating Factor 1.2 W/°C
dv/dt(1) Peak Diode Recovery voltage slope 20 V/ns
Tstg Storage Temperature –65 to 150 °C
TjMax. Operating Junction Temperature 150 °C
TO-220
123
I2PAK
(Tabless TO-220)
I
NTERNAL SCHEMATIC DIAGRAM
BestR
d
s
(
o
n
)
*Q
g
STP20NM50FD/STB20NM50FD-1
2/9
THERMAL DATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
ON (1)
DYNAMIC
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.
Rthj-case Thermal Resistance Junction-case Max 0.65 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
TlMaximum Lead Temperature For Soldering Purpose 300 °C
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax) 10 A
EAS Single Pulse Avalanche Energy
(starting Tj= 25 °C, ID=I
AR,V
DD =35V) 700 mJ
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID= 250 µA, VGS = 0 500 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS = Max Rating 1µA
V
DS = Max Rating, TC= 125 °C 10 µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS = ±30V ±100 nA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS,I
D= 250µA 345V
R
DS(on) Static Drain-source On
Resistance VGS =10V,I
D= 10A 0.22 0.25 Ω
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS >I
D(on) xR
DS(on)max,
ID= 10A 9S
C
iss Input Capacitance VDS =25V,f=1MHz,V
GS =0 1380 pF
Coss Output Capacitance 290 pF
Crss Reverse Transfer
Capacitance 40 pF
Coss eq. (2) Equivalent Output
Capacitance VGS =0V,V
DS = 0V to 400V 130 pF
RgGate Input Resistance f=1 MHz Gate DC Bias=0
Test Signal Level=20mV
Open Drain
2.8 Ω
3/9
STP20NM50FD/STB20NM50FD-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on) Turn-on Delay Time VDD =250V,I
D=10A
R
G= 4.7ΩVGS =10V
(see test circuit, Figure 3)
22 ns
trRise Time 20 ns
QgTotal Gate Charge VDD =400V,I
D= 20A,
VGS =10V 38 53 nC
Qgs Gate-Source Charge 18 nC
Qgd Gate-Drain Charge 10 nC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff) Off-voltage Rise Time VDD = 400V, ID=20A,
R
G=4.7Ω, VGS = 10V
(see test circuit, Figure 5)
6ns
t
f
Fall Time 15 ns
tcCross-over Time 30 ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 20 A
ISDM (2) Source-drain Current (pulsed) 80 A
VSD (1) Forward On Voltage ISD =20A,V
GS =0 1.5 V
trr Reverse Recovery Time ISD = 20 A, di/dt = 100A/µs,
VDD =60V,T
j= 150°C
(see test circuit, Figure 5)
245 ns
Qrr Reverse Recovery Charge 2 µC
IRRM Reverse Recovery Current 16 A
Safe Operating Area For TO-220 / I²PAK Thermal Impedance For TO-220 / I²PAK
STP20NM50FD/STB20NM50FD-1
4/9
Output Characteristics
Transconductance
Transfer Characteristics
Static Drain-source On Resistance
Capacitance Variations
Gate Charge vs Gate-source Voltage
5/9
STP20NM50FD/STB20NM50FD-1
Source-drain Diode Forward Characteristics
Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.
STP20NM50FD/STB20NM50FD-1
6/9
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
7/9
STP20NM50FD/STB20NM50FD-1
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
STP20NM50FD/STB20NM50FD-1
8/9
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098 0.106
B 0.7 0.93 0.027 0.036
B2 1.14 1.7 0.044 0.067
C 0.45 0.6 0.017 0.023
C2 1.23 1.36 0.048 0.053
D 8.95 9.35 0.352 0.368
e 2.4 2.7 0.094 0.106
E 10 10.4 0.393 0.409
L 13.1 13.6 0.515 0.531
L1 3.48 3.78 0.137 0.149
L2 1.27 1.4 0.050 0.055
L
L1
B2
B
D
EA
C2
C
A1
L2
e
P011P5/E
TO-262 (I
2
PAK) MECHANICAL DATA
9/9
STP20NM50FD/STB20NM50FD-1
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