7-249
9
VP0808
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Note: See Package Outline section for dimensions.
P-Channel Enhancement-Mode
Vertical DMOS FETs
Package Options
BVDSS /R
DS(ON) ID(ON)
BVDGS (max) (min) TO-92
-80V 5.0-1.1A VP0808L
Order Number / Package
Ordering Information
Absolute Maximum Ratings
Drain-to-Source Voltage BVDSS
Drain-to-Gate Voltage BVDGS
Gate-to-Source Voltage ± 30V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
* Distance of 1.6 mm from case for 10 seconds.
Applications
Motor controls
Converters
Amplifiers
Switches
Power supply circuits
Drivers (relays, hammers, solenoids, lamps, memories,
displays, bipolar transistors, etc.)
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral Source-Drain diode
High input impedance and high gain
Complementary N- and P-channel devices
TO-92
S G D
7-250
90%
10%
90%
90%
10% 10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
0V
V
DD
R
gen
0V
-10V
VP0808
Package ID (continuous)* ID (pulsed) Power Dissipation
θ
jc
θ
ja
°C/W °C/W
TO-92 -0.28A -3A 1W 125 170
*ID (continuous) is limited by max rated Tj.
Thermal Characteristics
Symbol Parameter Min Typ Max Unit Conditions
BVDSS Drain-to-Source Breakdown Voltage -80 V VGS= 0V, ID =-10µA
VGS(th) Gate Threshold Voltage -1.0 -4.5 V VGS = VDS, ID = -1mA
IGSS Gate Body Leakage -100 nA VGS = ±20V, VDS = 0V
IDSS Zero Gate Voltage Drain Current -10 VGS = 0V, VDS = Max Rating
-500 µAV
GS = 0V, VDS = Max Rating
TA = 125°C
ID(ON) ON-State Drain Current -1.1 A VGS = -10V, VDS = -15V
RDS(ON) Static Drain-to-Source ON-State Resistance 5.0 VGS = -10V, ID = -1A
GFS Forward Transconductance 200 m VDS = -10V, ID = -0.5A
CISS Input Capacitance 150
COSS Common Source Output Capacitance 60 pF
CRSS Reverse Transfer Capacitance 25
td(ON) Turn-ON Delay Time 15
trRise Time 40
td(OFF) Turn-OFF Time 30
tfFall Time 30
VSD Diode Forward Voltage Drop -1.2 V VGS = 0V, ISD = -0.9A
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Electrical Characteristics (@ 25°C unless otherwise specified)
ns VDD = -25V, ID = -0.5A
RGEN = 25
VGS = 0V, VDS = -25V
f = 1MHz
Switching Waveforms and Test Circuit