Semiconductor Group 1 1998-04-29
Operation modes forward (cw), reverse (ccw), brake high and brake low are invoked
from just two control pins with TTL/CMOS compatible levels. The combination of an
extremely low RDS ON and the use of a power IC package with low thermal resistance and
high thermal c apa city helps to minimize sy ste m po wer dissipation. A bloc ki ng c apac ito r
at the supply voltage is the only external circuitry due to the integrated freewheeling
diodes.
Overview
Features
Delivers up to 5 A continuous 6 A peak current
Optimized for DC motor management applications
Operates at supply voltages up to 40 V
•Very low RDS ON; typ. 200 m @25°C per switch
Output full short circuit protected
Overtemperature protection with hysteresis
and diagnosis
Short circuit and open load diagnosis
with open drain error flag
Undervoltage lockout
CMOS/TTL compatible inputs with hysteresis
No crossover current
Internal freewheeling diodes
Wide temperature range; 40 °C<Tj< 150 °C
Description
The TLE 5206-2 i s an integrated power H-bridge with
DMOS output stages for driving DC-Motors. The part is
built using the SIEMENS multi-technology process
SPT® which allows bipolar and CMOS control circuitry
plus DMOS power devices to exist on the same
monolithic structure.
Type Ordering Code Package
TLE 5206-2 Q67000-A9290 P-TO220-7-11
TLE 5206-2GP Q67006-A9239 P-DSO-20-10
TLE 5206-2G Q67006-A9323 P-TO263-7-1
TLE 5206-2S Q67000-A9326 P-TO220-7-12
5-A H-Bridge for DC-Motor Applications TLE 5206-2
Preliminary Data
P-TO220-7-11
P-DSO-20-10
P-TO263-7-1
P-TO220-7-12
TLE 5206-2
Semiconductor Group 2 1998-04-29
Figure 1 Pin Configuration (top view)
AEP02513
OUT1
EF
IN1
GND
IN2
S
V
OUT2
1234567
OUT2OUT1
7651234
IN2
GND
IN1
EF
S
V
AEP01991
TLE 5206-2G
TLE 5206-2S
AEP01680
1Ι12
11
S
V
1
2
3
4
20
5
19
6
18
7
17
8
16
9
15
10
14
13
GND
N.C.
V
S
N.C.
2Ι
GND
EF
Q1 Q2
GND GND
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
AEP01990
OUT1
EF
IN1
GND
IN2 OUT2
S
V
1234567
TLE 5206-2 TLE 5206-2GP
TLE 5206-2
Semiconductor Group 3 1998-04-29
Pin Definitions and Functions
Pin No.
P-TO220 Pin No.
P-DSO Symbol Function
17OUT1Output of channel 1; Short-circuit protected;
integrated freewheeling diodes for inductive loads.
28EFError flag; TTL/CMOS compatible output
for error detection; (open drain)
39IN1Control input 1;
TTL/CMOS compatible
41, 10,
11, 20 GND Ground;
internally connected to tab
512IN2Control input 2;
TTL/CMOS compatible
66, 15
VSSupply voltage; block to GND
714OUT2Output of channel 2; Short-circuit protected;
integrated freewheeling diodes for inductive loads.
2, 3, 4, 5,
16, 17, 18,
19
N.C. Not connected
TLE 5206-2
Semiconductor Group 4 1998-04-29
Figure 2 Block Diagram
Circuit Description
Input Circuit
The control inputs consist of TTL/CMOS-compatible schmitt-triggers with hysteresis.
Buffer amplifiers are driven by this stages.
Output Stages
The output stages consist of a DMOS H-bridge. Integrated circuits protect the outputs
against sh ort-circuit to ground an d to the su pply voltage. Po sitive and negati ve voltage
spikes, which occur when switching inductive loads, are limited by integrated
freewheeling diodes.
A monitoring circuit for ea ch output t ransistor det ects whet her the partic ular transito r is
active and in this case prevents the corresponding source transistor (sink transistor) from
conducting in sink operation (source operation). Therefore no crossover currents can
occur.
1
0
0
1
11
0
1
0
2
1
0
0
1
1
1
0
1
0
2
IN OUT
Error Flag
1
7
EF
IN1
IN2
2
3
5
4
6
OUT1
OUT2
GND
V
S
AEB02405
Diagnosis and Protection Circuit 1
Diagnosis and Protection Circuit 2
TLE 5206-2
Semiconductor Group 5 1998-04-29
Input Logic Truth Table
Functional Truth Table
IN1 IN2 OUT1 OUT2 Comments
L L L L Brake; both low side transistors turned-ON
L H L H Motor turns counterclockwise
H L H L Motor turns clockwise
H H H H Brake; both high side transistors turned-ON
Notes for Output Stage
Symbol Value
L Low side transistor is turned-ON
High side transistor is turned-OFF
H High side transistor is turned-ON
Low side transist or is turned-OFF
TLE 5206-2
Semiconductor Group 6 1998-04-29
Monitoring Functions
Undervoltage lockout (UVLO):
When VS reache s the s witch on vol tage VSON
the IC b ecomes activ e with a h ysteres is.
All output transistors are switched off if the supply voltage VS drops below the switch off
value VSOFF.
Protective Function
Various errors like short-circuit to + VS, ground or across the load are detected. All faults
result in turn-OFF of the output stages after a delay of 50 µs and setting of the error flag
EF to ground. Changing the inputs resets the error flag.
a. Output Shorted to Ground Detection
If a high side transi stor is switched on and its output is shorted to ground, the output
current is internally limited. After a delay of 50 µs all outputs will be switched-OFF and
the error flag is set.
b. Output Shorted to + VS Detection
If a low si de transist or is sw itched on and its output is shorted t o the sup ply volta ge,
the output current is internally limited. After a delay of 50 µs all outputs will be
switched-OFF and the error flag is set.
c. Overload Detection
An internal circuit detects if the current through the low side transistor exceeds the
trippoint ISDL. In this case all outputs are turned off after 50 µs and the error flag is set.
d. Overtemperature Protection
At a junction temperature higher than 150 °C the thermal shutdown turns-OFF, all four
output stages commonly and the error flag is set with a delay.
TLE 5206-2
Semiconductor Group 7 1998-04-29
Diagnosis
Various errors as listed in the table “Diagnosis” are detected. Short circuits and overload
result in turning off the outp ut stages afte r a delay (tdoff for short circuit) and setting the
error fla g simultaneou sly [EF = L]. C hanging the inputs to a state where the fault is n ot
detectable resets the error flag (input toggling) with the exception of short circuit from
OUT1 to OUT2 (load short circuit).
Flag IN1 IN2 OUT1 OUT2 EF Remarks
Short circuit from OUT1 to OUT2 0
0
1
1
0
1
0
1
L
X
X
H
L
X
X
H
1
0
0
1
Not detectable
Not detectable
Short circuit from OUT1 to GND 0
0
1
1
0
1
0
1
GND
GND
GND
GND
L
X
L
X
1
1
0
0
Not detectable
Not detectable
Short circuit from OUT2 to GND 0
0
1
1
0
1
0
1
L
L
X
X
GND
GND
GND
GND
1
0
1
0
Not detectable
Not detectable
Short circuit from OUT1 to VS
0
0
1
1
0
1
0
1
VS
VS
VS
VS
X
H
X
H
0
0
1
1Not detectable
Not detectable
Short circuit from OUT2 to VS
0
0
1
1
0
1
0
1
X
X
H
H
VS
VS
VS
VS
0
1
0
1
Not detectable
Not detectable
Overtemperature or undervoltage 0
0
1
1
0
1
0
1
Z
Z
Z
Z
Z
Z
Z
Z
0
0
0
0
IN: 0 = Logic LOW OUT: Z = Output in tristate condition EF: 1 = No error
1 = Logic HIGH L = Output in sink condition 0 = Error
H = Output in source condition
X = Voltage level undefined
For Open circuit detection, use the TLE 5205-2.
TLE 5206-2
Semiconductor Group 8 1998-04-29
Electrical Characteristics
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Absolute Maximum Ratings
– 40 °C < Tj < 150 °C
Parameter Symbol Limit Values Unit Remarks
min. max.
Voltages
Supply voltage VS– 0.3 40 V
– 1 40 V t < 0.5 s; IS > – 5 A
Logic input voltage VIN1, 2 – 0.3 7 V 0 V < VS < 40 V
Diagnostics output voltage VEF – 0.3 7 V
Currents of DMOS-Transistors and Freewheeling Diodes
Output current (cont.) IOUT1, 2 – 5 5 A
Output current (peak) IOUT1, 2 – 6 6 A tp < 100 ms; T=1s
Output current (peak) IOUT1, 2 – – A tp < 50 µs; T=1s;
internally limitted;
see overcurrent
Temperatures
Junction temperature Tj– 40 150 °C–
Storage temperature Tstg – 50 150 °C–
Thermal Resistances
Junction case RthjC 3 K/W P-TO220-7-11/12,
P-TO263-7-1
Ju nction ambient RthjA 65 K/W P-TO220-7-11/12
75 K/W P-TO263-7-1
Junction case RthjC 5 K/W P-DSO-20-10
Ju nction ambient RthjA 50 K/W P-DSO-20-10
TLE 5206-2
Semiconductor Group 9 1998-04-29
Operating Range
Parameter Symbol Limit Values Unit Remarks
min. max.
Supply voltage VSVUV ON 40 V After VS rising above
VUV ON
Supply voltage increasing – 0.3 VUV ON V Outputs in tristate
condition
Supply voltage decreasing – 0.3 VUV OFF V
Logic input voltage VIN1, 2 – 0.3 7 V
Junction temperature Tj– 40 150 °C–
Electrical Characteristics
6 V < VS < 18 V; IN1 = IN2 = HIGH
IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Current Consumption
Quiescent current IS 10 mA IN1 = IN2 = LOW;
VS = 13.2 V
Under Voltage Lockout
UV-Switch-ON voltage VUV ON –56VVS increasing
UV-Switch-OFF voltage VUV OFF 3.5 4.4 V VS decreasing
UV-ON/OFF-Hysteresis VUV HY 0.2 0.6 V VUV ONVUV OFF
TLE 5206-2
Semiconductor Group 10 1998-04-29
Outputs OUT1, 2
Static Drain-Source-On Resistance
Source
IOUT = – 3 A RDS ON H 200 400 m6V < VS < 18 V
Tj = 25 °C
650 m6V < VS < 18 V
350 500 mVSON
< VS 6V
Tj = 25 °C
800 mVSON
< VS 6V
Sink
IOUT = 3 A RDS ON L 200 400 m6V < VS < 18 V
Tj = 25 °C
650 m6V < VS < 18 V
400 600 mVSON
< VS 6V
Tj = 25 °C
1000 mVSON
< VS 6V
Note: Values of
R
DS ON
for
V
S ON
<
V
S
6 V are guaranteed by design.
Overcurrent
Source shutdown trippoint ISDH 69–A
Sink shutdown trippoint ISDL 69–A
Shutdown delay time tdSD 25 50 80 µs–
Short Circuit
Source current ISCH ––20At < tdSD
Sink current ISCL ––15At < tdSD
Electrical Characteristics (cont’d)
6 V < VS < 18 V; IN1 = IN2 = HIGH
IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Parameter Symbol Limit Values Unit Tes t Condition
min. typ. max.
TLE 5206-2
Semiconductor Group 11 1998-04-29
Output Delay Times (device active for t > 1 ms)
Source ON tdONH –7.520µsIOUT = – 3 A
resistive load
Sink ON tdONL –7.520µsIOUT = 3 A
resistive load
Source OFF tdOFFH –520µsIOUT = – 3 A
resistive load
Sink OFF tdOFFL –5 20µsIOUT = 3 A
resistive load
Output Switching Times (device active for t > 1 ms)
Source ON tON H –1530µsIOUT = – 3 A
resistive load
Sink ON tON L –510µsIOUT = 3 A
resistive load
Source OFF tOFF H –25µsIOUT = – 3 A
resistive load
Source OFF tOFF L –25µsIOUT = 3 A
resistive load
Clamp Diodes
Forward Voltage
High-side VFH –11.5VIF = 3 A
Low-side VFL –1.11.5VIF = 3 A
Leakage Current
Source ILKH 200 µAOUT1 = VS
Sink ILKL ––200µAOUT2 = GND
Electrical Characteristics (cont’d)
6 V < VS < 18 V; IN1 = IN2 = HIGH
IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
TLE 5206-2
Semiconductor Group 12 1998-04-29
Logic
Control Inputs IN 1, 2
H-input voltage threshold VINH 2.8 ––V
L-input voltage VINL ––1.2V
Hysteresis of input voltage VINHY 0.4 0.8 1.2 V
H-input current IINH –2 2 µAVIN = 5 V
L-input current IINL –10 –4 0 µAVIN = 0 V
Error Flag Output EF
Low output voltage VEFL –0.20.5VIEF = 3 mA
Leakage current IEFL ––10µAVEF = 7 V
Thermal Shutdown
Thermal shutdown junction
temperature TjSD 150 175 200 °C–
Thermal switch-on junction
temperature TjSO 120 170 °C–
Temperature hysteresis T–30–K
Electrical Characteristics (cont’d)
6 V < VS < 18 V; IN1 = IN2 = HIGH
IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Parameter Symbol Limit Values Unit Tes t Condition
min. typ. max.
TLE 5206-2
Semiconductor Group 13 1998-04-29
Figure 3 Test Circuit
Overcurrent Short Circuit Open Circuit
IOUT ISD ISC IOC
EF
IN1
IN2
OUT1
OUT2
TLE 5206-2
2
3
57
1
6
4
4700 F
µ
V
S
GND
AES02406
Ι
EF
IN1
Ι
IN2
Ι
FL
Ι
V
EF
V
IN1 IN2
V V
OUT1 OUT2
V
R
Load
OUT1
Ι
OUT2
Ι
470 nF
FU
Ι
;
S
Ι
V
S
63 V
TLE 5206-2
Semiconductor Group 14 1998-04-29
Figure 4 Switching Time Definitions
Figure 5 Application Circuit
AET01994
t
t
Ι
OUT
=
IN
V
Source
0
0
3
t
dONH
50%
t
rf
t
100 ns
t
dOFFH
Ι
OUT
Sink
t
50%
10%
90%
t
ONH
t
OFFL ONL
t
OFFH
t
dOFFL
tt
dONL
5
A
V
A
3
0
90%
10%
50% 50%
10%
90%
90%
10%
50%
_
<
EF
IN1
IN2
M
OUT1
OUT2
TLE 5206-2
2
3
57
1
6
4
100 nF
+ 5 V
P
µ
100 F
µ
V
S
+
V
S
GND
2 k
Ι
N
= 3 A
Ι
BL
= 6 A
AES02407
TLE 5206-2
Semiconductor Group 15 1998-04-29
Application Modes
1. Simple CW/CCW-Control
For low-cost application simple CW/CCW-Control without any speed regulation is
recommended. A low-speed two-line interface is sufficient for the brake low,
clockwise, counter clockwise and brake high command.
2. Sign/Magnitude Control
For this mode two ports with PWM capability are necessary. Motor turns clockwise
(current flows from OUT1 to OUT2; means: OUT1 is switched HIGH continuously and
OUT2 is PWM controlled.
To achieve motor counter clockwise turning change input signals to:
IN1 = PWM; IN2 = H.
Figure 6 Input/Output Diagram for CW Operation (IN1 = H)
3. Locked Anti-Phase Control
The most important advantage to drive a motor in locked anti-phase mode is: Only one
variable duty cycle signal is necessary in which is encoded both direction- and
amplitude information. So the interface is very simple: A PWM input driven by a
dedicated PWM port from µP.
Fastest High Medium Low Brake to Zero
t
t
Motor
Short
Circuit
IN2
PWM
V
OUT1
-
V
OUT2
S
V
0
Motor speed
= 1 = 0.9 = 0.5 = 0.1 = 0
AED02408
νν ν ν ν
TLE 5206-2
Semiconductor Group 16 1998-04-29
Figure 7 Timing Diagram for Output Shorted to Ground
Figure 8 Timing Diagram for Output Shorted to VS
AED01997
IN1, 2
Ι
OUT1, 2
V
EF
R
Short
x
V
FL
OUT1, 2
SCH
Ι
Ι
SCH
dSD
t
Ι
SDH
AED01998
IN1, 2
Ι
OUT1, 2
V
EF
R
Short
x
V
FU
OUT1, 2
SCL
Ι
Ι
SCL
dSD
t
SDL
Ι
S
V
TLE 5206-2
Semiconductor Group 17 1998-04-29
Diagrams
Quiescent Current IS (active)
versus Junction Tempe rature Tj
Input Switching Thresholds VINH, L
versus Junction Tempe rature Tj
Static Drain-Source ON-Resistance
versus Junction Temperature Tj
Clamp Diode Forward Voltage VF
versus Junction Temperature Tj
-50
10 15050
S
AED02398
100 C
2
3
4
5
6
7
= 18 V
S
V
j
T
Ι
mA
V
= 6 V
S
0
AED02400
0.5
1.0
1.5
2.0
2.5
3.0
V
INH
INL
V
INH, L
V
500-50 C
100 150
T
j
0
AED02399
0.1
0.2
0.3
0.4
0.5
0.6
j
T
Low Side Transistor
High Side Transistor
R
ON
500-50 C
100 150
0.7
AED02401
0.8
0.9
1.0
1.1
1.2
1.3
High Side Transistor
Low Side Transistor
V
F
500-50 C
100 150
T
j
TLE 5206-2
Semiconductor Group 18 1998-04-29
Overcurrent Shutdown Threshold ISD
versus Junction Temperature Tj
Error-Flag Saturation Output Voltage
VEF versus Junction Temperature Tj
0
SD
AED02402
2
4
6
8
10
12
Ι
Low Side Transistor
High Side Transistor
50
0-50 C
100 150
T
j
-50
00 15050
AED02403
100 C
0.1
0.2
0.3
0.4
0.5
0.6
j
T
V
EF
TLE 5206-2
Semiconductor Group 19 1998-04-29
Package Outlines
P-TO220-7-11
(Plastic Transistor Single Outline Package)
GPT09083
Typical
±0.1
1.27 4.4
9.25
±0.2
0.05
1)
All metal surfaces tin plated, except area of cut.
C
2.4 0.5
±0.1
±0.3
8.6
10.2
±0.3
±0.4
3.9
±0.4
8.4
3.7
±0.3
A
A0.25
M
9.8
±0.15
2.8
1)
15.65
±0.3
13.4
0...0.15
1.27 0.6
±0.1
C
±0.2
17
±0.3
8.5
1)
10
±0.2
3.7
-0.15
7x
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”. Dimensions in mm
TLE 5206-2
Semiconductor Group 20 1998-04-29
+0.07
-0.02
-0.3
1.2
2.8
1.3
0.25
1) Does not include plastic or metal protrusion of 0.15 max. per side
20x0.25
M
1)
Heatsink
0.95
14.2
+0.15
Index Marking
15.9
101
0.1
+0.13
0.4
1.27
3.5 max.
0
6.3
11
3.25
20 11
±0.15
±0.1
±0.15
1 x 45˚
±0.3
±3˚
±0.15
15.74
±0.1
A
A
1)
B
0.25
M
B
GPS05791
P-DSO-20-10
(Plastic Dual Small Outline Package)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”. Dimensions in mm
SMD = Surface Mounted Device
TLE 5206-2
Semiconductor Group 21 1998-04-29
A
8˚ max.
BA0.25
M
0.1
Typical
9.8
±0.15
±0.2
10
8.5
1)
8
1)
(15)
±0.2
9.25
±0.3
1
0...0.15
7x0.6
±0.1
±0.1
1.27 4.4
B
0.5
±0.1
±0.3
2.7
4.7
±0.5
0.05
1)
0.1
All metal surfaces tin plated, except area of cut.
2.4
6x1.27
P-TO263-7-1 Option E3180
(Plastic Transistor Single Outline Package)
GPT09114
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”. Dimensions in mm
SMD = Surface Mounted Device
TLE 5206-2
Semiconductor Group 22 1998-04-29
GPT09084
A
BA0.25
M
Typical
9.8
±0.15
2.8
1)
15.65
±0.3
13.4
0...0.15
1.27 0.6
±0.1
±0.1
1.27 4.4
B
9.25
±0.2
0.05
1)
All metal surfaces tin plated, except area of cut.
C
±0.2
17
±0.3
8.5
1)
10
±0.2
3.7
-0.15
C
2.4 0.5
±0.1
13
±0.5
±0.5
11
7x
P-TO220-7-12
(Plastic Transistor Single Outline Package)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”. Dimensions in mm