COMMUNICATION ICs
Application Note
C-BUS
Microcontroller Interface
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¤2001 MX-COM, I n c. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 Doc. # 20830144.001
4800 Bethania Station Road, Wins t on-Salem , NC 27105-1201 USA All Trademarks and service mark s are held by their res pec t ive com panies.
C-BUS Microcontroller Interface
This document is meant to serve as a definition and introduction to the C-BUS interface. Timing parameters
with wide applicability to MX-COM products are discussed in this application note. For detailed information
concerning specific signal timing requirements, please refer to the respective MX-COM device data bulletin.
For any questions on this material or on any MX-COM product, please contact MX-COM directly at 800-638-
5577 or by email at apps@mxcom.com.
C-BUS is the name given to the synchronous serial microcontroller (µC) interface developed by MX-COM.
This interface is compatible with most common serial µC interfaces and may also be easily implemented with
general purpose µC I/O pins controlled by a simple software routine.
The C-BUS hardware interface consists of five lines:
- SERIAL CLOCK: this is the timing source used by the µC to control communications with the
MX-COM device. All C-BUS commands and data transfers are synchronized, in bursts of 8 bits, to
this clock signal.
- COMMAND DATA: used to transfer register addresses and device configuration data from the host
µC to the selected MX-COM device.
- REPLY DATA: used to transfer requested data from the MX-COM device to the host µC. Reply Data
is only available if a command (request) is first sent to the MX-COM device on the Command Data
line.
- CHIP SELECT (/CS): active low signal to the MX-COM device that initiates, completes, or aborts all
C-BUS sequences.
- INTERRUPT REQUEST (/IRQ); active low signal that indicates when the MX-COM device is in need
of servicing.
Most MX-COM devices transfer data in 8 bit bursts across the C-BUS interface. (The CMX264, however,
uses an 11 bit burst.) A data transfer requiring more data than can be contained in an 8 bit burst is completed
using multiple 8 bit bursts. A complete data transfer, also called a transaction, is composed of all actions that
occur between /CS (“Chip Select”) falling and rising transitions. This document describes 8-bit-burst C-BUS
transactions, as well as the 11 bit transactions used in the CMX264. Example C-BUS timing diagrams are
included at the end of this document.
Chip Select (/CS, CSN)
/CS is taken low to start a transaction and should not be taken high until the transaction is completed. If /CS is
taken high during a transaction, that transaction is aborted. The /CS signal must be held low during data
transfers and kept high between transfers.
During a single C-BUS transaction, only one register can be written to or read from. Multiple register reads
can not be performed during a single /CS active period (e.g. taking /CS low, writing to multiple registers,
reading from multiple registers, and then taking /CS back high; this will cause erroneous operation).
Once a C-BUS transaction is complete, the /CS signal must be taken to a high logic level and kept at a high
logic level for a prescribed amount of time before the next transaction can begin. This parameter is typically
referred to as “tCSOFF” (/CS-High Time Between Transactions) in MX-COM product literature.
Serial Clock
The timing signal for data transfer between the µC and the MX-COM device is provided on this line. Data is
transferred to and from the MX-COM device on the rising edge of the Serial Clock signal. The Serial Clock
rate should be harmonically related to (Crystal/Serial Clock) = 32, as a Serial Clock signal of this frequency will
C-BUS Mi crocontroller Interface 2 Application Note
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¤2001 MX-COM, I n c. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 Doc. # 20830144.001
4800 Bethania Station Road, Wins t on-Salem , NC 27105-1201 USA All Trademarks and service mark s are held by their res pec t ive com panies.
typically not create aliasing effects. Allowable Serial Clock speeds vary from device to device; please refer to
the specific MX-COM data bulletin for more information.
C-BUS data must be stable for a minimum amount of time before the rising edge of the Serial Clock signal;
this amount of time is typically referred to as “tCDS” (Command Data Set-Up Time). Similarly, there is a
minimum time requirement for which the data signal must be stable after the Serial Clock signal rising edge;
this parameter is frequently referred to as “tCDH” (Command Data Hold Time) in MX-COM product literature.
The Serial Clock signal can be asymmetric (i.e. non-50% duty cycle).
There is a minimum amount of time required between the falling edge of the /CS signal and the first Serial
Clock rising edge used to strobe in data. This parameter is typically referred to as “tCSE” (/CS Enable to Clock
High Time). The minimum time duration between the last rising Serial Clock edge used to strobe in data and
the rising edge of the /CS signal is labeled “tCSH” (Last Clock High to /CS High Time) in the MX-COM literature.
Command Data
Register addresses and ‘write’ register contents (e.g. register configuration settings) are transferred serially
from the µC to the MX-COM device on this line. Some instructions do not have data associated with the
command (i.e. the “General Reset” command, which is a single byte C-BUS transaction consisting of $01).
The first byte that must be transmitted to an MX-COM device in a C-BUS transaction is called an
“Address/Command” (A/C) byte. The A/C byte, transmitted on the Command Data line, specifies the
MX-COM device and register to be operated on. An A/C byte can then be followed by one of the following:
1) Data bytes from the µC (via the Command Data line) to configure the device register for specific
operation.
2) Data bytes from the MX-COM device (via the Reply Data line), such as status register contents.
In general, all bytes are transmitted most significant bit (msb) first. For multiple byte C-BUS transactions there
is usually a short time period between the bytes transferred in the transaction; this time period is typically
referred to as “tNXT” (Inter-Byte Time).
Command Data must be valid on the low-to-high transition of the Serial Clock. Consequently, it may be
convenient to configure the software such that the Command Data is changed on the high-to-low transition of
the Serial Clock.
Reply Data
Data is transferred serially from the MX-COM device to the µC on this line. Reply Data is only available if a
command (request) is first sent to the MX-COM device on the Command Data line. For multiple byte C-BUS
transactions there is usually a short time period between the bytes transferred in the transaction; this time
period is typically referred to as “tNXT” (Inter-Byte Time).
Reply Data sent from the MX-COM device to the µC is valid when the Serial Clock signal is high and may be
read into the µC on the Serial Clock low-to-high transition.
Interrupt Request (/IRQ)
An interrupt request line is provided to allow indication of a need for device servicing by the host µC. The /IRQ
line is typically connected to VDD via a pull-up resistor; refer to the respective MX-COM device data bulletin for
recommended pull-up resistor values.
Many MX-COM devices allow the “masking” of interrupts by the selection of appropriate register bits; please
refer to the respective MX-COM device data bulletin for more information.
C-BUS Mi crocontroller Interface 3 Application Note
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¤2001 MX-COM, I n c. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 Doc. # 20830144.001
4800 Bethania Station Road, Wins t on-Salem , NC 27105-1201 USA All Trademarks and service mark s are held by their res pec t ive com panies.
Examples of C-BUS Transactions
The examples below describe five transactions for C-BUS. Note that the events between /CS low and /CS
high form one complete transaction.
a. A single byte C-BUS transfer (e.g. “General Reset” command):
1. Take /CS low.
2. Send Address / Command byte containing General Reset command on Command Data line.
3. Take /CS high.
b. A two-byte C-BUS transfer to the MX-COM device (e.g. to set up a control register):
1. Take /CS low.
2. Send Address / Command byte (containing desired register) on Command Data line.
3. Send data byte (register configuration byte) on Command Data line.
4. Take /CS high.
c. A three-byte C-BUS transfer to the MX-COM device (e.g. to set up a data word register):
1. Take /CS low.
2. Send Address / Command byte (containing desired register).
3. Send first data byte (half of data word).
4. Send second data byte (remainder of data word).
5. Take /CS high.
Single byte from µC:
Data to MX-COM device
One Address and one Data byte from µC:
MSB to MX-COM device LSB to MX-COM device
One Address and 2 Data bytes from µC:
/CS
/CS
/CS
C-BUS Mi crocontroller Interface 4 Application Note
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¤2001 MX-COM, I n c. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 Doc. # 20830144.001
4800 Bethania Station Road, Wins t on-Salem , NC 27105-1201 USA All Trademarks and service mark s are held by their res pec t ive com panies.
d. A two-byte C-BUS transfer to and from the MX-COM device (e.g. request for status):
1. Take /CS low.
2. Send Address / Command byte (containing desired register to be read).
3. Read Reply Data byte (register contents).
4. Take /CS high.
e. A single 11 bit write transaction on the CMX264:
1. Take /CS low.
2. Send Address / Command byte.
3. Take /CS high.
One register is available on the CMX264 and this is write only. No other transactions are valid.
The CMX264 only reads the last 11 bits of any transfer (completed when /CS goes high). Thus, it may be
convenient to write all sixteen bits (normal word or two byte length) available. The additional leading bits will be
ignored.
Data from MX-COM device
One Address byte from µC and one Reply byte from MX-COM device:
/CS
