1. General description
The NTS0101 is a 1-bit, dual supply translating transceiver with auto direction sensing,
that enables bidirectional voltage level translation. It features two 1-bit input-output ports
(A and B), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A)
can be supplied at any voltage between 1.65 V and 3.6 V and VCC(B) can be supplied at
any voltage between 2.3 V and 5.5 V, making the device suitable for translating between
any of the voltage nodes (1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and OE are referenced to
VCC(A) and pin B is referenced to VCC(B). A LOW level at pin OE causes the outputs to
assume a high-impedan ce OFF-state. This de vice is fully specified for partial power-down
applications using IOFF. The IOFF circuitry disables the output, preventing the damaging
backflow current through the device when it is powered down.
2. Features and benefits
Wide supply voltage range:
VCC(A): 1.65 V to 3.6 V and VCC(B): 2.3 V to 5.5 V
Maximum data rates:
Push-pull: 50 Mbps
IOFF circuitry provides partial Power-down mode operation
Inputs accept voltages up to 5.5 V
ESD protection:
HBM JESD22-A114E Class 2 exceeds 2500 V for A port
HBM JESD22-A114E Class 3B exceeds 8000 V for B port
MM JESD22-A115-A exce ed s 200 V
CDM JESD22-C101E exceeds 1500 V
Latch-up pe rform a nc e exceeds 100 mA per JESD 78 B Cl as s II
Multiple package options
Specified from 40 Cto+85C and 40 Cto+125C
3. Applications
I2C/SMBus
UART
GPIO
NTS0101
Dual supply translating transceiver; open drain; auto
direction sensing
Rev. 4 — 4 September 2012 Product data sheet
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 2 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
4. Ordering information
5. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
NTS0101GW 40 Cto+125C SC-88 plastic surface-mounted package; 6 leads SOT363
NTS0101GV 40 Cto+125C TSOP6 plastic surface-mounted package (TSOP6); 6 leads SOT457
NTS0101GM 40 Cto+125C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 1.45 0.5 mm SOT886
NTS0101GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 10.5 mm SOT891
NTS0101GS 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0 1.0 0.35 mm SOT1202
Table 2. Marking
Type number Marking code[1]
NTS0101GW s1
NTS0101GV s01
NTS0101GM s1
NTS0101GF s1
NTS0101GS s1
Fig 1. Logic symbol
001aan317
5
3
OE
GATE BIAS
A
4B
VCC(A) VCC(B)
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 3 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
7. Pinning information
7.1 Pinning
7.2 Pin description
8. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
[2] When either VCC(A) or VCC(B) is at GND level, the device goes into power-down mode.
Fig 2. Pin configuration SOT363
and SOT457 Fig 3. Pin configuration SOT886 Fig 4. Pin configuration SOT 891
and SOT1202
NTS0101
V
CC(A)
V
CC(B)
GND
AB
001aan318
1
2
3
6
OE
5
4
NTS0101
GND
001aan319
VCC(A)
A
OE
VCC(B)
B
Transparent top view
2
3
1
5
4
6
NTS0101
GND
001aan320
VCC(A)
A
OE
VCC(B)
B
Transparent top view
2
3
1
5
4
6
Table 3. Pin description
Symbol Pin Description
VCC(A) 1 supply voltage A
GND 2 groun d (0 V)
A 3 data input or output (referenced to V CC(A))
B 4 data input or output (referenced to V CC(B))
OE 5 output enable input (active HIGH; referenced to VCC(A))
VCC(B) 6 supply voltage B
Table 4. Function table[1]
Supply voltage Input Input/output
VCC(A) VCC(B) OE A B
1.65 V to VCC(B) 2.3 V to 5.5 V L Z Z
1.65 V to VCC(B) 2.3 V to 5.5 V H input or output output or input
GND[2] GND[2] XZZ
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 4 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
9. Limiting values
[1] The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] VCCO is the supply voltage associated with the output.
[3] For SC-88 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 C the value of Ptot derates line arly with 7.8 mW/K.
10. Recommended operating conditions
[1] The A and B sides of an unused I/O pair must be held in the same state, both at VCCI or both at GND.
[2] VCC(A) must be less than or equal to VCC(B).
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC(A) supply voltage A 0.5 +6.5 V
VCC(B) supply voltage B 0.5 +6.5 V
VIinput voltage A port and OE input [1][2] 0.5 +6.5 V
B port [1][2] 0.5 +6.5 V
VOoutput voltage Active mode [1][2]
A or B port 0.5 VCCO +0.5 V
Power-down or 3-state mode [1]
A port 0.5 +4.6 V
B port 0.5 +6.5 V
IIK input clamping current VI<0V 50 - mA
IOK output clamping current VO<0V 50 - mA
IOoutput current VO=0VtoV
CCO [2] -50 mA
ICC supply current ICC(A) or ICC(B) -100mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb =40 C to +125 C[3] -250mW
Table 6. Recommended operating con ditions[1][2]
Symbol Parameter Conditions Min Max Unit
VCC(A) supply voltage A 1.65 3.6 V
VCC(B) supply voltage B 2.3 5.5 V
Tamb ambient temperature 40 +125 C
t/V input transition rise and fall rate A or B port; push-pull driving
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V - 10 ns/V
OE input
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V - 10 ns/V
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 5 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
11. Static characteristics
[1] VCCO is the supply voltage associated with the output.
Table 7. Typical static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25
C.
Symbol Parameter Conditions Min Typ Max Unit
IIinput leakage
current OE input; VI = 0 V to 3.6 V; VCC(A) =1.65Vto3.6V;
VCC(B) = 2.3 V to 5.5 V -- 1A
IOZ OFF-state output
current A or B port; VO=0VorV
CCO; VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V [1] -- 1A
IOFF power-off
leakage current A port; VI or VO = 0 V to 3.6 V;
VCC(A) =0V;V
CC(B) =0Vto5.5V -- 1A
B port; VI or VO = 0 V to 5.5 V;
VCC(B) =0V;V
CC(A) =0Vto3.6V -- 1A
CIinput
capacitance OE input; VCC(A) = 3.3 V; VCC(B) =3.3V - 1 - pF
CI/O input/output
capacitance A port - 4 - pF
B port - 7.5 - pF
A or B port; VCC(A) = 3.3 V; VCC(B) =3.3V - 11 - pF
Table 8. Typical supply curr ent
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25
C.
VCC(A) VCC(B) Unit
2.5 V 3.3 V 5.0 V
ICC(A) ICC(B) ICC(A) ICC(B) ICC(A) ICC(B)
1.8 V 0.1 0.5 0.1 1.5 0.1 4.6 A
2.5 V 0.1 0.1 0.1 0.8 0.1 3.8 A
3.3 V - - 0.1 0.1 0.1 2.8 A
Table 9. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Max Min Max
VIH HIGH-level
input voltage A port
VCC(A) = 1.65 V to 1.95 V;
VCC(B) = 2.3 V to 5.5 V [1] VCCI 0.2 - VCCI 0.2 - V
VCC(A) = 2.3 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V [1] VCCI 0.4 - VCCI 0.4 - V
B port
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V [1] VCCI 0.4 - VCCI 0.4 - V
OE input
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V 0.65VCC(A) -0.65V
CC(A) -V
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 6 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
[1] VCCI is the supply voltage associated with the input.
[2] VCCO is the supply voltage associated with the output.
VIL LOW-level
input voltage A or B port
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V - 0.15 - 0.15 V
OE input
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V - 0.35VCC(A) - 0.35VCC(A) V
VOH HIGH-level
output voltage IO=20 A
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V [2] 0.67VCCO - 0.67VCCO -V
VOL LOW-level
output voltage A or B port; IO=1 mA [2]
VI 0.15 V;
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V
- 0.4 - 0.4 V
IIinput leakage
current OE input; VI = 0 V to 3.6 V;
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V
-2-12 A
IOZ OFF-state
output current A or B port; VO=0VorV
CCO;
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V
[2] -2-12 A
IOFF power-off
leakage
current
A port; VI or VO = 0 V to 3.6 V;
VCC(A) =0V;V
CC(B) =0Vto5.5V -2-12 A
B port; VI or VO = 0 V to 3.6 V;
VCC(B) =0V;V
CC(A) =0Vto3.6V -2-12 A
ICC supply current VI = 0 V or VCCI; IO = 0 A [1]
ICC(A)
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V -2.4 - 15A
VCC(A) = 3.6 V; VCC(B) = 0 V - 2.2 - 15 A
VCC(A) = 0 V; VCC(B) =5.5V - 1-8A
ICC(B)
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V -12 - 30A
VCC(A) = 3.6 V; VCC(B) =0V - 1-5A
VCC(A) = 0 V; VCC(B) =5.5V - 1 - 6 A
ICC(A) + ICC(B)
VCC(A) = 1.65 V to 3.6 V;
VCC(B) = 2.3 V to 5.5 V - 14.4 - 30 A
Table 9. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Max Min Max
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 7 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
12. Dynamic characteristics
Table 10. Dynamic characteristics for temperatu re range 40 C to +85 C[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6.
Symbol Parameter Conditions VCC(B) Unit
2.5 V 0.2 V 3.3 V 0.3 V 5.0 V 0.5 V
Min Max Min Max Min Max
VCC(A) = 1.8 V 0.15 V
tPHL HIGH to LOW
propagation delay A to B - 4.6 - 4.7 - 5.8 ns
tPLH LOW to HIGH
propagation delay A to B - 6.8 - 6 .8 - 7.0 ns
tPHL HIGH to LOW
propagation delay B to A - 4.4 - 4 .5 - 4.7 ns
tPLH LOW to HIGH
propagation delay B to A - 5.3 - 4 .5 - 0.5 ns
ten enable time OE to A; B - 200 - 200 - 200 ns
tdis disable time OE to A; no external load [2] -25-25-25ns
OE to B; no external load [2] -25-25-25ns
OE to A - 230 - 230 - 230 ns
OE to B - 200 - 200 - 200 ns
tTLH LOW to HIGH
output transition
time
A port 3.2 9.5 2.3 9.3 1.8 7.6 ns
B port 3.3 10.8 2.7 9.1 2.7 7.6 ns
tTHL HIGH to LOW
output transition
time
A port 2.0 5.9 1.9 6.0 1.7 13.3 ns
B port 2.9 7.6 2.8 7.5 2.8 10.0 ns
tWpulse width data inputs 20 - 20 - 20 - ns
fdata data rate - 50 - 50 - 50 Mbp s
VCC(A) = 2.5 V 0.2 V
tPHL HIGH to LOW
propagation delay A to B - 3.2 - 3 .3 - 3.4 ns
tPLH LOW to HIGH
propagation delay A to B - 3.5 - 4 .1 - 4.4 ns
tPHL HIGH to LOW
propagation delay B to A - 3.0 - 3 .6 - 4.3 ns
tPLH LOW to HIGH
propagation delay B to A - 2.5 - 1 .6 - 0.7 ns
ten enable time OE to A; B - 200 - 200 - 200 ns
tdis disable time OE to A; no external load [2] -20-20-20ns
OE to B; no external load [2] -20-20-20ns
OE to A - 200 - 200 - 200 ns
OE to B - 200 - 200 - 200 ns
tTLH LOW to HIGH
output transition
time
A port 2.8 7.4 2.6 6.6 1.8 6.2 ns
B port 3.2 8.3 2.9 7.9 2.4 6.8 ns
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 8 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
[1] ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] Delay between OE going LOW and when the outputs are actually disabled.
tTHL HIGH to LOW
output transition
time
A port 1.9 5.7 1.9 5.5 1.8 5.3 ns
B port 2.2 7.8 2.4 6.7 2.6 6.6 ns
tWpulse width data inputs 20 - 20 - 20 - ns
fdata data rate - 50 - 50 - 50 Mbp s
VCC(A) = 3.3 V 0.3 V
tPHL HIGH to LOW
propagation delay A to B - - - 2.4 - 3.1 ns
tPLH LOW to HIGH
propagation delay A to B - - - 4.2 - 4.4 ns
tPHL HIGH to LOW
propagation delay B to A - - - 2.5 - 3.3 ns
tPLH LOW to HIGH
propagation delay B to A - - - 2.5 - 2.6 ns
ten enable time OE to A; B - - - 200 - 200 ns
tdis disable time OE to A; no external load [2] ---15-15ns
OE to B; no external load [2] ---15-15ns
OE to A - - - 260 - 260 ns
OE to B - - - 200 - 200 ns
tTLH LOW to HIGH
output transition
time
A port - - 2.3 5.6 1.9 5.9 ns
B port - - 2.5 6.4 2.1 7.4 ns
tTHL HIGH to LOW
output transition
time
A port - - 2.0 5.4 1.9 5.0 ns
B port - - 2.3 7.4 2.4 7.6 ns
tWpulse width data inputs - - 20 - 20 - ns
fdata data rate - - - 50 - 50 Mbps
Table 10. Dynamic characteristics for temperatu re range 40 C to +85 C[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6.
Symbol Parameter Conditions VCC(B) Unit
2.5 V 0.2 V 3.3 V 0.3 V 5.0 V 0.5 V
Min Max Min Max Min Max
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 9 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
Table 11. Dynamic character istics for temperature range 40 C to +125 C[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6.
Symbol Parameter Conditions VCC(B) Unit
2.5 V 0.2 V 3.3 V 0.3 V 5.0 V 0.5 V
Min Max Min Max Min Max
VCC(A) = 1.8 V 0.15 V
tPHL HIGH to LOW
propagation delay A to B - 5.8 - 5.9 - 7.3 ns
tPLH LOW to HIGH
propagation delay A to B - 8.5 - 8.5 - 8.8 ns
tPHL HIGH to LOW
propagation delay B to A - 5.5 - 5.7 - 5.9 ns
tPLH LOW to HIGH
propagation delay B to A - 6.7 - 5.7 - 0.7 ns
ten enable time OE to A; B - 200 - 200 - 200 ns
tdis disable time OE to A; no external load [2] -30-30-30ns
OE to B; no external load [2] -30-30-30ns
OE to A - 250 - 250 - 250 ns
OE to B - 220 - 220 - 220 ns
tTLH LOW to HIGH
output transition
time
A port 3.2 11.9 2.3 11.7 1.8 9.5 ns
B port 3.3 13.5 2.7 11.4 2.7 9.5 ns
tTHL HIGH to LOW
output transition
time
A port 2.0 7.4 1.9 7.5 1.7 16.7 ns
B port 2.9 9.5 2.8 9.4 2.8 12.5 ns
tWpulse width data inputs 20 - 20 - 20 - ns
fdata data rate - 50 - 5 0 - 50 Mbps
VCC(A) = 2.5 V 0.2 V
tPHL HIGH to LOW
propagation delay A to B - 4.0 - 4.2 - 4.3 ns
tPLH LOW to HIGH
propagation delay A to B - 4.4 - 5.2 - 5.5 ns
tPHL HIGH to LOW
propagation delay B to A - 3.8 - 4.5 - 5.4 ns
tPLH LOW to HIGH
propagation delay B to A - 3.2 - 2.0 - 0.9 ns
ten enable time OE to A; B - 200 - 200 - 200 ns
tdis disable time OE to A; no external load [2] -25-25-25ns
OE to B; no external load [2] -25-25-25ns
OE to A - 220 - 220 - 220 ns
OE to B - 220 - 220 - 220 ns
tTLH LOW to HIGH
output transition
time
A port 2.8 9.3 2.6 8.3 1.8 7.8 ns
B port 3.2 10.4 2.9 9.7 2.4 8.3 ns
tTHL HIGH to LOW
output transition
time
A port 1.9 7.2 1.9 6.9 1.8 6.7 ns
B port 2.2 9.8 2.4 8.4 2.6 8.3 ns
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 10 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
[1] ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] Delay between OE going LOW and when the outputs are actually disabled.
tWpulse width data inputs 20 - 20 - 20 - ns
fdata data rate - 50 - 5 0 - 50 Mbps
VCC(A) = 3.3 V 0.3 V
tPHL HIGH to LOW
propagation delay A to B - - - 3.0 - 3.9 ns
tPLH LOW to HIGH
propagation delay A to B - - - 5.3 - 5.5 ns
tPHL HIGH to LOW
propagation delay B to A - - - 3.2 - 4.2 ns
tPLH LOW to HIGH
propagation delay B to A - - - 3.2 - 3.3 ns
ten enable time OE to A; B - - - 200 - 200 ns
tdis disable time OE to A; no external load [2] - - - 20 - 20 ns
OE to B; no external load [2] - - - 20 - 20 ns
OE to A - - - 280 - 280 ns
OE to B - - - 220 - 220 ns
tTLH LOW to HIGH
output transition
time
A port - - 2.3 7.0 1.9 7.4 ns
B port - - 2.5 8.0 2.1 9.3 ns
tTHL HIGH to LOW
output transition
time
A port - - 2.0 6.8 1.9 6.3 ns
B port - - 2.3 9.3 2.4 9.5 ns
tWpulse width data inputs - - 20 - 20 - ns
fdata data rate - - - 50 - 50 Mb ps
Table 11. Dynamic character istics for temperature range 40 C to +125 C[1] …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6.
Symbol Parameter Conditions VCC(B) Unit
2.5 V 0.2 V 3.3 V 0.3 V 5.0 V 0.5 V
Min Max Min Max Min Max
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 11 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
13. Waveforms
[1] VCCI is the supply voltage associated with the input.
[2] VCCO is the supply voltage associated with the output.
Measurement points are given in Table 12.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 5. The data input (A, B) to data output (B, A) propagation delay time s
001aan321
A, B input
B, A output
tPLH
tPHL
GND
VI
VOH
VM
VM
VOL tTHL
10 %
90 %
tTLH
Measurement points are given in Table 12.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6. Enable and disable times
001aal919
tPLZ
tPHZ
outputs
disabled outputs
enabled
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OE input
VOH
VCCO
GND
VOL
GND
VI
tPZL
tPZH
VY
VM
VM
VX
VM
Table 12. Measurement points[1][2]
Supply voltage Input Output
VCCO VMVMVXVY
1.8 V 0.15 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH 0.15 V
2.5 V 0.2 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH 0.15 V
3.3 V 0.3 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH 0.3 V
5.0 V 0.5 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH 0.3 V
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 12 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
[1] VCCI is the supply voltage associated with the input.
[2] For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 M; for measuring enable and
disable times, RL = 50 K.
[3] VCCO is the supply voltage associated with the output.
Test data is given in Table 13.
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz; ZO = 50 ; dV/dt 1.0 V/ns.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
Fig 7. Test circuit for measuring switching times
VMVM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 %
tf
tr
tr
tf
001aal963
VEXT
VCC
VIVO
DUT
CLRL
RL
G
Table 13. Test data
Supply voltage Input Load VEXT
VCC(A) VCC(B) VI[1] t/V CLRL[2] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ[3]
1.65 V to 3.6 V 2.3 V to 5.5 V VCCI 1.0ns/V 15pF 50k, 1 Mopen open 2VCCO
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 13 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
14. Application information
14.1 Applications
Voltage level-translation applications. The NTS0101 can be used in point-to-point
applications to interface between devices or systems operating at different supply
voltages. The device is primarily targeted at I2C or 1-wire which use open-drain drivers.
Although it is suit able fo r use in applica tio ns where pu sh -pull d river s are co nne cte d to th e
ports. the NTB0101 may be a preferable option.
14.2 Architecture
The architecture of the NTS0101 is shown in Figure 9. The device does no t require an
extra input signal to control the direction of data flow from A to B or B to A.
The NTS0101 is a "switch" type voltage translator, it employs two key circuits to enable
voltage translation:
1. A pass-gate transistor (N-channel) that ties the ports together.
2. An output edge-rate accelerator that detects and accelerates rising edges on the I/O
pins.
Fig 8. Typical op erating circuit
001aan322
OE NTS0101 SYSTEM
A DATAB
VCC(A) VCC(B)
SYSTEM
CONTROLLER
DATA
1.8 V
1.8 V 3.3 V
0.1 μF 0.1 μF 1 μF
3.3 V
Fig 9. Architecture of NTS0101 I/O cel
001aal965
V
CC(A)
V
CC(B)
AB
10 kΩ10 kΩ
T1
T3
T2
ONE
SHOT ONE
SHOT
GATE BIAS
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 14 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
The gate bias voltage of the pass gate transistor (T3) is set at approximately one
threshold voltage above the VCC level of the low-voltage side. During a LOW-to-HIGH
transition, the output one-shot accelerates the output transition by switching on the PMOS
transistors (T1, T2). This bypasses the 10 k pull-up resistors and increases the current
drive capability. The one-shot is activated once the input transition reaches approximately
VCCI/2; it is de-activated approximately 50 ns after the output reaches VCCO/2. During the
acceleration time, the driver output resistance is between approximately 50 and 70 .
To avoid signal contention and minimize dynamic ICC, wait for the one-shot circuit to
turn-of f befor e applying a sign al in the o pposite dire ction. Pull -up resistors are inclu ded in
the device for DC current sourcing capability.
14.3 Input driver requirements
As the NTS0101 is a switch type translator , properties of the input driver directly affect th e
output signal. The external open-drain or push-pull driver applied to an I/O, determines
the static current sinking capability of the system. The maximum da ta rate, HIGH-to-LOW
output transition time (tTHL) and propagation delay (tPHL) are dependent upon the output
impedance and edge-rate of the external driver. The limits provided for these parameters
in the data sheet assume a driver with output impedance below 50 is used.
14.4 Output load considerations
The maximum lumped capacitive lo ad that can be driven, is dep endant upon the one-shot
pulse duration. In cases with very heavy capacitive loading, there is a risk that the output
does not reach the positive rail within th e one-shot pulse duration.
To avoid exce ssive capacitive loading and to ensure corr ect triggering of the one-shot, it is
recommended to use short trace lengths and low capacitance connectors on NTS0101
PCB layouts. To ensure low impedance termination and avoid output signal oscillations
and one-shot retriggering, the length of the PCB trace should be such that the round-trip
delay of any reflection is within the one-shot pulse duration (approximately 50 ns).
14.5 Power-up
During operation VCC(A) must never be higher than VCC(B), however during power- up
VCC(A) VCC(B) does not damage the device, so ei ther power supply can be ramped up
first. There is no special power-up sequencing required. The NTS0101 includes circuitry
that disables all output ports when either VCC(A) or VCC(B) is switched off.
14.6 Enable and disable
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all
I/Os to assume the high-impedance OFF-state. The disable time (tdis with no external
load) indicates the delay between when OE goes LOW and when outputs actually
become disabled. The enable time (ten) indicates the amount of time to allow for one
one-shot circuitry to become operational after OE is taken HIGH. To ensure the
high-impedance OF F-state during p ower-u p or power - down, tie pin OE to GND thr ou gh a
pull-down resistor. The minimum value of the resistor is determined by the
current-sourcing capability of the driver.
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 15 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
14.7 Pull-up or pull-down resistors on I/Os lines
The A port I/O has an internal 10 k pull-up resistor to VCC(A). The B port I/O has an
internal 10 k pull-up resistor to VCC(B). If a smaller value of pull-up resistor is required,
add an external re sistor in parallel with the internal 10 k. This af fects the VOL level. When
OE goes LOW, the internal pull-ups of the NTS0101 are disabled.
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 16 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
15. Package outline
Fig 10. Package outline SOT363 (SC-88)
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 17 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
Fig 11. Package outline SOT457 (TSOP6)
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 18 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
Fig 12. Package outline SOT886 (XSON6)
References
Outline
version European
projection Issue date
IEC JEDEC JEITA
SOT886 MO-252
sot886_po
04-07-22
12-01-05
Unit
mm max
nom
min
0.5 0.04 1.50
1.45
1.40
1.05
1.00
0.95
0.35
0.30
0.27
0.40
0.35
0.32
0.6
A(1)
Dimensions (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886
A1b
0.25
0.20
0.17
DEee
1
0.5
LL
1
terminal 1
index area
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
1
6
2
5
3
4
6x
(2)
4x
(2)
A
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 19 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
Fig 13. Package outline SOT891 (XSON6)
terminal 1
index area
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT891
SOT891
05-04-06
07-05-15
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm 0.20
0.12 1.05
0.95 0.35
0.27
A1
max b E
1.05
0.95
Dee
1L
0.40
0.32
L1
0.350.55
A
max
0.5 0.04
1
6
2
5
3
4
A
6×
(1)
4×
(1)
Note
1. Can be visible in some manufacturing processes.
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 20 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
Fig 14. Package outline SOT1202 (XSON6)
References
Outline
version European
projection Issue date
IEC JEDEC JEITA
SOT1202
sot1202_po
10-04-02
10-04-06
Unit
mm max
nom
min
0.35 0.04 1.05
1.00
0.95
1.05
1.00
0.95 0.55 0.35 0.40
0.35
0.32
A(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm SOT1202
A1b
0.20
0.15
0.12
DEee
1L
0.35
0.30
0.27
L1
0 0.5 1 mm
scale
terminal 1
index area
D
E
(4×)(2)
e1e1
e
L
b
123
L1
6 5 4
(6×)(2)
A
A1
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 21 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
16. Abbreviations
17. Revision history
Table 14. Abbreviations
Acronym Description
CDM Charged Device Mo del
DUT Device Under Test
ESD ElectroStatic Discharge
GPIO General Purpose Input Output
HBM Human Body Model
I2C Inter-Integrated Circuit
MM Machine Model
PCB Printed Circuit Board
PMOS Positive Metal Oxide Semiconductor
SMBus System Management Bus
UART Universal Asynchronous Receiver Transmitter
Table 15. Revision history
Document ID Release date Data sheet status Change notice Supersedes
NTS0101 v.4 20120904 Product data sheet - NTS0101 v.3
Modifications: •Package outline drawing of SOT886 (Figure 12) modified.
NTS0101 v.3 20111110 Product da ta sheet - NTS0101 v.2
Modifications: •Legal pages updated.
NTS0101 v.2 20110427 Product data sheet - NTS0101 v.1
NTS0101 v.1 20101230 Product data sheet - -
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 22 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
18. Legal information
18.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond tho se described in the
Product data sheet.
18.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an inf ormation
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability t owards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, lif e-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applicati ons or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by cust omer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
NTS0101 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 4 September 2012 23 of 24
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for aut omotive use. It i s neither qua lif ied nor test ed
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in au tomotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standard s, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting f rom customer design an d
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a docume nt is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
18.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors NTS0101
Dual supply translating transceiver ; open drain; a uto direct ion sensing
© NXP B.V. 2012. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 4 September 2012
Document identifier: NTS0101
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
20. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
8 Functional description . . . . . . . . . . . . . . . . . . . 3
9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
10 Recommended operating conditions. . . . . . . . 4
11 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
12 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
13 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
14 Application information. . . . . . . . . . . . . . . . . . 13
14.1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14.2 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14.3 Input driver requirements . . . . . . . . . . . . . . . . 14
14.4 Output load considerations. . . . . . . . . . . . . . . 14
14.5 Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
14.6 Enable and disable. . . . . . . . . . . . . . . . . . . . . 14
14.7 Pull-up or pull-down resistors on I/Os lines . . 15
15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
16 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 21
17 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 21
18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22
18.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22
18.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
18.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
18.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
19 Contact information. . . . . . . . . . . . . . . . . . . . . 23
20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24