REV. C
a
OP07
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
Ultralow Offset Voltage
Operational Amplifier
FEATURES
Low VOS: 75 V Max
Low VOS Drift: 1.3 V/C Max
Ultrastable vs. Time: 1.5 V/Month Max
Low Noise: 0.6 V p-p Max
Wide Input Voltage Range: 14 V
Wide Supply Voltage Range: 3 V to 18 V
Fits 725,108A/308A, 741, AD510 Sockets
125C Temperature-Tested Dice
APPLICATIONS
Wireless Base Station Control Circuits
Optical Network Control Circuits
Instrumentation
Sensors and Controls
Thermocouples
RTDs
Strain Bridges
Shunt Current Measurements
Precision Filters
GENERAL DESCRIPTION
The OP07 has very low input offset voltage (75 µV max for
OP07E) that is obtained by trimming at the wafer stage. These
low offset voltages generally eliminate any need for external null-
ing. The OP07 also features low input bias current (±4 nA for the
OP07E) and high open-loop gain (200 V/mV for the OP07E).
The low offsets and high open-loop gain make the OP07 particu-
larly useful for high gain instrumentation applications.
The wide input voltage range of ±13 V minimum combined with a
high CMRR of 106 dB (OP07E) and high input impedance pro-
vide high accuracy in the noninverting circuit configuration.
Excellent linearity and gain accuracy can be maintained even at
high closed-loop gains. Stability of offsets and gain with time or
variations in temperature is excellent. The accuracy and stability
of the OP07, even at high gain, combined with the freedom
from external nulling have made the OP07 an industry standard
for instrumentation applications.
The OP07 is available in two standard performance grades. The
OP07E is specified for operation over the 0°C to 70°C range, and
the OP07C is specified over the –40°C to +85°C temperature range.
The OP07 is available in epoxy 8-lead PDIP and 8-lead SOIC. It
is a direct replacement for 725, 108A, and OP05 amplifiers;
741 types may be directly replaced by removing the 741’s nulling
potentiometer. For improved specifications, see the OP177 or
OP1177. For ceramic DIP and TO-99 packages and standard
micro circuit (SMD) versions, see the OP77.
6
V+
7
8
3
C3
1
4
2
OUTPUT
Q5
R2A*
R5
*NOTE
R2A AND R2B ARE
ELECTRONICALLY
ADJUSTED ON CHIP
AT FACTORY FOR
MINIMUM INPUT
OFFSET VOLTAGE.
R8
R7
V–
R6
NONINVERTING
INPUT
INVERTING
INPUT
R3
R4
Q21
Q22
Q23
Q24
R1A
R2B*
R1B
Q7
Q3 Q6
Q1
Q4
Q2
Q27
Q26
Q25
C1
Q9 Q10
Q11 Q12
C2
(OPTIONAL
NULL)
Q13
Q14
Q17
Q16
Q15
Q18
Q20
Q19
R10
R9
Q8
Figure 1. Simplified Schematic
PIN CONNECTIONS
8-Lead PDIP (P-Suffix)
8-Lead SOIC (S-Suffix)
8
7
6
5
1
2
3
4
NC = NO CONNECT
VOS T RIM
–IN
+IN
VOS T RIM
V+
OUT
NCV–
OP07
–2– REV. C
OP07–SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage
1
V
OS
30 75 µV
Long-Term V
OS
Stability
2
V
OS
/Time 0.3 1.5 µV/Mo
Input Offset Current I
OS
0.5 3.8 nA
Input Bias Current I
B
±1.2 ±4.0 nA
Input Noise Voltage e
n
p-p 0.1 Hz to 10 Hz
3
0.35 0.6 µV p-p
Input Noise Voltage Density e
n
f
O
= 10 Hz 10.3 18.0 nV/√Hz
f
O
= 100 Hz
3
10.0 13.0 nV/√Hz
f
O
= 1 kHz 9.6 11.0 nV/√Hz
Input Noise Current I
n
p-p 14 30 pA p-p
Input Noise Current Density I
n
f
O
= 10 Hz 0.32 0.80 pA/√Hz
f
O
= 100 Hz
3
0.14 0.23 pA/√Hz
f
O
= 1 kHz 0.12 0.17 pA/√Hz
Input Resistance—Differential Mode
4
R
IN
15 50 MΩ
Input Resistance—Common-Mode R
INCM
160 GΩ
Input Voltage Range IVR ±13 ±14 V
Common-Mode Rejection Ratio CMRR V
CM
= ±13 V 106 123 dB
Power Supply Rejection Ratio PSRR V
S
= ±3 V to ±18 V 5 20 µV/V
Large Signal Voltage Gain A
VO
R
L
≥ 2 kΩ, V
O
= ±10 V 200 500 V/mV
R
L
≥ 500 Ω, V
O
= ±0.5 V,
V
S
= ±3 V
4
150 400 V/mV
OUTPUT CHARACTERISTICS
Output Voltage Swing V
O
R
L
≥ 10 kΩ±12.5 ±13.0 V
R
L
≥ 2 kΩ±12.0 ±12.8 V
R
L
≥ 1 kΩ±10.5 ±12.0 V
DYNAMIC PERFORMANCE
Slew Rate SR R
L
≥ 2 kΩ
3
0.1 0.3 V/µs
Closed-Loop Bandwidth BW A
VOL
= 1
5
0.4 0.6 MHz
Closed-Loop Output Resistance R
O
V
O
= 0, I
O
= 0 60 Ω
Power Consumption P
d
V
S
= ±15 V, No Load 75 120 mW
V
S
= ±3 V, No Load 4 6 mW
Offset Adjustment Range R
P
= 20 kΩ±4mV
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Long-term input offset voltage stability refers to the averaged trend time of V
OS
vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in V
OS
during the first 30 operating days are typically 2.5 µV, refer to the typical performance characteristics. Parameter is sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
Specifications subject to change without notice.
(VS = 15 V, TA = 25C, unless otherwise noted.)
–3–
REV. C
OP07
OP07C ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage
1
V
OS
60 150 µV
Long-Term V
OS
Stability
2
V
OS
/Time 0.4 2.0 µV/Mo
Input Offset Current I
OS
0.8 6.0 nA
Input Bias Current I
B
±1.8 ±7.0 nA
Input Noise Voltage e
n
p-p 0.1 Hz to 10 Hz
3
0.38 0.65 µV p-p
Input Noise Voltage Density e
n
f
O
= 10 Hz 10.5 20.0 nV/√Hz
f
O
= 100 Hz
3
10.2 13.5 nV/√Hz
f
O
= 1 kHz 9.8 11.5 nV/√Hz
Input Noise Current I
n
p-p 15 35 pA p-p
Input Noise Current Density I
n
f
O
= 10 Hz 0.35 0.90 pA/√Hz
f
O
= 100 Hz
3
0.15 0.27 pA/√Hz
f
O
= 1 kHz 0.13 0.18 pA/√Hz
Input Resistance—Differential Mode
4
R
IN
833 MΩ
Input Resistance—Common-Mode R
INCM
120 GΩ
Input Voltage Range IVR ±13 ±14 V
Common-Mode Rejection Ratio CMRR V
CM
= ±13 V 100 120 dB
Power Supply Rejection Ratio PSRR V
S
= ±3 V to ±18 V 7 32 µV/V
Large Signal Voltage Gain A
VO
R
L
≥ 2 kΩ, V
O
= ±10 V 120 400 V/mV
R
L
≥ 500 Ω, V
O
= ±0.5 V,
V
S
= ±3 V
4
100 400 V/mV
OUTPUT CHARACTERISTICS
Output Voltage Swing V
O
R
L
≥ 10 kΩ±12.0 ±13.0 V
R
L
≥ 2 kΩ±11.5 ±12.8 V
R
L
≥ 1 kΩ±12.0 V
DYNAMIC PERFORMANCE
Slew Rate SR R
L
≥ 2 kΩ
3
0.1 0.3 V/µs
Closed-Loop Bandwidth BW A
VOL
= 1
5
0.4 0.6 MHz
Closed-Loop Output Resistance R
O
V
O
= 0, I
O
= 0 60 Ω
Power Consumption P
d
V
S
= ±15 V, No Load 80 150 mW
V
S
= ±3 V, No Load 4 8 mW
Offset Adjustment Range R
P
= 20 kΩ±4mV
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Long-term input offset voltage stability refers to the averaged trend time of V
OS
vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in V
OS
during the first 30 operating days are typically 2.5 µV, refer to the typical performance characteristics. Parameter is sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
Specifications subject to change without notice.
(VS = 15 V, TA = 25C, unless otherwise noted.)
–4– REV. C
OP07–SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage
1
V
OS
45 130 µV
Voltage Drift without External Trim
2
TCV
OS
0.3 1.3 µV/°C
Voltage Drift with External Trim
3
TCV
OSN
R
P
= 20 kΩ0.3 1.3 µV/°C
Input Offset Current I
OS
0.9 5.3 nA
Input Offset Current Drift TCI
OS
835pA/°C
Input Bias Current I
B
±1.5 ±5.5 nA
Input Bias Current Drift TCI
B
13 35 pA/°C
Input Voltage Range IVR ±13 ±13.5 V
Common-Mode Rejection Ratio CMRR V
CM
= ±13 V 103 123 dB
Power Supply Rejection Ratio PSRR V
S
= ±3 V to ±18 V 7 32 µV/V
Large Signal Voltage Gain A
VO
R
L
≥ 2 kΩ, V
O
= ±10 V 180 450 V/mV
OUTPUT CHARACTERISTICS
Output Voltage Swing V
O
R
L
≥ 10 kΩ±12 ±12.6 V
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Guaranteed by design.
3
Sample tested.
Specifications subject to change without notice.
(VS = 15 V, 0C TA 70C, unless otherwise noted.)
OP07C ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage
1
V
OS
85 250 µV
Voltage Drift without External Trim
2
TCV
OS
0.5 1.8 µV/°C
Voltage Drift with External Trim
3
TCV
OSN
R
P
= 20 kΩ0.4 1.8 µV/°C
Input Offset Current I
OS
1.6 8.0 nA
Input Offset Current Drift TCI
OS
12 50 pA/°C
Input Bias Current I
B
±2.2 ±9.0 nA
Input Bias Current Drift TCI
B
18 50 pA/°C
Input Voltage Range IVR ±13 ±13.5 V
Common-Mode Rejection Ratio CMRR V
CM
= ±13 V 97 120 dB
Power Supply Rejection Ratio PSRR V
S
= ±3 V to ±18 V 10 51 µV/V
Large Signal Voltage Gain A
VO
R
L
≥ 2 kΩ, V
O
= ±10 V 100 400 V/mV
OUTPUT CHARACTERISTICS
Output Voltage Swing V
O
R
L
≥ 10 kΩ±11 ±12.6 V
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Guaranteed by design.
3
Sample tested.
Specifications subject to change without notice.
(VS = 15 V, 40C TA 85C, unless otherwise noted.)
–5–
OP07
REV. C
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage (V
S
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±30 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
S, P Packages . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range
OP07E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
OP07C . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . 150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
2
For supply voltages less than ±22 V, the absolute maximum input voltage is equal
to the supply voltage.
Package Type
JA
*
JC
Unit
8-Lead PDIP (P) 103 43 °C/W
8-Lead SOIC (S) 158 43 °C/W
*
JA
is specified for worst-case conditions, i.e.,
JA
is specified for device in socket
for PDIP package, and
JA
is specified for device soldered to printed circuit board
for SOIC package.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
OP07 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
OP07EP 0°C to 70°C8-Lead PDIP P-8
OP07CP –40°C to +85°C8-Lead PDIP P-8
OP07CS –40°C to +85°C8-Lead SOIC S-8
OP07CS-REEL –40°C to +85°C8-Lead SOIC S-8
OP07CS-REEL7 –40°C to +85°C8-Lead SOIC S-8
–6–
OP07
REV. C
– Typical Performance Characteristics
TEMPERATURE (C)
1000
0
100–50
OPEN-LOOP GAIN (V/mV)
050
600
400
200
800
V
S
= 15V
TPC 1. Open-Loop Gain vs.
Temperature
MATCHED OR UNMATCHED SOURCE RESISTANCE ()
1.0
0.8
0
100 100k1k
MAXIMUM ERROR REFERRED TO INPUT (mV)
10k
0.6
0.4
0.2
OP07E
OP07C
TPC 4. Maximum Error vs.
Source Resistance
TEMPERATURE (C)
4
0100–50
INPUT BIAS CURRENT (nA)
050
3
2
1
OP07C
OP07E
V
S
= 15V
TPC 7. Input Bias Current vs.
Temperature
TIME (s)
30
0
–20 1000
ABSOLUTE CHANGE IN INPUT
OFFSET VOLTAGE (V)
20 40 60 80
25
20
15
10
5
THERMAL
SHOCK
RESPONSE
BAND
DEVICE IMMERSED
IN 70C OIL BATH
VS = 15V
TA = 25C, TA = 70C
TPC 2. Offset Voltage Change
due to Thermal Shock
MATCHED OR UNMATCHED SOURCE RESISTANCE ()
1.2
0.8
0
100 100k1k
MAXIMUM ERROR REFERRED TO INPUT (mV)
10k
0.6
0.4
0.2
OP07C
1.0
OP07E
VS = 15V
0C TA 70C
TPC 5. Maximum Error vs.
Source Resistance
TEMPERATURE (C)
2.5
–100 100–50
INPUT OFFSET CURRENT (nA)
050
2.0
1.5
1.0 OP07C
OP07E
0.5
V
S
= 15V
0
TPC 8. Input Offset Current
vs. Temperature
V
S
= 15V
T
A
= 25C
TIME AFTER SUPPLY TURN-ON (Minutes)
25
20
0
051
ABSOLUTE CHANGE IN INPUT
OFFSET VOLTAGE (V)
234
15
10
5
OP07C
OP07E
TPC 3. Warm-Up Drift
DIFFERENTIAL INPUT VALUE (V)
30
–30
–30 30–20
NONINVERTING INPUT BIAS CURRENT (mA)
–10 0 10 20
20
10
0
–10
–20
AT | V
DIFF
| < 1.0V. |I
B
| < 7nA (OP07C)
V
S
= 15V
T
A
= 25C
TPC 6. Input Bias Current vs.
Differential Input Voltage
TIME (1s/DIV)
0
0
VOLTAGE (200nV/DIV)
0
0
0
0
0
0
REFERRED TO INPUT
5mV/CM AT OUTPUT
TPC 9. Low Frequency Noise
–7–
OP07
REV. C
FREQUENCY (Hz)
1000
1.0
1.0 1k
100
10010
10
RS = 0
VS = 15V
TA = 25C
RS1 = RS2 = 200k
THERMAL NOISE SOURCE
RESISTORS INCLUDED
EXCLUDED
INPUT NOISE VOLTAGE (nV/ Hz)
TPC 10. Total Input Noise
Voltage vs. Frequency
FREQUENCY (Hz)
120
110
500.1 10k1.0
PSRR (dB)
10 100 1k
100
90
80
70
60
OP07C
T
A
= 25C
TPC 13. PSRR vs. Frequency
FREQUENCY (Hz)
100
–20
10 10M100
CLOSED-LOOP GAIN (dB)
1k 10k 100k 1M
80
60
40
20
0
V
S
= 15V
T
A
= 25C
TPC 16. Closed-Loop Response
for Various Gain Configurations
FREQUENCY (Hz)
10
0.1
1.0 1k10010
1.0
VS = 15V
TA = 25C
RMS NOISE (V)
TPC 11. Input Wideband Noise vs.
Bandwidth (0.1 Hz to Frequency
Indicated)
POWER SUPPLY VOLTAGE (V)
1000
0
0205
OPEN-LOOP GAIN (V/mV)
10 15
800
600
400
200
TA = 25C
TPC 14. Open-Loop Gain vs.
Power Supply Voltage
FREQUENCY (Hz)
28
24
0
1k 1M10k
PEAK-TO-PEAK AMPLITUDE (V)
100k
20
16
12
8
4
VS = 15V
TA = 25C
TPC 17. Maximum Output
Swing vs. Frequency
FREQUENCY (Hz)
130
120
60
1.0 100k10
CMRR (dB)
100 1k 10k
110
100
90
80
70
OP07C
OP07
TPC 12. CMRR vs. Frequency
FREQUENCY (Hz)
120
–40
0.1 10M1
OPEN-LOOP GAIN (dB)
10 100 1k 10k 100k 1M
40
0
80
VS = 15V
TA = 25C
TPC 15. Open-Loop Frequency
Response
LOAD RESISTANCE TO GROUND ()
20
15
0
100 10k1k
ABSOLUTE VALUE OF OFFSET VOLTAGE (V)
10
5
POSITIVE SWING
NEGATIVE SWING
V
S
= 15V
V
IN
= 10mV
T
A
= 25C
TPC 18. Maximum Output
Voltage vs. Load Resistance
–8–
OP07
REV. C
FREQUENCY (Hz)
1000
1.0 060
100
4020
10
T
A
= 25C
POWER CONSUMPTION (mV)
TPC 19. Power Consumption
vs. Power Supply
TEMPERATURE (C)
4
0
100–50
ABSOLUTE VALUE OF OFFSET VOLTAGE (V)
050
3
2
1
OP07C
OP07E
V
OS
TRIMMED TO < 5V AT 25C
NULLING POT = 20k
OP07C
OP07E
TPC 22. Trimmed Offset
Voltage vs. Temperature
FREQUENCY (Hz)
1000
1.0
060
100
4020
10
V
S
= 15V
T
A
= 25C
INPUT NOISE VOLTAGE (nV/ Hz)
V
IN
(PIN 3) = –10mV, V
O
= +15V
V
IN
(PIN 3) = +10mV, V
O
= –15V
TPC 20. Output Short-Circuit
Current vs. Time
TIME (Months)
16
–4
–16
0121
TOTAL DRIFT WITH TIME (V)
234567891011
12
0
–8
–12
8
4
0.2V/mo.
TREND LINE
0.2V/mo.
TREND LINE
0.3V/mo. TREND LINE
0.2V/mo.
TREND LINE
0.3V/mo.
TREND LINE
0.3V/mo. TREND LINE
TPC 23. Offset Voltage Stability
vs. Time
TEMPERATURE (C)
4
0
100–50
ABSOLUTE VALUE OF OFFSET VOLTAGE (V)
050
3
2
1
OP07C
OP07E
V
S
= 15V
R
S
= 100
TPC 21. Untrimmed Offset
Voltage vs. Temperature
–9–
OP07
REV. C
6
V+
7
4
3
2
OP07C
A1
R1
6
V–
7
4
3
2
AD7115 OR
AD8510A
EO
RF
V+
R3
3k
R2
100k
R5
10k
RIN SUM MODE
BIAS
RF
R1
V–
EO = –EIN – IBIAS RF
Figure 2. Typical Offset Voltage Test Circuit
E3
R3
10k
6
–15V
7
4
3
2
OP07C
EO
R4
10k
+15V
R5
2.5k
E2
R2
10k
E1
R1
10k
Figure 3. Typical Low Frequency Noise Circuit
6
V–
7
4
3
2
OP07
EO
R3
V+
R4
E2
R2
R1
SENDING
JUNCTION
REFERENCE
JUNCTION
R1
R3
R2
R4
=
Figure 4. Optional Offset Nulling Circuit
6
V–
7
4
3
2
OP07
EO
V+
EIN
R1
R3
R2
R4
=
0V TO 10V
R2
10k
6
V–
7
4
3
2
OP07
V+
10V
R1
10k
R3
10k
R4
10k
R5
10k
FD333
D1
FD333
D2
Figure 5. Burn-In Circuit
6
V+
7
4
3
2
OP07C
A1
R1
6
V–
7
4
3
2
EO
RF
V+
R3
3k
R2
100k
R1
10k
RIN SUM MODE
BIAS
RF
R1
V– EO = –EIN + IBIAS RF
OP07C
A2
PINOUT SHOWN FOR P PACKAGE
Figure 6. High Speed, Low V
OS
Composite Amplifier
E
3
R3
10k
6
–15V
7
4
3
2
OP07A
E
O
R4
10k
+15V
R5
2.5k
E
2
R2
10k
E
1
R1
10k
PINOUT SHOWN FOR P PACKAGE
Figure 7. Adjustment-Free Precision Summing Amplifier
–10–
OP07
REV. C
TYPICAL APPLICATIONS
6
V–
7
4
3
2
OP07
E
O
R3
V+
R4
R2
R1
SENSING
JUNCTION
REFERENCE
JUNCTION
R1
R3
R2
R4
=
PINOUT SHOWN FOR P PACKAGE
Figure 8. High Stability Thermocouple Amplifier
6
V–
7
4
3
2
OP07
A2
EO
V+
EIN
0V TO 10V
R2
10k
6
V–
7
4
3
2
OP07
A1
V+
10V
R1
10k
R3
10k
R4
10k
R5
10k
FD333
D1
FD333
D2
VA
PINOUT SHOWN FOR P PACKAGE
Figure 9. Precision Absolute-Value Circuit
APPLICATIONS INFORMATION
The OP07 series units may be substituted directly into 725,
108A/308A, and OP05 sockets with or without removal of ex-
ternal compensation or nulling components. Additionally, the
OP07 may be used in unnulled 741 type sockets. However, if
conventional 741 nulling circuitry is in use, it should be modi-
fied or removed to enable proper OP07 operation. The OP07
offset voltage may be nulled to 0 through use of a potentiometer
(see offset nulling circuit diagram).
PRECISION ABSOLUTE-VALUE CIRCUIT
The OP07 provides stable operation with load capacitance of
up to 500 pF and ±10 V swings; larger capacitances should be
decoupled with a 50 Ω decoupling resistor.
Stray thermoelectric voltages generated by dissimilar metals at
the contacts to the input terminals can degrade drift performance.
Therefore, best operation will be obtained when both input con-
tacts are maintained at the same temperature, preferably close to
the package temperature.
–11–
OP07
REV. C
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
S-Suffix
(R-8)
Dimensions shown in millimeters and (inches)
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45
8
0
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
85
41
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012AA
8-Lead Plastic Dual-in-Line Package [PDIP]
P-Suffix
(N-8)
Dimensions shown in inches and (millimeters)
SEATING
PLANE
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79) 0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
8
14
50.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.100 (2.54)
BSC
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
0.015
(0.38)
MIN
–12–
C00316–0–8/03(C)
OP07
REV. C
Revision History
Location Page
8/03—Data Sheet changed from REV. B to REV. C.
Changes to OP07E ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes to OP07C ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Edits to Figure 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3/03—Data Sheet changed from REV. A to REV. B.
Updated Package Titles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/02—Data Sheet changed from REV. 0 to REV. A.
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to PIN CONNECTION drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Deleted ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3
Deleted OP07D Column from ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–5
Edits to TPCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7–9
Edits to HIGH-SPEED, LOW V
OS
COMPOSITE AMPLIFIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
