REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device types 02. Technical changes to 1.3, 1.4, and table I. Change to figures 1, 2, and 3. Add vendor CAGE 01295. Editorial changes throughout. Remove JAN replacement part number M38510/75652BRX and 2X. 89-06-05 M. A. Frye B Add vendor CAGE F8859. Add device type 03. Add case outline X. Add table III, delta limits. Update drawing to MIL-PRF-38535 requirements. jak 02-12-23 Thomas M. Hess C Add radiation features for device type 03 in section 1.5. Update the boilerplate to include radiation hardness assured requirements for device type 03. Editorial changes throughout. - jak 05-02-22 Thomas M. Hess REV SHEET REV C C C C SHEET 15 16 17 18 REV STATUS REV C C C C C C C C C B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY James E. Nicklaus STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY D. A. DiCenzo APPROVED BY Michael A. Frye THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-03-02 REVISION LEVEL AMSC N/A MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL D-TYPE FLIP-FLOP, TTL COMPATIBLE INPUTS, THREE-STATE OUTPUTS, MONOLITHIC SILICON C SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 1 OF 5962-87631 18 5962-E168-05 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - Federal stock class designator \ 87631 01 RHA designator (see 1.2.1) L Device type (see 1.2.2) A Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number For device class V: 5962 F Federal stock class designator \ 87631 01 RHA designator (see 1.2.1) V Device type (see 1.2.2) / L Device class designator (see 1.2.3) Case outline (see 1.2.4) A Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 54ACT374 02 54ACT11374 03 54ACT374 Circuit function Octal D-type flip-flop with three-state outputs and TTL compatible inputs Octal D-type flip-flop with three-state outputs and TTL compatible inputs Octal D-type flip-flop with three-state outputs and TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class M Q or V STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 Device requirements documentation Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MILPRF-38535, appendix A Certification and qualification to MIL-PRF-38535 SIZE 5962-87631 A REVISION LEVEL C SHEET 2 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter L R S X 2 3 Descriptive designator GDIP3-T24 or CDIP4-T24 GDIP1-T20 or CDIP2-T20 GDFP2-F20 or CDFP3-F20 See figure 1 CQCC1-N20 CQCC1-N28 Terminals Package style 24 20 20 20 20 28 Dual-in-line Dual-in-line Flat pack Flat pack Square leadless chip carrier Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) .................................................................................. -0.5 V dc to +6.0 V dc DC input voltage range (VIN) ................................................................................ -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) ........................................................................... -0.5 V dc to VCC+ 0.5 V dc Clamp diode current............................................................................................. 20 mA DC output current (IOUT) (per pin)......................................................................... 50 mA DC VCC or GND current (per pin) ......................................................................... 100 mA Storage temperature range (TSTG) ....................................................................... -65C to +150C Maximum power dissipation (PD) ......................................................................... 500 mW Lead temperature (soldering, 10 seconds)........................................................... +260C Thermal resistance, junction-to-case (JC) ........................................................... See MIL-STD-1835 Junction temperature (TJ) .................................................................................... +175C 3/ 1.4 Recommended operating conditions. 2/ 4/ Supply voltage range (VCC) .................................................................................. +4.5 V dc to +5.5 V dc Input voltage range (VIN) ...................................................................................... +0.0 V dc to VCC Output voltage range (VOUT)................................................................................. +0.0 V dc to VCC Case operating temperature range (TC) ............................................................... -55C to +125C Input rise or fall rate (t/t): VCC = 4.5 V to 5.5 V ........................................................................................... 0 to 8 ns/V Minimum setup time, Dn to CP (ts): Device types 01, 03, TC = +25C, VCC = 4.5 V ................................................... 4.5 ns Device type 02, TC = +25C, VCC = 4.5 V........................................................... 3.0 ns Device types 01, 03, TC = -55C to +125C, VCC = 4.5 V ................................... 5.5 ns Device type 02, TC = -55C to +125C, VCC = 4.5 V.......................................... 3.0 ns Minimum hold time, Dn to CP (th): Device types 01, 03, TC = +25C, VCC = 4.5 V ................................................... 2.0 ns Device type 02, TC = +25C, VCC = 4.5 V........................................................... 5.5 ns Device types 01, 03, TC = -55C to +125C, VCC = 4.5 V ................................... 2.0 ns Device type 02, TC = -55C to +125C, VCC = 4.5 V ........................................ 5.5 ns Minimum pulse width, Dn to CP (tw): Device types 01, 03, TC = +25C, VCC = 4.5 V ................................................... 5.5 ns Device type 02, TC = +25C, VCC = 4.5 V........................................................... 9.0 ns Device types 01, 03, TC = -55C to +125C, VCC = 4.5 V ................................... 7.4 ns Device type 02, TC = -55C to +125C, VCC = 4.5 V.......................................... 9.0 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ Unless otherwise specified, the values listed above shall apply over the full VCC and TC recommended operating range. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 3 1.4 Recommended operating conditions - Continued. 2/ 4/ Minimum clock frequency (fMAX): Device types 01, 03, TC = +25C, VCC = 4.5 V ................................................... 92 MHz Device type 02, TC = +25C, VCC = 4.5 V........................................................... 55 MHz Device types 01, 03, TC = -55C to +125C, VCC = 4.5 V ................................... 68 MHz Device type 02, TC = -55C to +125C, VCC = 4.5 V.......................................... 55 MHz 1.5 Radiation features. Device type 03: Maximum total dose available (dose rate = 50 - 300 rads (Si)/s) .................... 300 krads (Si) Single Event Latch-up (SEL)............................................................................ 93 MeV-cm2/mg 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http://www.jedec.org or from the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 4 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 and figure 1 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 5 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Positive input clamp voltage 3022 Negative input clamp voltage 3022 High level output voltage 3006 Symbol Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VIC+ For input under test, IIN = 1.0 mA VIC- For input under test, IIN = -1.0 mA VOH 6/ VIN = VIH minimum or VIL maximum IOH = -50 A VIN = VIH minimum or VIL maximum IOH = -24 mA Low level output voltage 3007 VOL 6/ Device type and 4/ device class 01, 03 V VCC Min Max Unit 1 0.4 1.5 V 01, 03 V Open 1 -0.4 -1.5 V All All 4.5 V 1, 2, 3 4.4 All All 5.5 V 5.4 4.5 V 3.7 5.5 V 4.7 3.85 All All 5.5 V VIN = VIH minimum or VIL maximum IOL = 50 A All All 4.5 V VIN = VIH minimum or VIL maximum IOL = 50 mA Limits 5/ 0.0 V VIN = VIH minimum or VIL maximum IOH = -50 mA VIN = VIH minimum or VIL maximum IOL = 24 mA Group A subgroups V 5.5 V 0.1 4.5 V 0.5 5.5 V 0.5 All All 5.5 V 1.65 All All V 0.1 1, 2, 3 V High level input voltage VIH 7/ All All 4.5 V 5.5 V 1, 2, 3 2.0 2.0 Low level input voltage VIL 7/ All All 4.5 V 5.5 V 1, 2, 3 0.8 0.8 Input leakage current low 3009 IIL VIN = 0.0 V All All 5.5 V 1, 2, 3 -1.0 A Input leakage current high 3010 IIH VIN = 5.5 V All All 5.5 V 1, 2, 3 1.0 A See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified Off-state output leakage current (high) 3021 Off-state output leakage current (low) 3020 IOZH VIN = VCC or GND VOUT = VCC or GND Device type and 4/ device class All All IOZL VIN = VCC or GND VOUT = VCC or GND Quiescent supply current delta, TTL input levels 3005 ICC 8/ VIN = VCC - 2.1 V All other inputs = VCC or GND Quiescent supply current, outputs high 3005 ICCH Dn, OE CP Dn, OE, CP VIN = VCC or GND M, D, P, L, R, F 9/ Quiescent supply current, outputs low 3005 ICCL VIN = VCC or GND M, D, P, L, R, F 9/ Quiescent supply current, outputs tri-state 3005 ICCZ VIN = VCC or GND M, D, P, L, R, F 9/ Input capacitance 3012 Power dissipation capacitance Functional tests 3014 CIN CPD 10/ 11/ See 4.4.1c TC = +25C See 4.4.1c TC = +25C See 4.4.1b VIN = VIH or VIL Verify output VOUT VCC Group A subgroups Limits 5/ Min Unit Max 5.5 V 1, 2, 3 10.0 A All All 5.5 V 1, 2, 3 -10.0 A 01, 02 All 5.5 V 1, 2, 3 1.6 mA 03 All 5.5 V 1, 2, 3 1.6 mA 01, 02 All 03 All 5.5 V 1, 2, 3 160 A 5.5 V 1 2.0 2, 3 1 160 50 5.5 V 1, 2, 3 160 5.5 V 1 2.0 2, 3 1 160 50 5.5 V 1, 2, 3 160 5.5 V 1 2.0 2, 3 160 1 50 GND 4 10.0 5.0 V 4 95 5.0 V 4 134 4.5 V 7, 8 L H 5.5 V 7, 8 L H 03 Q, V 01, 02 All 03 All 03 Q, V 01, 02 All 03 All 03 Q, V All All 01, 03 All 02 All All All 3.0 A A pF See footnotes at the end of the table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 7 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Propagation delay time, CP to Qn 3003 Symbol tPHL, tPLH Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified CL = 50 pF minimum RL = 500 See figure 5 Device type and 4/ device class 01, 03 All VCC 4.5 V 12/ 02 All Propagation delay time, output enable, OE to Qn 3003 tPZH, tPZL CL = 50 pF minimum RL = 500 See figure 5 01, 03 All 4.5 V 12/ 02 All Propagation delay time, output disable, OE to Qn 3003 4.5 V tPHZ, tPLZ CL = 50 pF minimum RL = 500 See figure 5 01, 03 All 4.5 V 4.5 V 12/ 02 All 4.5 V Group A subgroups Limits 5/ Min Max 9 1.0 10.0 10, 11 1.0 12.6 9 1.0 11.3 10, 11 1.0 13.9 9 1.0 10.7 10, 11 1.0 14.5 9 1.0 11.0 10, 11 1.0 13.2 9 1.0 11.0 10, 11 1.0 14.5 9 1.0 12.7 10, 11 1.0 13.6 Unit ns ns ns ns ns ns 1/ For tests not listed in the referenced MIL-STD-883 [e.g. ICC], utilize the general test procedure under the conditions listed herein. 2/ Each input/output, as applicable, shall be tested at the specified temperature for the specified limits, to the tests in table I herein. Output terminals not designated shall be high level logic, low level logic, or open, except as follows: 3/ a. VIC (pos) tests, the GND terminal can be open. TC = +25C. b. VIC (neg) tests, the VCC terminal shall be open. TC = +25C. c. All ICC and ICC tests, the output terminal shall be open. When performing these tests, the current meter shall be placed in the circuit such that all current flows through the meter. RHA parts for device type 03 meet all levels M, D, P, L, R, and F of irradiation. However, these parts are only tested at the "F" level. Pre and post irradiation values are identical unless otherwise specified in table I. When performing post irradiation electrical measurements for any RHA level , TA = 25C. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 8 TABLE I. Electrical performance characteristics - Continued. 4/ The word "All" in the device type and device class column, means limits for all device types and device classes. 5/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 6/ VOH and VOL tests will be tested at VCC = 4.5 V. VOH and VOL are guaranteed, if not tested, for VCC = 5.5 V. Limits shown apply to operation at VCC = 5.0 V 0.5 V. Transmission driving tests are performed at VCC = 5.5 V with a 2 millisecond duration maximum. 7/ The VIH and VIL tests are not required if applied as forcing functions for VOH and VOL tests. 8/ This test may be performed either one input at a time (preferred method) or with all input pins simultaneously at VIN = VCC - 2.1 V (alternate method). Classes Q and V shall use the preferred method. When the test is performed using the alternate test method, the maximum limit is equal to the number of inputs at a high TTL input level times ICC maximum; and the preferred method and limits are guaranteed. 9/ The maximum limit for this parameter at 100 krads(si) is 2.0 A. 10/ Power dissipation capacitance (CPD) determines the no load dynamic power consumption, PD = (CPD + CL) (VCC x VCC)f + (ICC x VCC) + (n x d x ICC x VCC) and the dynamic current consumption, IS = (CPD + CL)VCCf + ICC + n x d x ICC. For both PD and IS, n is the number of device inputs at TTL levels, f is the frequency of the input signal, and d is the duty cycle of the input signal. 11/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic patterns used for fault detection. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. After incorporating allowable tolerances in accordance with MIL-STD-883, VIL = 0.4 V and VIH = 2.4 V. For outputs, L < 2.5 V, H 2.5 V. 12/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. Minimum ac limits for VCC = 5.5 V are 1.0 ns and guaranteed by guard banding the VCC = 4.5 V minimum limits to 1.5 ns. For propagation delay tests, all paths must be tested. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 9 Case X Dimensions Symbol Inches Millimeters Min Max Min Max A .045 .085 1.14 2.16 b .015 .019 0.38 0.48 c .003 .006 0.076 0.152 D .505 .515 12.83 13.08 E .275 .285 6.99 7.24 e .045 .055 1.14 1.40 L .250 .370 6.35 9.39 Q .010 --- 0.25 --- N 20 20 FIGURE 1. Case outline. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL B SHEET 10 Device types 01 and 03 Case oultines R, S, X, and 2 Terminal number 02 L 3 Terminal symbol 1 OE Q0 NC 2 Q0 Q1 VCC 3 D0 Q2 D3 4 D1 Q3 D2 5 Q1 GND D1 6 Q2 GND D0 7 D2 GND OE 8 D3 GND NC 9 Q3 Q4 Q0 10 GND Q5 Q1 11 CP Q6 Q2 12 Q4 Q7 Q3 13 D4 CP GND 14 D5 D7 GND 15 Q5 D6 NC 16 Q6 D5 GND 17 D6 D4 GND 18 D7 VCC Q4 19 Q7 VCC Q5 20 VCC D3 Q6 21 --- D2 Q7 22 --- D1 NC 23 --- D0 CP 24 --- OE D7 25 --- --- D6 26 --- --- D5 27 --- --- D4 28 --- --- VCC NC = No connection Terminal descriptions Terminal symbol Description OE Output enable inputs (active low) CP Clock pulse input Dn (n = 0 to 7) Data inputs Qn (n = 0 to 7) Data outputs FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL B SHEET 11 Input Output Dn CP OE Qn H L X L L H H L Z X H = High voltage level L = Low voltage level X = Irrelevant = Low-to-high transition of the clock. Z = High impedance FIGURE 3. Truth table. FIGURE 4. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL B SHEET 12 FIGURE 5. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL B SHEET 13 NOTES: 1. Preferred method: When measuring tPHZ and tPZH: VTEST = GND When measuring tPLZ and tPZL: VTEST = 2 X VCC When measuring tPLH and tPHL: VTEST = open Alternate method: When measuring tPLZ and tPZL: VTEST = 2 X VCC When measuring tPHZ, tPZH, tPLH, and tPHL: VTEST = open 2. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 3. RT = 50 or equivalent. RL = 500 or equivalent. 4. Input signal from pulse generator: VIN = 0.0 V to 3.0 V; PRR 10 MHz; tr 3 ns; tf 3 ns; duty cycle = 50 percent. 5. Timing parameters shall be tested at a minimum input frequency of 1 MHz. 6. Outputs are measured one at a time with one output per measurement. FIGURE 5. Switching waveforms and test circuit - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL B SHEET 14 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 15 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 3 herein. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 3, herein. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. c. CIN and CPD shall be measured only for initial qualification and after process or design changes which may affect capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. CPD shall be tested in accordance with the latest revision of JEDEC Standard No. 20 and table I herein. For CIN and CPD, test all applicable pins on five devices with zero failures. TABLE II. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-PRF-38535, table III) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class M Device class Q Device class V 1 1/ 1, 2, 3, 7, 8, 9 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3 1/ 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3 1, 2, 3 1, 2, 3 2/ 3/ 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 3/ 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3 1, 7, 9 1, 7, 9 1, 7, 9 Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Group A test requirements (see 4.4) Group C end-point electrical parameters (see 4.4) Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) 1/ PDA applies to subgroup 1. 2/ PDA applies to subgroups 1, 7, and deltas. 3/ Delta limits, as specified in table III, shall be required where specified, and the delta limits shall be completed with reference to the zero hour electrical parameters. TABLE III. Burn-in and operating life test, delta parameters (+25C). Device type Delta limits ICCH, ICCL, ICCZ 01 2/ 100 nA 03 150 nA Input current low level IIL 03 20 nA Input current high level IIH 03 20 nA Output voltage low level (IOL = 24 mA, VCC = 5.5 V) VOL 03 0.04 V Output voltage high level (IOH = -24 mA, VCC = 5.5 V) VOH 03 0.20 V Parameter 1/ Quiescent supply current 1/ 2/ These parameters shall be recorded before and after the required burn-in and life tests to determine delta limits. The limit may not be production tested. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 Symbol SIZE 5962-87631 A REVISION LEVEL C SHEET 16 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25C 5C, after exposure, to the subgroups specified in table II herein. c. RHA tests for device classes M, Q, and V for levels M, D, P, L, R, and F shall be performed through each level to determine at what levels the devices meet the RHA requirements. These RHA tests shall be performed for initial qualification and after design or process changes which may affect the RHA performance of the device. d. Prior to irradiation, each selected sample shall be assembled in its qualified package. It shall pass the specified group A electrical parameters in table I for subgroups specified in table II herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883, method 1019, condition A and as specified herein. Prior to and during total dose irradiation characterization and testing, the devices for characterization shall be biased so that 50 percent are at inputs high and 50 percent are at inputs low, and the devices for testing shall be biased to the worst case condition established during characterization. Devices shall be biased as follows: Device type 03: (1) Inputs tested high, VCC = 5.5 V dc 5%, VIN = 5.0 V dc +10%, RIN = 1 k 20%, and all outputs are open. (2) Inputs tested low, VCC = 5.5 V dc 5%, VIN = 0.0 V dc, RIN = 1 k 20%, and all outputs are open. 4.4.4.1.1 Accelerated aging test. Accelerated aging shall be performed on classes M, Q, and V devices requiring an RHA level greater than 5K rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the preirradiation end-point electrical parameter limit at 25C 5C. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenced terminal. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 17 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87631 A REVISION LEVEL C SHEET 18 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 05-02-22 Approved sources of supply for SMD 5962-87631 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ 5962-8763101RA 5962-8763101SA 5962-87631012A 5962-8763101VRA 5962-8763101VSA 5962-8763102LA 5962-87631023A 5962-8763103XA 5962-8763103XC 5962-8763103VXA 5962-8763103VXC 5962F8763103XA 5962F8763103XC 5962F8763103VXA 5962F8763103VXC Vendor CAGE number 27014 01295 27014 01295 27014 01295 01295 01295 3V146 3V146 F8859 F8859 F8859 F8859 F8859 F8859 F8859 F8859 Vendor similar PIN 2/ 54ACT374DMQB SNJ54ACT374J 54ACT374FMQB SNJ54ACT374W 54ACT374LMQB SNJ54ACT374FK SNV54ACT374J SNV54ACT374W 54ACT11374/BLA 54ACT11374/B3A 54ACT374K02Q 54ACT374K01Q 54ACT374K02V 54ACT374K01V RHFACT374K02Q RHFACT374K01Q RHFACT374K02V RHFACT374K01V 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. Vendor CAGE number Vendor name and address 27014 National Semiconductor 2900 Semiconductor Drive P.O. Box 58090 Santa Clara, CA 95052-8090 01295 Texas Instruments Incorporated Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 ST Microlelectronics 3 rue de Suisse BP4199 35041 RENNES cedex2 - France F8859 3V146 Rochester Electronics 10 Malcolm Hoyt Drive Newburyport, MA 01950 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.