LM4811
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LM4811 Dual 105mW Headphone Amplifier with Digital
Volume Control and Shutdown Mode
Check for Samples: LM4811
1FEATURES DESCRIPTION
The LM4811 is a dual audio power amplifier capable
2• Digital Volume Control Range from +12dB to of delivering 105mW per channel of continuous
−33dB average power into a 16Ωload with 0.1% (THD+N)
• WSON and VSSOP Surface Mount Packaging from a 5V power supply.
• "Click and Pop" Suppression Circuitry Boomer audio power amplifiers were designed
• No Bootstrap Capacitors Required specifically to provide high quality output power with a
minimal amount of external components. Since the
• Low Shutdown Current LM4811 does not require bootstrap capacitors or
snubber networks, it is optimally suited for low-power
APPLICATIONS portable systems.
• Cellular Phones The LM4811 features a digital volume control that
• MP3, CD, DVD Players sets the amplifier's gain from +12dB to −33dB in 16
• PDA's discrete steps using a two−wire interface.
• Portable Electronics The unity-gain stable LM4811 also features an
externally controlled, active-high, micropower
KEY SPECIFICATIONS consumption shutdown mode. It also has an internal
thermal shutdown protection mechanism.
• THD+N at 1kHz, 105mW Continuous Average
Output Power into 16Ω0.1 % (typ)
• THD+N at 1kHz, 70mW Continuous Average
Power into 32Ω0.1 % (typ)
• Shutdown Current 0.3 μA (typ)
Connection Diagrams
Top View Top View
Figure 1. VSSOP Package Figure 2. WSON Package
See Package Number DGS0010A See Package Number NGY0010A
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2000–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM4811
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Top View
Figure 3. SON Package
See Package Number NHD0010A
Typical Application
*Refer to Application Information for information concerning proper selection of the input and output coupling
capacitors.
Figure 4. Typical Audio Amplifier Application Circuit
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)(2)
Supply Voltage 6.0V
Storage Temperature −65°C to +150°C
ESD Susceptibility (3) 2.5kV
ESD Susceptibility Machine model (4) 200V
Junction Temperature (TJ) 150°C
Vapor Phase (60 sec.) 215°C
Soldering Information DGS0010A Package Infrared (15 sec.) 220°C
θJA DGS0010A 194°C/W
θJC DGS0010A 52°C/W
θJA NGY0010A (5) 63°C/W
Thermal Resistance θJC NGY0010A(5) 12°C/W
θJA NHD0010A (5) 63°C/W
θJC NHD0010A (5) 12°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Human body model, 100pF discharged through a 1.5kΩresistor.
(4) Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200pF cap is charged to the specified voltage, then
discharged directly into the IC with no external series resistor (resistance of discharge path must be under 50 Ohms).
(5) The NGY0010A or NHD0010A package has its Exposed−DAP soldered to an exposed 2in2area of 1oz printed circuit board copper.
Operating Ratings
Temperature Range TMIN ≤TA≤TMAX −40°C ≤TA≤85°C
Supply Voltage 2.0V ≤VCC ≤5.5V
Electrical Characteristics (1)(2)
The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA= 25°C.
LM4811 Units
Parameter Test Conditions (Limits)
Typ(3) Limit (4)
VDD Supply Voltage 2.0 V (min)
5.5 V (max)
IDD Supply Current VIN = 0V, IO= 0A 1.3 3.0 mA
ISD Shutdown Current VIN = 0V 0.3 µA
VOS Output Offset Voltage VIN = 0V 4.0 50 mV
POOutput Power 0.1% THD+N; f = 1kHz
RL= 16Ω105 mW
RL= 32Ω70 mW
THD+N Total Harmonic Distortion PO= 50mW, RL= 32Ω0.3 %
f = 20Hz to 20kHz
Crosstalk Channel Separation RL= 32Ω; f = 1kHz; 100 dB
PO= 70mW
PSRR Power Supply Rejection Ratio CB= 1.0µF, VRIPPLE = 100mVPP 60 dB
f = 217Hz
VIH (CLOCK, UP/DN, SHUTDOWN) 1.4 V (min)
Input Voltage High
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.
(3) Typical specifications are specified at +25°C and represent the most likely parametric norm.
(4) Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design,
test, or statistical analysis.
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Electrical Characteristics (1)(2) (continued)
The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA= 25°C.
LM4811 Units
Parameter Test Conditions (Limits)
Typ(3) Limit (4)
VIL (CLOCK, UP/DN, SHUTDOWN) 0.4 V (max)
Input Voltage Low
Digital Volume Range Input referred minimum gain −33 dB
Input referred maximum gain +12 dB
Digital Volume Stepsize All 16 discrete steps 3.0 dB
Stepsize Error All 16 discrete steps ±0.3 dB
Channel−to−Channel Volume All gain settings from 0.15 dB
Tracking Error −33dB to +12dB
Shutdown Attenuation Shutdown mode active −100 dB
Electrical Characteristics (1)(2)
The following specifications apply for VDD = 3.3V unless otherwise specified, limits apply to TA= 25°C.
LM4811 Units
Parameter Test Conditions (Limits)
Typ(3) Limit (4)
IDD Supply Current VIN = 0V, IO= 0A 1.1 mA
ISD Shutdown Current VIN = 0V 0.3 µA
VOS Output Offset Voltage VIN = 0V 4.0 mV
PoOutput Power 0.1% THD+N; f = 1kHz
RL= 16Ω40 mW
RL= 32Ω28 mW
THD+N Total Harmonic Distortion PO= 25mW, RL= 32Ω0.5 %
f = 20Hz to 20kHz
PSRR Power Supply Rejection Ratio CB= 1.0µF, VRIPPLE = 100mVPP 60 dB
f = 217Hz
VIH (CLOCK, UP/DN, SHUTDOWN) 1.4 V (min)
Input Voltage High
VIL (CLOCK, UP/DN, SHUTDOWN) 0.4 V (max)
Input Voltage Low
Digital Volume Range Input referred minimum gain −33 dB
Input referred maximum gain +12 dB
Digital Volume Stepsize All 16 discrete steps 3.0 dB
Stepsize Error All 16 discrete steps ±0.3 dB
Channel−to−Channel Volume All gain settings from 0.15 dB
Tracking Error −33dB to +12dB
Shutdown Attenuation Shutdown mode active −100 dB
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.
(3) Typical specifications are specified at +25°C and represent the most likely parametric norm.
(4) Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design,
test, or statistical analysis.
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Electrical Characteristics (1)(2)
The following specifications apply for VDD = 2.6V unless otherwise specified, limits apply to TA= 25°C.
LM4811 Units
Parameter Test Conditions (Limits)
Typ(3) Limit (4)
IDD Supply Current VIN = 0V, IO= 0A 1.0 mA
ISD Shutdown Current VIN = 0V 0.3 µA
VOS Output Offset Voltage VIN = 0V 4.0 mV
PoOutput Power 0.1% THD+N; f = 1kHz
RL= 16Ω20 mW
RL= 32Ω16 mW
THD+N Total Harmonic Distortion PO= 15mW, RL= 32Ω0.6 %
f = 20Hz to 20kHz
PSRR Power Supply Rejection Ratio CB= 1.0µF, VRIPPLE = 100mVPP 60 dB
f = 217Hz
VIH (CLOCK, UP/DN, SHUTDOWN) 1.4 V (min)
Input Voltage High
VIL (CLOCK, UP/DN, SHUTDOWN) 0.4 V (max)
Input Voltage Low
Digital Volume Range Input referred minimum gain −33 dB
Input referred maximum gain +12 dB
Digital Volume Stepsize All 16 discrete steps 3.0 dB
Stepsize Error All 16 discrete steps ±0.3 dB
Channel−to−Channel Volume All gain settings from 0.15 dB
Tracking Error −33dB to +12dB
Shutdown Attenuation Shutdown mode active −75 dB
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.
(3) Typical specifications are specified at +25°C and represent the most likely parametric norm.
(4) Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design,
test, or statistical analysis. External Components Description
Components Functional Description (See Figure 4)
This is the input coupling capacitor. It blocks the DC voltage at, and couples the input signal to, the amplifier's input
terminals. Cialso creates a highpass filter with the internal input resistor, Ri, at fc= 1/(2πRiCi). The minimum value of Riis
1. Ci33kΩ. Refer to PROPER SELECTION OF EXTERNAL COMPONENTS for an explanation of how to determine the value of
Ci.
This is the supply bypass capacitor. It provides power supply filtering. Refer to Application Information for proper placement
2. CSand selection of the supply bypass capacitor.
This is the BYPASS pin capacitor. It provides half-supply filtering. Refer to PROPER SELECTION OF EXTERNAL
3. CBCOMPONENTS for information concerning proper placement and selection of CB.
This is the output coupling capacitor. It blocks the DC voltage at the amplifier's output and it forms a high pass filter with RL
4. COat fO= 1/(2πRLCO)
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Typical Performance Characteristics
THD+N THD+N
vs vs
Frequency Frequency
Figure 5. Figure 6.
THD+N THD+N
vs vs
Frequency Frequency
Figure 7. Figure 8.
THD+N THD+N
vs vs
Frequency Frequency
Figure 9. Figure 10.
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Typical Performance Characteristics (continued)
THD+N THD+N
vs vs
Frequency Frequency
Figure 11. Figure 12.
THD+N THD+N
vs vs
Frequency Output Power
Figure 13. Figure 14.
THD+N THD+N
vs vs
Output Power Output Power
Figure 15. Figure 16.
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Typical Performance Characteristics (continued)
THD+N THD+N
vs vs
Output Power Output Power
Figure 17. Figure 18.
THD+N THD+N
vs vs
Output Power Output Power
Figure 19. Figure 20.
THD+N THD+N
vs vs
Output Power Output Power
Figure 21. Figure 22.
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Typical Performance Characteristics (continued)
Output Power vs Output Power vs
Load Resistance Load Resistance
Figure 23. Figure 24.
Output Power vs Output Power vs
Load Resistance Supply Voltage
Figure 25. Figure 26.
Output Power vs Output Power vs
Power Supply Power Supply
Figure 27. Figure 28.
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Typical Performance Characteristics (continued)
Dropout Voltage vs Power Dissipation vs
Supply Voltage Output Power
Figure 29. Figure 30.
Power Dissipation vs Power Dissipation vs
Output Power Output Power
Figure 31. Figure 32.
Channel Separation Channel Separation
Figure 33. Figure 34.
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Typical Performance Characteristics (continued)
Noise Floor Power Supply Rejection Ratio
Figure 35. Figure 36.
Power Supply Rejection Ratio Power Supply Rejection Ratio
Figure 37. Figure 38.
Supply Current vs
Frequency Response Supply Voltage
Figure 39. Figure 40.
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APPLICATION INFORMATION
DIGITAL VOLUME CONTROL
The LM4811's gain is controlled by the signals applied to the CLOCK and UP/DN inputs. An external clock is
required to drive the CLOCK pin. At each rising edge of the clock signal, the gain will either increase or decrease
by a 3dB step depending on the logic voltage level applied to the UP/DN pin. A logic high voltage level applied to
the UP/DN pin causes the gain to increase by 3dB at each rising edge of the clock signal. Conversely, a logic
low voltage level applied to the UP/DN pin causes the gain to decrease 3dB at each rising edge of the clock
signal. For both the CLOCK and UP/DN inputs, the trigger point is 1.4V minimum for a logic high level, and 0.4V
maximum for a logic low level.
There are 16 discrete gain settings ranging from +12dB maximum to −33dB minimum. Upon device power on,
the amplifier's gain is set to a default value of 0dB. However, when coming out of shutdown mode, the LM4811
will revert back to its previous gain setting.
The LM4811's CLOCK and UP/DN pins should be debounced in order to avoid unwanted state changes during
transitions between VIL and VIH. This will ensure correct operation of the digital volume control. A microcontroller
or microprocessor output is recommended to drive the CLOCK and UP/DN pins.
Figure 41. Timing Diagram
POWER DISSIPATION
Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to
ensure a successful design. Equation 1 states the maximum power dissipation point for a single-ended amplifier
operating at a given supply voltage and driving a specified output load.
PDMAX = (VDD)2/ (2π2RL) (1)
Since the LM4811 has two operational amplifiers in one package, the maximum internal power dissipation point
is twice that of the number which results from Equation 1. Even with the large internal power dissipation, the
LM4811 does not require heat sinking over a large range of ambient temperature. From Equation 1, assuming a
5V power supply and a 32Ωload, the maximum power dissipation point is 40mW per amplifier. Thus the
maximum package dissipation point is 80mW. The maximum power dissipation point obtained must not be
greater than the power dissipation predicted by Equation 2:
PDMAX = (TJMAX −TA) / θJA (2)
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For the VSSOP package, θJA = 194°C/W, and for the WSON/SON package, θJA = 63°C/W. TJMAX = 150°C for the
LM4811. For a given ambient temperature, TA, of the system surroundings, Equation 1 can be used to find the
maximum internal power dissipation supported by the IC packaging. If the result of Equation 1 is greater than
that of Equation 2, then either the supply voltage must be decreased, the load impedance increased, or TA
reduced. For the VSSOP package in a typical application of a 5V power supply and a 32Ωload, the maximum
ambient temperature possible without violating the maximum junction temperature is approximately 134.5°C. This
assumes the device operates at maximum power dissipation and uses surface mount packaging. Internal power
dissipation is a function of output power. If typical operation is not around the maximum power dissipation point,
operation at higher ambient temperatures is possible. Refer to Typical Performance Characteristics for power
dissipation information for lower output power levels.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATION
The LM4811's exposed-dap (die attach paddle) package (WSON/SON) provides a low thermal resistance
between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the
die to the surrounding PCB copper traces, ground plane, and surrounding air.
The WSON/SON package should have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper
pad may be connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat
sink, and radiation area.
However, since the LM4811 is designed for headphone applications, connecting a copper plane to the DAP's
PCB copper pad is not required. Figure 32 in Typical Performance Characteristics shows that the maximum
power dissipated is just 45mW per amplifier with a 5V power supply and a 32Ωload.
Further detailed and specific information concerning PCB layout, fabrication, and mounting an WSON/SON
package is available from Texas Instruments' Package Engineering Group under application note AN1187.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as
possible. The value of the bypass capacitor directly affects the LM4811's half-supply voltage stability and PSRR.
The stability and supply rejection increase as the bypass capacitor's value increases. Typical applications employ
a 5V regulator with 10µF and a 0.1µF bypass capacitors which aid in supply stability, but do not eliminate the
need for bypassing the supply nodes of the LM4811. The selection of bypass capacitors, especially CB, is thus
dependent upon desired low frequency PSRR, click and pop performance, (explained in PROPER SELECTION
OF EXTERNAL COMPONENTS), system cost, and size constraints.
SHUTDOWN FUNCTION
In order to reduce power consumption while not is use, the LM4811 features amplifier bias circuitry shutdown.
This shutdown function is activated by applying a logic high to the SHUTDOWN pin. The trigger point is 1.4V
minimum for a logic high level, and 0.4V maximum for a logic low level. It is best to switch between ground and
VDD to ensure optimal shutdown operation. By switching the SHUTDOWN pin to VDD, the LM4811 supply current
draw will be minimized in idle mode. Whereas the device will be disabled with shutdown voltages less than VDD,
the idle current may be greater than the typical value of 0.3µA. In either case, the SHUTDOWN pin should be
tied to a fixed voltage to avoid unwanted state changes.
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry. This
provides a quick, smooth shutdown transition. Another solution is to use a single-pole, single-throw switch in
conjunction with an external pull-up resistor. When the switch is closed, the SHUTDOWN pin is connected to
ground and enables the amplifier. If the switch is open, the external pull-up resistor, RPU, will disable the LM4811.
This scheme ensures that the SHUTDOWN pin will not float, thus preventing unwanted state changes.
PROPER SELECTION OF EXTERNAL COMPONENTS
Selection of external components when using integrated power amplifiers is critical for optimum device and
system performance. While the LM4811 is tolerant of external component combinations, consideration must be
given to the external component values that maximize overall system quality.
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The LM4811's unity-gain stability allows a designer to maximize system performance. Low gain settings
maximize signal-to-noise performance and minimizes THD+N. Low gain configurations require large input signals
to obtain a given output power. Input signals equal to or greater than 1 Vrms are available from sources such as
audio codecs. Please refer to AUDIO POWER AMPLIFIER DESIGN for a more complete explanation of proper
gain selection.
Selection of Input and Output Capacitor Size
Besides gain, one of the major considerations is the closed loop bandwidth of the amplifier. To a large extent, the
bandwidth is dicated by the choice of external components shown in Figure 4. Both the input coupling capacitor,
Ci, and the output coupling capacitor, Co, form first order high pass filters which limit low frequency response.
These values should be based on the desired frequency response weighed against the following:
Large value input and output capacitors are both expensive and space consuming for portable designs. Clearly a
certain sized capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the
speakers used in portable systems, whether internal or external, have little ability to reproduce signals below
150Hz. Thus large input and output capacitors may not increase system performance.
In addition to system cost and size, click and pop performance is affected by the size of the input coupling
capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally
1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable.
Turn on pops can be minimized by reducing Civalue based on necessary low frequency response.
Besides minimizing the input and output capacitor values, careful consideration should be paid to the bypass
capacitor value. Bypass capacitor CBis the most critical component to minimize turn on pops since it determines
how fast the LM4811 turns on. The slower the LM4811's outputs ramp to their quiescent DC voltage (nominally
1/2 VDD), the smaller the turn on pop. While the device will function properly, (no oscillations or motorboating),
with CBequal to 1µF, the device will be much more susceptible to turn on clicks and pops. Thus, a value of CB
equal to 1µF or larger is recommended in all but the most cost sensitive designs.
Also, careful consideration must be taken in selecting a certain type of capacitor to be used in the system.
Different types of capacitors (tantalum, electrolytic, ceramic) have unique performance characteristics and may
affect overall system performance.
AUDIO POWER AMPLIFIER DESIGN
Design a Dual 70mW/32ΩAudio Amplifier
Given:
Power Output 70mW
Load Impedance 32Ω
Input Level 1Vrms (max)
Input Impedance 33kΩ(min)
Bandwidth 100 Hz–20 kHz ± 0.50dB
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating
from Figure 26 in Typical Performance Characteristics, the supply rail can be easily found. A second way to
determine the minimum supply rail is to calculate the required VOPEAK using Equation 3 and add the dropout
voltage. For a single-ended application, the minimum supply voltage can be approximated by (2VOPEAK + (VODTOP
+ VODBOT)), where VODBOT and VODTOP are extrapolated from Figure 29 in Typical Performance Characteristics.
(3)
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Using Figure 28 for a 32Ωload, the minimum supply rail is 4.8V. Since 5V is a standard supply voltage in most
applications, it is chosen for the supply rail. Extra supply voltage creates headroom that allows the LM4811 to
reproduce peaks in excess of 70mW without clipping the signal. At this time, the designer must make sure that
the power supply choice along with the output impedance does not violate the conditions explained in POWER
DISSIPATION. Remember that the maximum power dissipation point from Equation 1 must be multiplied by two
since there are two independent amplifiers inside the package.
The final design step is to address the bandwidth requirements which must be stated as a pair of −3dB
frequency points. Five times away from a −3dB point is 0.17dB down from passband response assuming a single
pole roll-off. As stated in External Components Description, Ciand Cocreate first order highpass filters. Thus to
obtain the desired frequency low response of 100Hz within ±0.5dB, both poles must be taken into consideration.
The combination of two single order filters at the same frequency forms a second order response. This results in
a signal which is down 0.34dB at five times away from the single order filter −3dB point. Thus, a frequency of
20Hz is used in the following equations to ensure that the response is better than 0.5dB down at 100Hz.
Ci≥1 / (2π* 33 kΩ* 20 Hz) = 0.241µF; use 0.39µF. (4)
Co≥1 / (2π* 32Ω* 20 Hz) = 249µF; use 330µF. (5)
The high frequency pole is determined by the product of the desired high frequency pole, fH, and the closed-loop
gain, AV. With a closed-loop gain of 3.98 or +12dB and fH= 100kHz, the resulting GBWP = 398kHz which is
much smaller than the LM4811 GBWP of 1MHz. This figure displays that at the maximum gain setting of 3.98 or
+12dB, the LM4811 can be used without running into bandwidth limitations.
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Figure 44. Recommended VSSOP PC Board Layout:
TOP Top Layer
Figure 45. Recommended VSSOP PC Board Layout:
Bottom Layer
Figure 46. Recommended WSON/SON PC Board Layout:
TOP Silk Screen
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REVISION HISTORY
Rev Date Description
0.1 04/06/06 Added NHD0010A Package and markings,
then re-released D/S to the WEB (per Alvin
F.).
D 04/05/13 Changed layout of National Data Sheet to TI
format.
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PACKAGE OPTION ADDENDUM
www.ti.com 26-Aug-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM4811MM/NOPB ACTIVE VSSOP DGS 10 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 G11
LM4811MMX/NOPB ACTIVE VSSOP DGS 10 3500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 G11
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM4811MM/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM4811MMX/NOPB VSSOP DGS 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 12-Aug-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM4811MM/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0
LM4811MMX/NOPB VSSOP DGS 10 3500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 12-Aug-2013
Pack Materials-Page 2
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