24LC16BT-E/P - Microchip Technology, Inc.

24AA16/24LC16B

Device Selection Table

Features:

• Single Supply with Operation down to 1.7V

for 24AA16 Devices, 2.5V for 24LC16B Devices

• Low-Power CMOS Technology:

- Active current 1 mA, typical

- Standby current, 1 μA, typical

• 2-Wire Serial Interface, I2C™ Compatible

• Schmitt Trigger inputs for Noise Suppression

• Output Slope Control to eliminate Ground Bounce

• 100 kHz and 400 kHz Clock Compatibility

• Page Write Time 5 ms Max.

• Self-Timed Erase/Write Cycle

• 16-Byte Page Write Buffer

• Hardware Write-Protect

• ESD Protection > 4,000V

• More than 1 Million Erase/Write Cycles

• Data Retention > 200 Years

• Factory Programming Available

• Packages include 8-lead PDIP, SOIC, TSSOP,

MSOP, DFN, TDFN, 5-lead SOT-23 and Chip Scale

• Pb-Free and RoHS Compliant

• Temperature Ranges:

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C

Description:

The Microchip Technology Inc. 24AA16/24LC16B

(24XX16*) is a 16 Kbit Electrically Erasable PROM.

The device is organized as eight blocks of 256 x 8-bit

memory with a 2-wire serial interface. Low-voltage

design permits operation down to 1.7V with standby

and active currents of only 1 μA and 1 mA,

respectively. The 24XX16 also has a page write

capability for up to 16 bytes of data. The 24XX16 is

available in the standard 8-pin PDIP, surface mount

SOIC, TSSOP, 2x3 DFN, 2x3 TDFN and MSOP pack-

ages, and is also available in the 5-lead SOT-23, and

Chip Scale packages.

Block Diagram

Part

Number VCC

Range Max. Clock

Frequency Temp.

Ranges

24AA16 1.7-5.5 400 kHz (1) I

24LC16B 2.5-5.5 400 kHz I, E

Note 1: 100 kHz for VCC <2.5V.

EEPROM

Array

Page

YDEC

XDEC

Sense Amp.

Memory

Control

Logic

I/O

Control

Logic

I/O

SDA

SCL

VCC

VSS R/W Con trol

Latches

Generator

VSS

VCC

SCL

SDA

PDIP/MSOP/SOIC/TSSOP DFN/TDFN

VSS

SCL

SDA

VCC

SOT-23

5WP

VCC

SCL

VSS

SDA

CS (Chip Scale)(2)

VCC

WP SDA

SCL

VSS

(Top Down View,

Balls Not Visible)

Note 1: Pins A0, A1 and A2 are not used by the 24XX16 (no internal connections).

2: Available in I-temp, “AA” only.

16K I2C™ Serial EEPROM

*24XX16 is used in this document as a generic part number for the 24AA16/24LC16B devices.

24AA16/24LC16B

1.0 ELECTRICAL CHARAC TERISTICS

Absolute Maximum Ratings (†)

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins......................................................................................................................................................≥ 4 kV

TABLE 1-1: DC CHARACTERISTICS

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to

the device. This is a stress rating only and functional operation of the device at those or any other conditions

above th ose indi cated in the opera tional li stings of this sp ecificati on is no t implie d. Exposu re to max imum rating

conditions for extended periods may affect device reliability.

DC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C, VCC = +1.7V to +5.5V

Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V

Param.

No. Symbol Characteristic Min. Typ. Max. Units Conditions

D1 VIH WP, SCL and SDA pins —————

D2 — High-level input voltage 0.7 VCC ——V—

D3 VIL Low-level input voltage — — 0.3 VCC V—

D4 VHYS Hysteresis of Schmitt

Trigger inputs .05 VCC ——V(Note 1)

D5 VOL Low-level output voltage — — 0.40 V IOL = 3.0 mA, VCC = 2.5V

D6 ILI Input leakage current ——±1μAVIN = VSS or VCC

D7 ILO Output le akage curren t ——±1μAVOUT = VSS or VCC

D8 CIN,

COUT Pin capacitance

(all inputs/ou tpu t s) ——10pFVCC = 5.0V (Note 1)

TA = 25°C, FCLK = 1 MHz

D9 ICC write Operating current ——3mAVCC = 5.5V, SCL = 400 kHz

D10 ICC read — 0.01 1 mA —

D11 ICCS Standby current —

—0.3

.01 1

5μA

μAIndustrial

Automotive

SDA = SCL = VCC

WP = VSS

Note 1: This parameter is periodically sampled and not 100% tested.

2: Typical measurements taken at room temperature.

24AA16/24LC16B

TABLE 1-2: AC CHARACTERISTICS

AC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C, VCC = +1.7V to +5.5V

Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V

Param.

No. Symbol Characteristic Min. Max. Units Conditions

CLK Clock frequency —

—400

100 kHz 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

2THIGH Clock high time 600

4000 —

—ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

LOW Clock low time 1300

4700 —

—ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

4TRSDA and SCL rise time

(Note 1) —

—300

1000 ns 2.5V ≤ VCC ≤ 5.5V (Note 1)

1.7V ≤ VCC < 2.5V (24AA16)

(No te 1)

FSDA and SCL fall time — 300 ns (Note 1)

HD:STA Start condition hold time 600

4000 —

—ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

7TSU:STA Start condition setup time 600

4700 —

—ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

8THD:DAT Data input hold time 0 — ns (Not e 2)

9TSU:DAT Data input setup time 100

250 —

—ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

10 TSU:STO Stop condition setup time 600

4000 —

—ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

11 TAA Output valid from clock

(Note 2) —

—900

3500 ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

12 TBUF Bus free time: Time the bus

must be free before a new

transmission can start

1300

4700 —

—ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC < 2.5V (24AA16)

13 TOF Output fall time from VIH

minimum to VIL maximum 20+0.1CB

—250

250 ns 2.5V ≤ VCC ≤ 5.5V

1.7V ≤ VCC <2.5V (24AA16)

14 TSP Input filter spike suppression

(SDA and SCL pins) —50ns(Notes 1 and 3)

15 TWC Write cycl e time

(byte or page) —5ms—

16 — Endurance 1M — cycles 25°C, (Note 4)

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The com bi ned TSP and VHYS spec ifi ca tio ns are due to new Schm itt Trig ge r in puts whi ch pro vi de im prov ed

noise spike suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance es timates in a specific

applic ation, ple ase co ns ult the Total Endu ranc e™ Model w hic h c an be obt ained f r om Mi cro chi p’s web s ite

at www.microchip.com.

24AA16/24LC16B

FIGURE 1-1: BUS TIMING DATA

FIGURE 1-2: BUS T IMING START/STOP

524

8910

14 6

SCL

SDA

OUT

Start Stop

SCL

SDA

24AA16/24LC16B

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1: PIN FUNCTION TABLE

2.1 Serial Address/Data Input/Output

(SDA)

SDA is a bidirectional pin used to transfer addresses

and data into and out of the de vice . Sinc e it i s an open-

drain terminal, the SDA bus requires a pull-up resistor

to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz).

For normal data transfer, SDA is allowed to change

only during SCL low. Changes during SCL high are

reserved for indicating Start and Stop conditions.

2.2 Serial Clock (SCL)

The SCL in pu t is u se d to s ynchro ni ze th e da t a tra ns fer

to and from the device.

2.3 Wr ite-Protect (WP)

The WP pin must be connected to either VSS or VCC.

If tied to VSS, normal memory operation is enabled

(read/wri te the ent ire memory 000-7 FF).

If tied to VCC, write operations are inhibited. The entire

memory will be write-protected. Read operations are

not affected.

2.4 A0, A1, A2

The A0, A1 and A2 pins are not used by the 24XX16.

They may be left floating or tied to either VSS or VCC.

Name PDIP SOIC TSSOP DFN TDFN MSOP SOT-23 CS Description

A0 1 1 1 1 1 1 — — Not Connected

A1 2 2 2 2 2 2 — — Not Connected

A2 3 3 3 3 3 3 — — Not Connected

VSS 4 4 4 4 4 4 2 2 Ground

SDA 5 5 5 5 5 5 3 5 Serial Address/Data I/O

SCL 6 6 6 6 6 6 1 4 Serial Clock

WP 7 7 7 7 7 7 5 3 Write-Protect Input

VCC 8 8 8 8 8 8 4 1 +1.7 V to 5.5V Power Supply

24AA16/24LC16B

3.0 FUNCTIONAL DESCRIPTION

The 24XX16 supports a bidirectional, 2-wire bus and

data transmission protocol. A device that sends data

onto the bus is defined as a transmitter, while a device

receiving data is defined as a receiver. The bus has to

be controlled by a master device which generates the

Serial Clock (SCL), controls the bus access and

generates the Start and Stop conditions, while the

24XX16 works as slave. Both master and slave can

operate as transmitter or receiver, but the master

device determines which mode is activated.

4.0 BUS CHARACTERISTICS

The following bus protocol has been defined:

• Data transfer may be initiated only when the bus

is not busy.

• During data transfer, the data line must remain

stab le when ever th e clock lin e is high. C hanges i n

the data line while the clock line is high will be

interpreted as a Start or Stop condition.

Accordingly, the following bus conditions have been

defined (Figure 4-1).

4.1 Bus Not Busy (A)

Both data and clock lines remain high.

4.2 Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock

(SCL) is high determines a Start condition. All

commands must be preceded by a Start condition.

4.3 S top Data Transfer (C)

A low -t o- h i gh t ran si t io n of t h e SD A l in e whi l e t he c lo ck

(SCL) is high determines a Stop condition. All

operations must be ended with a Stop condition.

4.4 Data Valid (D)

The state of the data line represents valid data when,

after a Start condition, the data line is stable for the

duration of the high period of the clock signal.

The data on the line must be changed during the low

period of the clock signal. There is one clock pulse per

bit of data.

Each dat a transf er is initiated with a S tart cond ition and

terminated with a Stop condition. The number of data

bytes transferred between Start and Stop conditions is

determined by the master device and is, theoretically,

unlimited (although only the last sixteen will be stored

when doing a write operation). When an overwrite does

occur it will replace data in a first-in first-out (FIFO)

fashion.

4.5 Acknowledge

Each receiving device, when addressed, is obliged to

generate an Acknowledge after the reception of each

byte. Th e mast er device mus t ge nera te a n ex tra c lock

pulse which is associated with this Acknowledge bit.

The device that acknowledges, has to pull down the

SDA line d uring th e ackn owledge clock pulse in such a

way that the SDA line is stable-low during the high

period of the acknowledge related clock pulse. Of

course, setup and hold times must be taken into

account. During reads, a master must signal an end of

data to t he sla ve by no t ge nerati ng an Ack nowl edge b it

on the las t by te tha t has be en c locked out of th e sl av e.

In this c as e, the sl ave (24XX16) w ill le av e th e d at a line

high to enable the master to generate the Stop

condition.

FIGURE 4-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS

Note: The 24XX16 does not generate any

Acknowledge bits if an internal

programming cycle is in progress.

SCL

SDA

(A) (B) (D) (D) (A)(C)

Start

Condition Address or

Acknowledge

Valid

Data

Allowed

to Change

Stop

Condition

24AA16/24LC16B

5.0 DEVICE ADDRESSING

A control byte is the first byte received following the

Start condition from the master device (Figure 5-1).

The control byte consists of a four-bit control code.

For the 24XX16, this is set as ‘1010’ binary for read

and write operations. The next three bits of the control

byte are the block-select bits (B2, B1, B0). They are

used by the master device to select which of the eight

256 word-blocks of memory are to be accessed.

These bits ar e in effe ct t he thr ee Mo st Sign if ica nt bits

(MSb) of the word address. It should be noted that the

protoco l limits the si ze of th e memory to eight block s

of 25 6 words, th erefore, th e pr o to c ol c an s u pport on ly

one 24XX 16 per syst em .

The last bit of the control byte defines the operation to

be performed. When set to ‘1’, a read operation is

select ed. W hen set to ‘0’ , a write operati on is se lecte d.

Follow in g the Start condi tio n, the 24XX16 moni tors the

SDA bus, checking the device type identifier being

transmitted and, upon receiving a ‘1010’ code, the

slave device outputs an Acknowledge signal on the

SDA line. Depending on the state of the R/W bit, the

24XX16 will select a read or write operation.

FIGU RE 5-1 : CONTROL BYTE

ALLOCATION

FIGURE 5-2: ADDRESS SEQUENCE BI T ASSIGN MENTS

Operation Control

Code Block Select R/W

Read 1010 Block Address 1

Write 1010 Block Address 0

1010B2 B1 B0 R/W ACK

Start Bit

Read/Write Bit

Slave Address

Acknowledge Bit

Control Code

Block

Select

Bits

1010B

0R/W A

••••••

Control Byte Address Low Byte

Control

Code Block

Select

bits

24AA16/24LC16B

6.0 WRITE OPERATION

6.1 Byte Write

Following the Start condition from the master, the

dev ice co de (4 bits), the block address (3 bits) and the

R/W bi t, wh ich is a lo gic-low, is placed onto the bus by

the master transmitter. This indicates to the addressed

slave receiver that a byte with a word address will

follow once it has generated an Ac knowledge b it during

the nint h clock cycl e. Therefor e, the next byt e transmit-

ted by the master is the word address and will be

written into the Address Pointer of the 24XX16. After

receiving another Acknowledge signal from the

24XX16, the master device will transmit the data word

to be written into the addressed memory location. The

24XX16 acknowledges again and the master

generates a Stop condition. This initiates the internal

write cycle and, during this time, the 24XX16 will not

generate Ackno w led ge sig na ls (Fig ure 6-1).

6.2 Page Write

The write control byte, word address and the first data

byte are transm itted to the 24 XX16 in th e sam e way a s

in a byte write. However, instead of generating a Stop

condition, the master transmits up to 16 data bytes to

the 24XX16, which are temporarily stored in the on-

chip page buffer and will be written into memory once

the master has transmitted a Stop condition. Upon

receipt of each word, the four lower-order Address

Pointer bits are internally incremented by ‘1’. The

higher-order 7 bits of the word address remain

constant. If the master should transmit more than 16

bytes prior to generating the Stop condition, the

address counter will roll over and the previously

receive d dat a will be overwri tten. As w ith the by te write

operation, once the Stop condition is received an

internal write cycle will begin (Figure 6-2).

6.3 Write Protection

The W P pin a llows th e user t o writ e-prote ct the entire

array (000-7FF) when the pin is tied to VCC. If tied to

VSS the write protection is disabled.

FIGURE 6-1: BYTE WRITE

Note: Page write opera tions are l imited to wri ting

bytes within a single physical page,

regardless of the number of bytes

actually being written. Physical page

boundaries start at addresses that are

integer multiples of the page buffer size (or

‘pag e-siz e’) and end a t addre sses that a re

integer multiples of [page size – 1]. If a

page write command attempts to write

across a physical page boundary, the

result is that the data wraps around to the

beginning of the current page (overwriting

data previously stored there), instead of

being w ritten to the next page, as migh t be

expected. It is therefore necessary for the

application software to prevent page write

operations that would attempt to cross a

page boundary.

S P

Bus Acti vity

Master

SDA Line

Bus Activity

Control

Byte Word

Address Data

1010B2 B1 B0 0

Block

Select

Bits

24AA16/24LC16B

FIGURE 6-2: PAGE WRITE

S P

Bus Acti vity

Master

SDA Line

Bus Activit y

Control

Byte Word

Address (n) Data (n) Data (n + 15)

Data (n + 1)

B2 B0

10100

Block

Select

Bits

24AA16/24LC16B

7.0 ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write

cycle, this can be used to determine when the cycle is

complete (this feature can be used to maximize bus

throughput). Once the Stop condition for a write

comma nd has been is sued from the master , the device

initiate s the internally-timed write cycle and ACK polling

can then be initiated immediately. This involves the

master sending a S tart c ondition fo llowed by t he contro l

byte for a write com mand (R/W = 0). If the devic e is still

busy wi th the write cycle, no ACK will be returned. If the

cycle is complete, the device will return the ACK and

the mas ter can then pr oceed with the nex t read or w rite

command. See Figure 7-1 for a flow diagram of this

operation.

FIGURE 7-1: ACKNOWLEDGE POLLING

FLOW

Send

Write Command

Send Stop

Condition to

Initiate Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

Operation

Yes

24AA16/24LC16B

8.0 READ OPERATION

Read operations are initiated in the same way as write

operations, with the exception that the R/W bit of the

slave address is set to ‘1’. There are three basic types

of read operat ions: current address read , rand om rea d

and sequential read.

8.1 Current Address Read

The 24XX16 contains an address counter that main-

tains the address of the last word accessed, internally

incremented by ‘1’. Therefore, if the previous access

(either a re ad or write opera tion) was to ad dre ss n, the

next curren t addre ss read operation woul d access data

from address n + 1. Upon receip t of the slave add res s

with R/W bit set to ‘1’, the 24XX16 issues an acknowl-

edge and tran smits the 8-bit dat a word. The maste r will

not acknowledge the transfer , but does generate a S top

condition and the 24XX16 discontinues transmission

(Figure 8- 1).

8.2 Random Read

Random read operations allow the master to access

any memory location in a random manner. To perform

this typ e of re ad ope ratio n, the word add res s mus t firs t

be set. This is accomplished by sending the word

address to the 24XX16 as part of a write operation.

Once th e word address is s ent, the master ge nerates a

Start condition following the acknowledge. This

terminates the write operation, but not before the inter-

nal Address Pointer is set. The master then issues the

control byt e agai n, but wi th the R /W bit se t to a ‘ 1’. The

24XX16 will then issue an acknowledge and transmit

the 8-bit data word. The master will not acknowledge

the transfer , but do es generate a S top condition and the

24XX16 will discontinue transmission (Figure 8-2).

8.3 Sequential Read

Sequential reads are initiated in the same way as a

random read, except that once the 24XX16 transmits

the first data byte, the master issues an acknowledge

as opposed to a Stop condition in a random read. This

directs the 24XX16 to transmit the next sequentially-

addressed 8-bit word (Figure 8-3).

To provide sequential reads, the 24XX16 contains an

internal Address Pointer that is incremented by one

upon completion of each operation. This Address

Pointer allows the entire memory contents to be serially

read during one operation.

8.4 Noise Protection

The 24XX16 employs a VCC threshold detector circuit

which disables the internal erase/write logic if the VCC

is below 1.5V at nominal conditions.

The SCL and SDA inputs have Schmitt Trigger and

filter circuits which suppress noise spikes to assure

proper device operation, even on a noisy bus.

FIGURE 8-1: CURRENT ADDRESS READ

Bus Activity

Master

SDA Line

Bus Activity

Control

Byte Data (n)

1010 1

B2 B1 B0

Block

Select

Bits

24AA16/24LC16B

FIGURE 8-2: RANDOM READ

FIGURE 8-3: SEQUENTIAL READ

S P

Bus Acti vity

Master

SDA Line

Bus Acti vity

Control

Byte

Word

Address (n) Control

Byte

TData (n)

1010 0

B2B1B0 11

001

B2B1B0

Block

Select

Bits

Block

Select

Bits

Bus Acti vity

Master

SDA Line

Bus Acti vity

Control

Byte

Data (n) Data (n + 1) Data (n + 2) Data (n + x)

24AA16/24LC16B

9.0 PACKAGING INFORMATION

9.1 Package Marking Information

XXXXXXXX

T/XXXNNN

YYWW

8-Lead PDIP (300 mil) Example:

8-Lead SOIC (3.90 mm) Example:

XXXXXXXT

XXXXYYWW

NNN

8-Lead TSSOP Example:

24LC16B

I/P 13F

0527

24LC16BI

SN 0527

13F

8-Lead MSOP Example:

XXXX

TYWW

NNN

XXXXXT

YWWNNN

4L16

I527

13F

4L16I

52713F

5-Le a d S OT-23 Example:

XXNN B53F

8-Lead 2x3 DFN Example:

254

527

XXX

YWW

8-Lead 2x3 TDFN Example:

A54

527

XXX

YWW

24AA16/24LC16B

Part Number

1st Line Marking Codes

TSSOP MSOP SOT-23 DFN TDFN

I Temp. E Temp. I Temp. E Temp. I Temp. E Temp.

24AA16 4A16 4A16T B5NN — 251 — A51 —

24LC16B 4L16 4L16T M5NN N5NN 254 255 A54 A55

Note: T = Temperature grade (I, E)

NN = Alphanumeric traceability code

5-Lead Chip Scale

Example:

Legend: XX...X Part number or part number code

T Temperature (I, E)

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week c ode (w eek of January 1 is week ‘01’)

NNN Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn)

Note: For very small pa ckages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

Note: In the event the full Mi croch ip pa rt numbe r canno t be ma rked on one line , it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

Note: Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.

*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.

24AA16/24LC16B





  !"#$%&"' ()"&'"!&)&#*&&&#

 +%&,&!&

- '!!#.#&"#'#%!&"!!#%!&"!!!&$#/!#

 '!#&.0

1,21!'!&$& "!**&"&&!

 3&'!&"&4#*!(!!&4%&&#&

&&255***''54

6&! 7,8.

'!9'&! 7 7: ;

7"')%! 7 <

&  1,

&&  = = 

##44!!   - 

1!&&   = =

"#&"#>#& .  - -

##4>#& .   <

: 9&  -< -? 

&& 9  - 

9#4!!  <  

69#>#& )  ? 

9*9#>#& )  < 

: *+ 1 = = -

NOTE 1

  * ,<1

24AA16/24LC16B

 ! ""#$%& !'



  !"#$%&"' ()"&'"!&)&#*&&&#

 +%&,&!&

- '!!#.#&"#'#%!&"!!#%!&"!!!&$#''!#

 '!#&.0

1,2 1!'!&$& "!**&"&&!

.32 %'!("!"*&"&&(%%'&"!!

&&255***''54

6&! 99..

'!9'&! 7 7: ;

7"')%! 7 <

&  1,

: 8&  = = 

##44!!   = =

&#%%+  = 

: >#& . ?1,

##4>#& . -1,

: 9&  1,

,'%@&A   = 

3&9& 9  = 

3&& 9 .3

3& IB = <B

9#4!!   = 

9#>#& ) - = 

#%& DB = B

#%&1&&' EB = B

NOTE 1

12 3

  * ,1

24AA16/24LC16B

 ! ""#$%& !'

&&255***''54

24AA16/24LC16B

() )"* ! (+%+( !



  !"#$%&"' ()"&'"!&)&#*&&&#

 '!!#.#&"#'#%!&"!!#%!&"!!!&$#''!#

- '!#&.0

1,2 1!'!&$& "!**&"&&!

.32 %'!("!"*&"&&(%%'&"!!

&&255***''54

6&! 99..

'!9'&! 7 7: ;

7"')%! 7 <

&  ?1,

: 8&  = = 

##44!!  <  

&#%%   = 

: >#& . ?1,

##4>#& . -  

##49&   - -

3&9& 9  ? 

3&& 9 .3

3& IB = <B

9#4!!   = 

9#>#& )  = -

NOTE 1

L1 L

  * ,<?1

24AA16/24LC16B

,$*-.'/00%&,



  !"#$%&"' ()"&'"!&)&#*&&&#

 4' '$!#&)!&#!

- 4!!*!"&#

 '!#&.0

1,2 1!'!&$& "!**&"&&!

.32 %'!("!"*&"&&(%%'&"!!

&&255***''54

6&! 99..

'!9'&! 7 7: ;

7"')%! 7 <

&  1,

: 8&  <  

&#%%    

,&&4!! - .3

: 9&  1,

: >#& . -1,

.$!##9&  - = 

.$!##>#& .  = 

,&&>#& )   -

,&&9& 9 -  

,&&&.$!## C  = =

NOTE 1

EXPOSED PAD

NOTE 1

A3 A1

NOTE 2

BOTTOM VIEW

TOP VIEW

  * ,-,

24AA16/24LC16B

,$*-.'/00%&,

&&255***''54

24AA16/24LC16B

,$*-./00%12(,

&&255***''54

24AA16/24LC16B

,$*-./00%12(,

&&255***''54

24AA16/24LC16B

." !*-. . !



  !"#$%&"' ()"&'"!&)&#*&&&#

- '!#&.0

1,2 1!'!&$& "!**&"&&!

.32 %'!("!"*&"&&(%%'&"!!

&&255***''54

6&! 99..

'!9'&! 7 7: ;

7"')%! 7 <

&  ?1,

: 8&  = = 

##44!!   < 

&#%%   = 

: >#& . 1,

##4>#& . -1,

: 9&  -1,

3&9& 9  ? <

3&& 9 .3

3& IB = <B

9#4!!  < = -

9#>#& )  = 

NOTE 1

L1 L

  * ,1

24AA16/24LC16B

2 !(""!( !(/



 '!!#.#&"#'#%!&"!!#%!&"!!!&$#''!#

 '!#&.0

1,2 1!'!&$& "!**&"&&!

&&255***''54

6&! 99..

'!9'&! 7 7: ;

7"')%! 7 

9#&  1,

:"&!#9#&  1,

: 8&   = 

##44!!  < = -

&#%%   = 

: >#& .  = -

##4>#& . - = <

: 9&   = -

3&9& 9  = ?

3&& 9 - = <

3& B = -B

9#4!!  < = ?

9#>#& )  = 

123

A2 c

  * ,1

24AA16/24LC16B

APPENDIX A: REVISION HISTORY

Revision D

Corrections to Section 1.0, Electrical Characteristics.

Revision E

Added DFN package.

Revision F

Revised Figure 3-2 Control Byte Allocation; Figure 4-1

Byte Write; Figure 4-2 Page Write; Section 6.0 Write

Protectio n; Figure 7-1 Curre nt Address Read ; Figure 7-

2 Random Read; Figure 7-3 Sequential Read; Section

8.3 Write-Protect (WP).

Revision G (02/2007)

Changed 1.8V to 1.7V; Revised Features Section;

Replaced Package Drawings; Revised Product ID

Section.

Revision H (01/2009)

Added TDFN Package; Updated Package Drawings.

Revision J (10/2009)

Added 5-Lead Chip Scale Package.

24AA16/24LC16B

NOTES:

24AA16/24LC16B

THE MICROCHIP WEB SITE

Microc hip pro vides onl ine s upport v ia our W WW site at

www.microchi p.c om . Thi s web si te i s us ed as a m ean s

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

•Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

•General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online dis cu ss io n gr oups, Microchip con sultant

program member listing

•Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specif ied produ ct family or develo pment tool of interes t.

To register, access the Microchip web site at

www.microchip.com, click on Customer Change

Notification and follow the registration instructions.

CUSTOMER SUPP ORT

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Development Systems Information Line

Customers should contact their distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

Technical s upport is a vailable through the web si te

at: http://support.microchip.com

24AA16/24LC16B

READER RESP ONSE

It is ou r intentio n to provide you w it h th e b es t do cument ation po ss ib le to ensure suc c es sfu l u se of y ou r M ic roc hip prod-

uct. If you wi sh to prov ide you r comment s on org aniza tion, clar ity, subj ect matte r , and ways i n which o ur docum entatio n

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

To: Technical Publications Manager

RE: Reader Response Total Pages Sent ________

From: Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

Application (optional):

Would you like a reply? Y N

Device: Literature Number:

Questions:

FAX: (______) _________ - _________

DS21703J24AA16/24LC16B

1. What are t he best featu res of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

24AA16/24LC16B

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. X/XX

PackageTemperature

Range

Device

24A A16: = 1.7V, 16 Kbit I2C Serial EEPROM

24AA16T: = 1.7V, 16 Kbit I2C Serial EEPROM

(Tape and Reel)

24LC16B: = 2.5V, 16 Kbit I2C Serial EEPROM

24LC16BT: = 2. 5V, 16 Kbit I2C Serial EEPRO M

(Tape and Reel)

Temperature

Range: I = -40°C to +85°C

E = -40°C to +125°C

Package: MC = 2x3 DFN, 8-lead

P = Plastic DIP (300 mil body), 8-lead

SN = Plastic SOIC (3.90 mm body), 8-lead

ST = Plas tic TSSOP (4.4 mm), 8-lead

MS = Plastic Micro Small Outline (MSOP),

8-lead

OT = SOT-23, 5-lead (Tape and Reel only)

MNY(1) = TDFN, (2x3x0.75 mm body), 8-lead

CS16K (2) = Chip Scale (CS), 5-lead (I-temp, “AA”

Tape and Reel only)

Note 1: “Y” indicates a Nickel Palladium Gold (NiPdAu) finish.

2: “16K” indicates 160K technology.

Examples:

a) 24AA16-I/P: Industrial Temperature,1.7V,

PDIP package

b) 24AA16-I/SN: Industrial Temper ature,1.7V,

SOIC package

c) 24AA16T-I/OT: Industrial Temperature,

1.7V, SOT-23 package, Tape and Reel

d) 24LC16B-I/P: Industrial T emperature, 2.5V,

PDIP package

e) 24LC16B-E/SN: Automotive Temp.,2.5V

SOIC package

f) 24LC16BT-I/OT: Industrial Temperat ure,

2.5V, SOT-23 package, Tape and Reel

24AA16/24LC16B

NOTES:

Information contained in this publication regarding device

applications and the like is provided only for your con ve nience

and may be superseded by u pdates. It is y our respo ns ibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPL AB, PIC , PI Cmi cro, PI CSTART,

rfPIC and UNI/O are registered trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Contr ol

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard,

dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,

ECONOMONIT OR, FanSense, HI- TIDE , In - Circuit Seria l

Programming, ICSP, Mindi, MiWi, MPASM, MPLA B Cert ified

logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code

Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,

PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total

Endurance, TSHARC, UniWinDriver, WiperLock and ZENA

are trademarks of Microchip Tec hnology Incorporat ed in the

U.S.A. and other countries.

SQTP is a service mark of Microchip T echnology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that it s family of products is one of the most secure families of its kind on the market today, when used in t he

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contai ned in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our

products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such act s

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code ho pping

devices, Serial EEPROMs, microperiph erals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

AMERICAS

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Techn ical Su pport:

http://support.microchip.com

Web Address:

www.microchip.com

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

Boston

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Chicago

Itasc a , IL

Tel: 630-285-0071

Fax: 630-285-0075

Cleveland

Independence, OH

Tel: 216-447-0464

Fax: 216-447-0643

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

Detroit

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

Kokomo

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

Los A n ge les

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

Santa Clara

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

ASIA/PACIFIC

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

Australia - Sydney

Tel: 61-2-9868-67 33

Fax: 61-2-9868-6755

China - Beijing

Tel: 86-10-8528-2 100

Fax: 86-10-8528-2104

China - Chengdu

Te l: 86-28-8665-55 11

Fax: 86-28-8665-7889

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

China - Nanjing

Tel: 86-25-8473-2 460

Fax: 86-25-8473-2470

China - Qingdao

Tel: 86-532-8502- 7355

Fax: 86-532-8502-7205

China - Shanghai

Tel: 86-21-5407-5 533

Fax: 86-21-5407-5066

China - Shenyang

Tel: 86-24-2334-2 829

Fax: 86-24-2334-2393

China - Shenzhen

Tel: 86-755-8203- 2660

Fax: 86-755-8203-1760

China - Wuhan

Tel: 86-27-5980-5 300

Fax: 86-27-5980-5118

China - Xiamen

Tel: 86-592-2388138

Fax: 86-592-2388130

China - Xian

Tel: 86-29-8833-7 252

Fax: 86-29-8833-7256

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

ASIA/PACIFIC

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4080

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

Korea - Seoul

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Taiwan - Hsin Chu

Tel: 886-3-6578-300

Fax: 886-3-6578-370

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Thailand - Bangko k

Tel: 66-2-694-1351

Fax: 66-2-694-1350

EUROPE

Austria - Wels

Tel: 43-7242-2244- 39

Fax: 43-7242-2244-393

Denmark - Cop e nha gen

Tel: 45-4450-2828

Fax: 45-4485-2829

France - Paris

Te l: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Germany - Munich

Tel: 49-89-627- 144-0

Fax: 49-89-627-14 4-44

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Spain - Madrid

Tel: 34-91-708- 08-90

Fax: 34-91-708-08 -91

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

WORLDWIDE SALES AND SERVICE

03/26/09