APW7101-BI-TRL - Anpec Electronics Corp.

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw1

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise

customers to obtain the latest version of relevant information to verify before placing orders.

1.5MHz, 600mA, Synchronous Buck Regulator

FeaturesGeneral Description

Applications

•Cellular Telephones

•Personal Information Appliances

•Wireless and DSL Modems

•MP3 Players

•Digital Still Cameras

•Portable Instruments

The APW7101 is a high efficiency monolithic synchronous

buck regulator. APW7101 operates with a constant

1.5MHz switching frequency and using the inductor cur-

rent as a controlled quantity in the current mode

architecture. The device is available in an adjustable ver-

sion and fixed output voltages of 1.5V and 1.8V. The 2.5V

to 5.5V input voltage range makes the APW7101 ideally

suited for single Li-Ion battery powered applications.

100% duty cycle provides low dropout operation, extend-

ing battery life in portable electrical devices. The internally

fixed 1.5MHz operating frequency allows the use of small

surface mount inductors and capacitors. The synchro-

nous switches included inside increase the efficiency and

eliminate the need for an external Schottky diode. Low

output voltages are easily supported with the 0.6V feed-

back reference voltage. The APW7101 is available in a

low profile SOT package for saving the printed circuit

board area.

•600mA Output Current

•2.5V to 5.5V Input Voltage Range

•1.5MHz Constant Frequency Operation

•Low Dropout Operation at 100% Duty Cycle

•Synchronous Topology:

No Schottky Diode Required

•0.6V Low Reference Voltage

•Shutdown Mode Supply Current Under 1µA

•Current Mode Operation for Excellent Line and

Load Transient Response

•Over-Temperature Protection

•Over Current Protection

•SOT-23-5 Package

•Lead Free and Green Devices Available

(RoHS Compliant)

Pin Configuration

Top View

RUN

GND

VFB

VIN

APW7101 ADJ

3 4

Top View

RUN

GND

VOUT

VIN

APW7101 1.5V/1.8V

3 4

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw2

Ordering and Marking Information

APW7101 -

Package Code

B : SOT-23-5

Temperature Range

I : -40 to 85 C

Handling Code

TR : Tape & Reel

Voltage Code

15: 1.5V 18: 1.8V Blank : Adjustable Version

Assembly Material

L : Lead Free Device

G : Halogen and Lead Free Device

Handling Code

Temperature Range

Package Code

APW7101-15 : 019X

Assembly Material

Voltage Code

X - Date Code

APW7101 : W01X X - Date Code

APW7101-18 : 01CX X - Date Code

Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish;

which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-

020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and

halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed

1500ppm by weight).

Absolute Maximum Ratings

Symbol Parameter Value Unit

VCC Input Supply Voltage (VCC to GND) -0.3V to 6V V

VRUN RUN Pin Voltage -0.3V to (VCC+0.3V) V

VFB Feedback Voltage -0.3V to (VCC+0.3V) V

VSW Switching Voltage -0.3V to (VCC+0.3V) V

ISW_PEAK Peak SW Current 1.3 A

PD Average Power Dissipation 0.5 W

TJ Junction Temperature, TA < 50° 150 °C

TSTG Storage Temperature -65 ~ 150 °C

TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 °C

Symbol Parameter Typical Value Unit

θJA Junction to Ambient Thermal Resistance in Free Air 250 °C/W

Thermal Characteristics

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw3

Electrical Characteristics

APW7101

Symbol Parameter Test conditions Min.

Typ. Max.

Unit

IVFB Feedback Current *

-30 - 30 nA

VIN Input Voltage Range *Note *

2.5 - 5.5 V

VFB Regulated Feedback Voltage -40°C ≤ TA ≤ 85°C *

0.585

0.6 0.615

∆VFB Reference Voltage Line Regulation VIN = 2.5V to 5.5V *

0.04

0.4 %/V

APW7101-1.5, IOUT = 100mA *

1.455

1.500

1.545

VOUT Regulated Output Voltage APW7101-1.8, IOUT=100mA *

1.746

1.800

1.854

∆VOUT Output Voltage Line Regulation VIN = 2.5V to 5.5V *

0.04

0.4

%/V

IPK Peak Inductor Current VIN = 3V, VFB = 0.5V or

VOUT = 90%

Duty < 35%

0.75

1 1.25 A

VLOADR Output Voltage Load Regulation

0.5 %

IQ Quiescent Current Duty Cycle = 0; VFB = 1.5V

300 400 µA

IQ_SD Quiescent Current in Shutdown

0.1 1 µA

fOSC Oscillator Frequency VFB = 0.6V or VOUT = 100%

1.2 1.5 1.8 MHz

fOSC_FFB Frequency Foldback VFB = 0V or VOUT = 0V

300 -

kHz

RDSON_P On Resistance of P MOSFET ISW = 100mA

- 0.4 0.5 Ω

RDSON_N On Resistance of N MOSFET ISW = -100mA

- 0.35 0.45 Ω

ILSW SW Leakage Current VRUN = 0V, VSW = 0V or 5V, VIN = 5V

±0.01

±1 µA

VRUN RUN Threashold *

0.3 1 1.5 V

IRUN RUN Leakage Current *

±0.01

±1 µA

The * denotes the specifications that apply over TA = -40°C ~ 85°C, otherwise specifications are at TA=25°C.

Note: The Maximum output current didn’t reach 600mA when the supply voltage below 2.7V.

No. PIN FUNCTION

1 RUN Control input pin. Forcing this pin above 1.5V enables APW7101. Forcing this

pin below 0.3V shuts

down APW7101. In shutdown situation, all functions are disabled to decrease the supply current

below 1µA.There is no pull high or pull low ability inside.

2 GND Ground pin.

3 SW Connected this pin to the inductor of the power stage. This pin connected to

the drain terminals of

the main and synchronous power MOSFET switches inside.

4 VIN Must be closely decoupled to GND with 4.7µF or greater ceramic capacitor.

5 VFB/VOUT In the adjustable version, feedback function is available. The feedback voltage

decided by an

external resistive divider across the output. In the fixed version,

an internal resistive divider divides

the output voltage down for comparison to the internal reference voltage.

Pin Descrpition

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw4

Application Circuit

CIN: Murata GRM31CR61C475K

COUT: Murata GRM31CR61A106K

L: Gotrend GTSD53

VIN

2.5V TO 5.5V

CIN

4.7µFCOUT

10µF

RF1

470K

RF2

150K

2.2µHVOUT=2.5V

4 3

VIN

2.5V TO 5.5V

CIN

4.7µFCOUT

10µF

2.2µHVOUT

4 3

VDD SW

GND

RUN FB

APW7101

VDD SW

GND

RUN FB

APW7101/1.5V/1.8V

Block Diagram

Control

Logic

Oscillator

0.6V

ΣICOMP

Slop

Compensation

Frequency

Shift

VFB

RUN

VIN

GND

Shutdown

RSENSE

QSENSE

Reverse

detect

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw5

100

200

300

400

500

600

700

-50 -25 025 50 75 100 125

NMOS

PMOS

1200

1300

1400

1500

1600

1700

1800

2 3 4 5 6

1200

1300

1400

1500

1600

1700

1800

-50 -25 025 50 75 100 125

0.585

0.590

0.595

0.600

0.605

0.610

0.615

-50 -25 025 50 75 100 125

Typical Operating Characteristics

Temperature (o C)Temperature (o C)

Reference Voltage (V)

Frequency (kHz)

Oscillator Frequency

Reference Voltage

Temperature (o C)Supply Voltage (V)

ON Resistance (mΩ)

RDS(ON) vs TemperatureOscillator Frequency vs Supply Voltage

VIN=5.5VVIN=5.5V

VIN=2.5VVIN=2.5V

Frequency (kHz)

TA=25o C

VIN=2.7VVIN=2.7V

VIN=3.6VVIN=3.6V

VIN=4.2VVIN=4.2V

VIN=3.6V

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw6

100

0.1 1.0 10.0 100.0 1000.0

100

0.1 1.0 10.0 100.0 1000.0

100

0.1 1.0 10.0 100.0 1000.0

100

200

300

400

500

600

0123456

Input Voltage (V)Output Current (mA)

ON Resistance (mΩ)

Efficiency (%)

Efficiency vs Output Current

RDS(ON) vs Input Voltage

Output Current (mA)

Efficiency vs Output Current

Efficiency (%)

PMOSPMOS

NMOSNMOS

VOUT=1.2V

TA=25o C

VIN=2.7VVIN=2.7V

VIN=3.6VVIN=3.6V

VIN=4.2VVIN=4.2V

VOUT=1.5V

TA=25o C

VIN=2.7VVIN=2.7V

VIN=3.6VVIN=3.6V

VIN=4.2VVIN=4.2V

VIN=3.6VVIN=3.6V

VIN=2.7VVIN=2.7V

Efficiency vs Output Current

Output Current (mA)

Efficiency (%)

Typical Operating Characteristics (Cont.)

VOUT=2.5V

TA=25o C

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw7

0.988

0.99

0.992

0.994

0.996

0.998

1.002

1.004

1.006

1.008

0100 200 300 400 500 600

VIN=3.3V

VIN=5V

L=2.2uH

TA=25°C

100

0.1 1 10 100 1000

VIN=3.3V

VIN=5V

VOUT=1V

L=2.2uH

TA=25°C

Output Current (mA)Output Current (mA)

Efficiency (%)

Output Voltage (mV)

Output Voltage vs Output CurrentEfficiency vs Output Current

Typical Operating Characteristics (Cont.)

100

2 3 4 5 6

100

23456

Input Voltage (V)Input Voltage (V)

Efficiency (%)

Efficiency vs Input VoltageEfficiency vs Input Voltage

IOUT=100mAIOUT=100mA

IOUT=600mAIOUT=600mA

IOUT=10mAIOUT=10mA

VOUT=1.5V

TA=25o C

IOUT=100mAIOUT=100mA

IOUT=600mAIOUT=600mA

IOUT=10mAIOUT=10mA

VOUT=1.8V

TA=25o C

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw8

500

550

600

650

700

750

800

-50 -25 025 50 75 100 125

100

150

200

250

300

-50 -25 025 50 75 100 125

Typical Operating Characteristics (Cont.)

Temperature (o C)Temperature (o C)

P-FET Leakage(nA)

N-FET Leakage(nA)

N-FET Leakage vs Temperature

P-FET Leakage vs Temperature

VIN=5.5V VIN=5.5V

200

220

240

260

280

300

320

340

360

380

400

23456

100

23456

Supply Voltage (V)

Input Voltage (V)

Dynamic Supply Current (µA)

Dynamic Supply Current vs Supply VoltageEfficiency vs Input Voltage

Efficiency (%)

VOUT=2.5V

TA=25o C

IOUT=100mAIOUT=100mA

IOUT=600mAIOUT=600mA

IOUT=10mAIOUT=10mA

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw9

Function Description

Main Control Loop

The APW7101 uses a constant frequency, current mode

step-down architecture. Both the main and synchro-

nous switches are internal to reduce the external

components. During normal operation, the internal

PMOSFET is turned on, but is turned off when the induc-

tor current at the input of ICOMP to reset the RS latch. The

load current increases, it causes a slight decrease in

the feedback voltage, which in turn, causes the EA’s out-

put voltage to increase until the average inductor current

matches the new load current. While the internal power

PMOSFET is off, the internal power NMOSFET is turned

on until the inductor current starts to reverse, as indicated

by the current reversal comparator IRCMP, or the beginning

of next cycle. When the NMOSFET is turned off by IRCMP, it

operates in the discontinuous conduction mode.

Pulse Skipping Mode Operation

At light load with a relative small inductance, the in-

ductor current may reach zero. The internal power

NMOSFET is turned off by the current reversal comparator,

IRCMP, and the switching voltage will ring. This is discon-

tinuous mode operation, and is normal behavior for the

switching regulator. At very light load, the APW7101 will

automatically skip some pulses in the pulse skipping

mode to maintain the output regulation. The skipping pro-

cess modulates smoothly depend on the load.

Short Circuit Protection

In the short circuit situation, the output voltage is al-

most zero volts. Output current is limited by the ICOMP to

prevent the damage of electrical circuit. In the normal

operation, the two straight line of the inductor current

ripple have the same height, it means the volts-sec-

onds product is the same. When the short circuit opera-

tion occurs, the output voltage down to zero leads to the

voltage across the inductor maximum in the on period and

the voltage across the inductor minimum in the off period.

In order to maintain the volts-seconds balance, the off-

time must be extended to prevent the inductor current run

away. Frequency decay will extend the switching period

to provide more times to the off-period, then the inductor

An important detail to remember is that on resistance of

PMOSFET switch will increase at low input supply voltage.

Therefore, the user should calculate the power dissipa-

tion when the APW7101 is used at 100% duty cycle with

low input voltage.

Slope Compensation

Slope compensation provides stability in constant fre-

quency current mode architecture by preventing sub-

harmonic oscillations at high duty cycle. It is accom-

plished internally by adding a compensating ramp to the

inductor current signal at duty cycle in excess of 40%.

Normally, this results in a reduction of maximum induc-

tor peak current for duty cycles greater than 40%. In the

APW7101, the reduction of inductor peak current recov-

ered by a special skill at high duty ratio. This allows the

maximum inductor peak current maintain a constant level

through all duty ratio.

current has to restrict to protect the electrical circuit in the

short situation.

Dropout Operation

As the input supply voltage decreases to a value ap-

proaching the output voltage, the duty cycle increases to-

ward the maximum on time. Further reduction of the sup-

ply voltage forces the main switch to remain on for more

than one cycle until it reaches 100% duty cycle. The out-

put voltage will then be determined by the input volt-

age minus the voltage drop across the PMOSFET and the

inductor.

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw10

Application Information

Inductor Selection

where fS is the switching frequency of APW7101 and ∆IL is

the value of the worst current ripple, it can be any value of

current ripple that smaller than the worst value you can

accept. In order to perform high efficiency, selecting a low

DC resistance inductor is a helpful way. Another impor-

tant parameter is the DC current rating of the inductor.

The minimum value of DC current rating equals the full

load value of 600mA, plus the half of the worst current

ripple, 120mA. Choose inductors with suitable DC

current rating to ensure the inductors don’t operate in the

saturation.

(

)

)1......(

fI 1

VVVV

LSLIN

OUTOUTIN ⋅∆

⋅

⋅−

Figure-1 shows a schematic of a Buck structure. The

waveforms is shown as Figure-2.

Input Capacitor Selection

The input capacitor must be able to support the maxi-

mum input operating voltage and maximum RMS input

current. The Buck converter absorbs current from input in

pulses.

Due to the high switching frequency as 1.5MHz, the in-

ductor value of the application field of APW7101 is usually

from 1µH to 4.7µH. The criterion to select a suitable in-

ductor is dependent on the worst current ripple through-

out the inductor. The worst current ripple defines as 40%

of the fully load capability. In the APW7101 applications,

the worst value of current ripple is 240mA, the 40% of

600mA. Evaluate L by equation (1):

Figure-1

Figure-2

IIN

IOUT

IIN I(CIN)

I(COUT)

IOUT

I(Q1)

PWM

D*TS

(1-D)*TS

Observe the waveform of I(CIN),the RMS value of I(CIN) is

( ) ( )

[

]

(

)

)2......(D1IDIICI2

INOUTIN −⋅+⋅−=

Replace D and IIN by following relation:

)3......(

DIN

OUT

)4......(IDI OUTIN ⋅=

The RMS value of input capacitor current equal:

(

)

)5......()D1(DICIOUTIN −⋅=

When D=0.5 the RMS current of input capacitor will be

maximum value. Use this value to choose the input

capacitor with suitable current rating.

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw11

Application Information (Cont.)

I(COUT)

∆VOUT1

∆IL

VOUT

0.5TS

Figure-3

Output Capacitor Selection

The output voltage ripple is a significant parameter to

estimate the performance of a convertor. There are two

discrete components that affect the output voltage

ripple bigger or smaller. It is recommended to use the

criterion has mentioned above to choose a suitable

inductor. Then based on this known inductor current ripple

condition, the value and properties of output capacitor will

affect the output voltage ripple better or worse. The output

voltage ripple consists of two portions, one is the product

of ESR and inductor current ripple, the other portion is the

function of the inductor current ripple and the output

capacitance. Figure-3 shows the waveforms to explain

the part decided by the output capacitance.

)6......(VCT

Q1OUTOUTSL∆⋅=











⋅∆=

where TS is the inverse of switching frequency and the ∆IL

is the inductor current ripple. Move the COUT to the left side

to estimate the value of ∆VOUT1 as equation (7).

)7......(

C8TI

VOUT

1OUT ⋅⋅∆

=∆

As mentioned above, one part of output voltage ripple is

the product of the inductor current ripple and ESR of out-

put capacitor. The equation (8) explains the output volt-

age ripple estimation.

)8......(

C8T

ESLIVOUT

LOUT 











⋅

+⋅∆=∆

Evaluate the ∆VOUT1 by the ideal of energy equalization.

According to the definition of Q,

Thermal Consideration

(

)

(

)

[

]

)9......(D1RDRIPONN_DSONP_DS

OUTD−⋅+⋅=

APW7101 has internal over temperature protection. When

the junction temperature reaches 150 centigrade,

APW7101 will turn off both internal power PMOSFET and

NMOSFET. The estimation of the junction temperature,

TJ, defined as:

)10......(PTJADJθ⋅=

where the θJA is the thermal resistance of the package

utilized by APW7101.

Output Voltage Setting

APW7101 has the adjustable version for output voltage

APW7101 is a high efficiency switching converter, it means

less power loss transferred into heat. Due to the on re-

sistance difference between internal power PMOSFET

and NMOSFET, the power dissipation in the high convert-

ing ratio is greater than low converting ratio. The worst

case is in the dropout operation, the mainly conduction

loss dissipate on the internal power PMOSFET. The power

dissipation nearly defined as:

setting by the users. A suggestion of maximum value of

RF2 is 200kΩ to keep the minimum current that provides

enough noise rejection ability through the resistor divider.

The output voltage programmed by the equation:

RF1

RF2

APW7101

VOUT

)11......(

16.0V2F

OUT 











+⋅=

Figure-4

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw12

Application Description (Cont.)

PCB Layout Consideration

APW7101 is a high efficiency DC-DC converter which is a

noise source in the electrical circuit by its switching

operating. Some PCB layout considerations suppress

the effect of switching operating by APW7101 itself to im-

prove the better regulation.

<1> Keep the power trace wide and short as possible.

The power trace shows in the Figure-6 as thick solid

lines.

<2> Put the CIN to VIN close and COUT near the inductor as

possible.

<3> Keep the ground terminal of CIN and COUT as close as

possible to minimize the AC current loop.

<4> Put the voltage divider consist of RF1 and RF2 closely

to FB, the connection path between RF1 and VOUT must

far away the SW to prevent the switch noise coupling

into FB by crosstalk. If necessary, the connection path

between RF1 and VOUT must near to SW, put a ground

trace between the feedback trace and SW to prevent

the coupling.

VIN

2.5V TO 5.5V

CIN

4.7µFCOUT

10µF

2.2µHVOUT

VDD SW

GND

RUN FB

APW7101/1.5V/1.8V

VIN

2.5V TO 5.5V

CIN

4.7µFCOUT

10µF

RF1

RF2

2.2µHVOUT

VDD SW

GND

RUN FB

APW7101

Figure-5

Figure-6

Suggested layout Top Side

Figure-7

Suggested layout Button Side

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw13

Package Information

SOT-23-5

MAX.

0.057

0.051

0.024

0.006

0.009

0.0200.012

L0.30

0.08

0.30

0.60 0.012

0.95 BSC

1.90 BSC

0.22

0.50

0.037 BSC

0.075 BSC

0.003

MIN.

MILLIMETERS

0.00

0.90

SOT-23-5

MAX.

1.45

0.15

1.30

MIN.

0.000

0.035

INCHES

VIEW A

0.25

GAUGE PLANE

SEATING PLANE

A2A1

SEE

VIEW A

1.40

2.60

1.80

3.00

2.70 3.10 0.122

0.071

0.1180.102

0.055

0.106

Note : 1. Follow JEDEC TO-178 AA.

2. Dimension D and E1 do not include mold flash, protrusions or gate

burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil

per side.

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw14

Application

A H T1 C d D W E1 F

178.0±

2.00

50 MIN.

8.4+2.00

-0.00

13.0+0.50

-0.20

1.5 MIN.

20.2 MIN.

8.0±

0.30

1.75±

0.10

3.5±

0.05

P0 P1 P2 D0 D1 T A0 B0 K0

SOT-23-5

4.0±0.10

2.0±0.05

1.5+0.10

-0.00

1.0 MIN.

0.6+0.00

-0.40

3.20±0.20

3.10±0.20

1.50±0.20

(mm)

Devices Per Unit

Carrier Tape & Reel Dimensions

Package Type Unit Quantity

SOT-23-5 Tape & Reel 3000

OD0

BA0

SECTION B-B

SECTION A-A

OD1

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw15

Reflow Condition (IR/Convection or VPR Reflow)

Classification Reflow Profiles

Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly

Average ramp-up rate

(TL to TP) 3°C/second max. 3°C/second max.

Preheat

- Temperature Min (Tsmin)

- Temperature Max (Tsmax)

- Time (min to max) (ts)

100°C

150°C

60-120 seconds

150°C

200°C

60-180 seconds

Time maintained above:

- Temperature (TL)

- Time (tL) 183°C

60-150 seconds 217°C

60-150 seconds

Peak/Classification Temperature (Tp)

See table 1 See table 2

Time within 5°C of actual

Peak Temperature (tp) 10-30 seconds 20-40 seconds

Ramp-down Rate 6°C/second max. 6°C/second max.

Time 25°C to Peak Temperature 6 minutes max. 8 minutes max.

Note: All temperatures refer to topside of the package. Measured on the body surface.

Test item Method Description

SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec

HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125°C

PCT JESD-22-B, A102 168 Hrs, 100%RH, 121°C

TST MIL-STD-883D-1011.9 -65°C~150°C, 200 Cycles

ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V

Latch-Up JESD 78 10ms, 1tr > 100mA

Reliability Test Program

t 25 C to Peak

Ramp-up

Ramp-down

Preheat

Tsmax

Tsmin

Temperature

Time

Critical Zone

TL to TP

Rev. A.4 - Jun., 2008

APW7101

www.anpec.com.tw16

Table 2. Pb-free Process – Package Classification Reflow Temperatures

Package Thickness Volume mm3

<350 Volume mm3

350-2000 Volume mm3

>2000

<1.6 mm 260 +0°C* 260 +0°C* 260 +0°C*

1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C*

≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C*

*Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the

stated classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C)

at the rated MSL level.

Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures

Package Thickness Volume mm3

<350 Volume mm3

≥350

<2.5 mm 240 +0/-5°C 225 +0/-5°C

≥2.5 mm 225 +0/-5°C 225 +0/-5°C

Classification Reflow Profiles (Cont.)

Customer Service

Anpec Electronics Corp.

Head Office :

No.6, Dusing 1st Road, SBIP,

Hsin-Chu, Taiwan

Tel : 886-3-5642000

Fax : 886-3-5642050

Taipei Branch :

2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,

Sindian City, Taipei County 23146, Taiwan

Tel : 886-2-2910-3838

Fax : 886-2-2917-3838