Data Sheet
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
Comlinear® CLC1004, CLC1014, CLC3004
Single and Triple, 750MHz Ampliers with Disable
FEATURES
n 0.1dB gain atness to 200MHz
n 0.02%/0.01˚ differential gain/phase
n 750MHz -3dB bandwidth at G = 2
n 350MHz large signal bandwidth
n 1,400V/μs slew rate
n 4nV/√Hz input voltage noise
n 100mA output current
n 20ns enable time
n Stable for gains of 2V/V or larger
n Fully specied at 5V and ±5V supplies
n CLC1004: Pb-free SOT23-6
n CLC1014: Pb-free SOT23-5
n CLC3004: Pb-free SOIC-16
APPLICATIONS
n RGB video line drivers
n High denition video driver
n Video switchers and routers
n ADC buffer
n Active lters
n Cable drivers
n Imaging applications
n Radar/communication receivers
General Description
The COMLINEAR CLC1004 (single with disable), CLC1014 (single), and
CLC3004 (triple with disable) are high-performance, voltage feedback am-
pliers that provide 750MHz gain of 2 bandwidth, ±0.1dB gain atness to
200MHz, and 1,400V/μs slew rate. This high performance exceeds the re-
quirements of high-denition television (HDTV) and other multimedia appli-
cations. These COMLINEAR high-performance ampliers also provide ample
output current to drive multiple video loads.
The COMLINEAR CLC1004, CLC1014, and CLC3004 are designed to operate
from ±5V or +5V supplies. The CLC1004 and CLC3004 offer a fast enable/
disable feature to save power. While disabled, the outputs are in a high-
impedance state to allow for multiplexing applications. The combination of
high-speed, low-power, and excellent video performance make these ampli-
ers well suited for use in many general purpose, high-speed applications
including video line driving and imaging applications.
Typical Application - Driving Multiple Video Loads
Ordering Information
Part Number Package Pb-Free RoHS Compliant Operating Temperature Range Packaging Method
CLC1004IST6X SOT23-6 Yes Yes -40°C to +85°C Reel
CLC1004IST6 SOT23-6 Yes Yes -40°C to +85°C Rail
CLC1014IST5X SOT23-5 Yes Yes -40°C to +85°C Reel
CLC1014IST5 SOT23-5 Yes Yes -40°C to +85°C Rail
CLC3004ISO16X SOIC-16 Yes Yes -40°C to +85°C Reel
CLC3004ISO16 SOIC-16 Yes Yes -40°C to +85°C Rail
Moisture sensitivity level for all parts is MSL-1.
Input
Output A
+Vs
-Vs
Rg
Rf
75Ω
75Ω
Cable 75Ω
Cable
75Ω
Cable
75Ω
75Ω
75Ω
75Ω
Output B
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 2
CLC1004 Pin Assignments
Pin No. Pin Name Description
1 OUT Output
2 -VSNegative supply
3 +IN Positive input
4 -IN Negative input
5 DIS
Disable pin. Enabled if pin is grounded, left oat-
ing or pulled below VON, disabled if pin is pulled
above VOFF.
6 +VSPositive supply
CLC3004 Pin Conguration
Pin No. Pin Name Description
1-IN1 Negative input, channel 1
2+IN1 Positive input, channel 1
3-VSNegative supply
4 -IN2 Negative input, channel 2
5 +IN2 Positive input, channel 2
6 -VSNegative supply
7 -IN3 Negative input, channel 3
8 +IN3 Positive input, channel 3
9 -VSNegative supply
10 OUT3 Output, channel 3
11 +VSPositive supply
12 OUT2 Output, channel 2
13 +VSPositive supply
14 DIS
Disable pin. Enabled if pin is grounded, left oat-
ing or pulled below VON, disabled if pin is pulled
above VOFF.
15 OUT1 Output, channel 1
16 +VSPositive supply
Disable Pin Truth Table
Pin High Low*
DIS Disabled Enabled
*Default Open State
CLC1004 Pin Conguration
CLC3004 Pin Conguration
2
3
6
4
+IN
+VS
-IN
1
-VS
OUT
-
+5
DIS
2
3
4 13
14
15
16
OUT1
-VS
+VS
DIS
1
+IN1
-IN1
5
6
7
-IN3
-VS
+IN2
10
11
12 OUT2
+VS
OUT3
-IN2 +VS
8
+IN3 9-VS
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 3
CLC1014 Pin Assignments
Pin No. Pin Name Description
1 OUT Output
2 -VSNegative supply
3 +IN Positive input
4 -IN Negative input
5 +VSPositive supply
CLC1014 Pin Conguration
2
3
5
4
+IN
+VS
-IN
1
-VS
OUT
-
+
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 4
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper de-
vice function. The information contained in the Electrical Characteristics tables and Typical Performance plots reect the
operating conditions noted on the tables and plots.
Parameter Min Max Unit
Supply Voltage 0 14 V
Input Voltage Range -Vs -0.5V +Vs +0.5V V
Continuous Output Current 100 mA
Reliability Information
Parameter Min Typ Max Unit
Junction Temperature 150 °C
Storage Temperature Range -65 150 °C
Lead Temperature (Soldering, 10s) 260 °C
Package Thermal Resistance
5-Lead SOT23 221 °C/W
6-Lead SOT23 177 °C/W
16-Lead SOIC 68 °C/W
Notes:
Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
ESD Protection
Product SOT23-5 SOT23-6 SOIC-16
Human Body Model (HBM) 2kV 2kV 2kV
Charged Device Model (CDM) 1kV 1kV 1kV
Recommended Operating Conditions
Parameter Min Typ Max Unit
Operating Temperature Range -40 +85 °C
Supply Voltage Range 4.5 12 V
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 5
Electrical Characteristics at +5V
TA = 25°C, Vs = +5V, Rf = Rg =150Ω, RL = 150Ω to VS/2, G = 2; unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
Frequency Domain Response
BWSS -3dB Bandwidth G = +2, VOUT = 0.2Vpp 600 MHz
BWLS Large Signal Bandwidth G = +2, VOUT = 1Vpp 400 MHz
BW0.1dBSS 0.1dB Gain Flatness G = +2, VOUT = 0.2Vpp 150 MHz
BW0.1dBLS 0.1dB Gain Flatness G = +2, VOUT = 1Vpp 120 MHz
Time Domain Response
tR, tFRise and Fall Time VOUT = 1V step; (10% to 90%) 1.2 ns
tSSettling Time to 0.1% VOUT = 1V step 10 ns
OS Overshoot VOUT = 0.2V step 2 %
SR Slew Rate 1V step 750 V/µs
Distortion/Noise Response
HD2 2nd Harmonic Distortion VOUT = 1Vpp, 5MHz -72 dBc
HD3 3rd Harmonic Distortion VOUT = 1Vpp, 5MHz -85 dBc
THD Total Harmonic Distortion VOUT = 1Vpp, 5MHz 70 dB
DGDifferential Gain NTSC (3.58MHz), AC-coupled, RL = 150Ω 0.08 %
DPDifferential Phase NTSC (3.58MHz), AC-coupled, RL = 150Ω 0.04 °
IP3 Third Order Intercept VOUT = 1Vpp, 10MHz 38 dBm
SFDR Spurious Free Dynamic Range VOUT = 1Vpp, 5MHz 63 dBc
enInput Voltage Noise > 1MHz 4 nV/√Hz
inInput Current Noise > 1MHz 4 pA/√Hz
XTALK Crosstalk Channel-to-channel 5MHz, VOUT = 1Vpp 70 dB
DC Performance
VIO Input Offset Voltage 0 mV
dVIO Average Drift 4 µV/°C
IbInput Bias Current 3.2 µA
dIb Average Drift 20 nA/°C
PSRR Power Supply Rejection Ratio DC 56 dB
AOL Open-Loop Gain VOUT = VS / 2 65 dB
ISSupply Current per channel 11 mA
Disable Characteristics
TON Turn On Time 20 ns
TOFF Turn Off Time 40 ns
OFFIOS Off Isolation 5MHz -78 dB
VOFF Power Down Input Voltage DIS pin, disabled if pin is pulled above VOFF =
Vs - 2V Disabled if > (Vs - 2V) V
VON Enable Input Voltage DIS pin, enabled if pin is grouned, left open,
or pulled below VON = Vs - 4V Enabled if < (Vs - 4V) V
ISD Disable Supply Current CLC1004; DIS pin is pulled to VS 0.4 mA
CLC3004; DIS pin is pulled to VS0.4 mA
Input Characteristics
RIN Input Resistance Non-inverting 4.5 MΩ
CIN Input Capacitance 1.0 pF
CMIR Common Mode Input Range 1.5 to
3.5 V
CMRR Common Mode Rejection Ratio DC 50 dB
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 6
Electrical Characteristics at +5V continued
TA = 25°C, Vs = +5V, Rf = Rg =150Ω, RL = 150Ω to VS/2, G = 2; unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
Output Characteristics
ROOutput Resistance Closed Loop, DC 0.1 Ω
VOUT Output Voltage Swing RL = 150Ω 1.5 to
3.5 V
IOUT Output Current ±100 mA
Notes:
1. 100% tested at 25°C
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 7
Electrical Characteristics at ±5V
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
Frequency Domain Response
BWSS -3dB Bandwidth G = +2, VOUT = 0.2Vpp 750 MHz
BWLS Large Signal Bandwidth G = +2, VOUT = 2Vpp 350 MHz
BW0.1dBSS 0.1dB Gain Flatness G = +2, VOUT = 0.2Vpp 200 MHz
BW0.1dBLS 0.1dB Gain Flatness G = +2, VOUT = 2Vpp 120 MHz
Time Domain Response
tR, tFRise and Fall Time VOUT = 2V step; (10% to 90%) 1.3 ns
tSSettling Time to 0.1% VOUT = 2V step 10 ns
OS Overshoot VOUT = 0.2V step 1.5 %
SR Slew Rate 2V step 1400 V/µs
Distortion/Noise Response
HD2 2nd Harmonic Distortion VOUT = 2Vpp, 5MHz -71 dBc
HD3 3rd Harmonic Distortion VOUT = 2Vpp, 5MHz -82 dBc
THD Total Harmonic Distortion VOUT = 2Vpp, 5MHz 70 dB
DGDifferential Gain NTSC (3.58MHz), AC-coupled, RL = 150Ω 0.02 %
DPDifferential Phase NTSC (3.58MHz), AC-coupled, RL = 150Ω 0.01 °
IP3 Third Order Intercept VOUT = 2Vpp, 10MHz 41 dBm
SFDR Spurious Free Dynamic Range VOUT = 1Vpp, 5MHz 65 dBc
enInput Voltage Noise > 1MHz 4 nV/√Hz
inInput Current Noise > 1MHz 4 pA/√Hz
XTALK Crosstalk Channel-to-channel 5MHz, VOUT = 2Vpp 70 dB
DC Performance
VIO Input Offset Voltage(1) -10 0 10 mV
dVIO Average Drift 4 µV/°C
IbInput Bias Current (1) -20 3.2 20 µA
dIb Average Drift 20 nA/°C
PSRR Power Supply Rejection Ratio (1) DC 40 56 dB
AOL Open-Loop Gain VOUT = VS / 2 70 dB
ISSupply Current (1) per channel 12 17 mA
Disable Characteristics
TON Turn On Time 20 ns
TOFF Turn Off Time 40 ns
OFFIOS Off Isolation 5MHz -78 dB
VOFF Power Down Input Voltage DIS pin, disabled if pin is pulled above VOFF =
Vs - 1V Disabled if > (Vs - 1V) V
VON Enable Input Voltage DIS pin, enabled if pin is grouned, left open,
or pulled below VON = Vs - 2V Enabled if < (Vs - 2V) V
ISD Disable Supply Current (1) CLC1004; DIS pin is pulled to VS 0.4 0.8 mA
CLC3004; DIS pin is pulled to VS 0.4 0.9 mA
Input Characteristics
RIN Input Resistance Non-inverting 4.5 MΩ
CIN Input Capacitance 1.0 pF
CMIR Common Mode Input Range ±3.2 V
CMRR Common Mode Rejection Ratio (1) DC 40 60 dB
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 8
Electrical Characteristics at ±5V continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
Output Characteristics
ROOutput Resistance Closed Loop, DC 0.1 Ω
VOUT Output Voltage Swing RL = 150Ω (1) ±3.0 ±3.8 V
IOUT Output Current ±220 mA
Notes:
1. 100% tested at 25°C
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 9
Typical Performance Characteristics
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
Frequency Response vs. VOUT Frequency Response vs. Temperature
Frequency Response vs. CLFrequency Response vs. RL
Non-Inverting Frequency Response Inverting Frequency Response
-9
-6
-3
0
3
6
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
G = 2
G = 5
G = 10
V
OUT
= 0.2V
pp
-7
-6
-5
-4
-3
-2
-1
0
1
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
G = -1
G = -2
G = -5
G = -10
V
OUT
= 0.2V
pp
-7
-6
-5
-4
-3
-2
-1
0
1
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
C
L
= 1000pF
R
s
= 3.3Ω
C
L
= 500pF
R
s
= 5Ω
C
L
= 100pF
R
s
= 10Ω
C
L
= 50pF
R
s
= 15Ω
C
L
= 20pF
R
s
= 20Ω
V
OUT
= 0.2V
pp
-6
-5
-4
-3
-2
-1
0
1
2
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
R
L
= 500Ω
V
OUT
= 0.2V
pp
R
L
= 1kΩ
R
L
= 100Ω
R
L
= 50Ω
R
L
= 25Ω
-9
-6
-3
0
3
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
V
OUT
= 1V
pp
V
OUT
= 2V
pp
V
OUT
= 4V
pp
-7
-6
-5
-4
-3
-2
-1
0
1
2
0.1 1 10 100 1000 10000
Normalized Gain (dB)
Frequency (MHz)
+ 85degC
- 40degC
+ 25degC
V
OUT
= 0.2V
pp
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 10
Typical Performance Characteristics
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
Frequency Response vs. VOUT at VS = 5V Frequency Response vs. Temperature at VS = 5V
Frequency Response vs. CL at VS = 5V Frequency Response vs. RL at VS = 5V
Non-Inverting Frequency Response at VS = 5V Inverting Frequency Response at VS = 5V
-9
-6
-3
0
3
6
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
G = 2
G = 5
G = 10
V
OUT
= 0.2V
pp
-7
-6
-5
-4
-3
-2
-1
0
1
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
G = -1
G = -2
G = -5
G = -10
V
OUT
= 0.2V
pp
-7
-6
-5
-4
-3
-2
-1
0
1
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
C
L
= 1000pF
R
s
= 3.3Ω
C
L
= 500pF
R
s
= 5Ω
C
L
= 100pF
R
s
= 10Ω
C
L
= 50pF
R
s
= 15Ω
C
L
= 20pF
R
s
= 20Ω
V
OUT
= 0.2V
pp
-6
-5
-4
-3
-2
-1
0
1
2
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
R
L
= 500Ω
V
OUT
= 0.2V
pp
R
L
= 1kΩ
R
L
= 100Ω
R
L
= 50Ω
R
L
= 25Ω
-9
-6
-3
0
3
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
V
OUT
= 1V
pp
V
OUT
= 2V
pp
V
OUT
= 2.5V
pp
-7
-6
-5
-4
-3
-2
-1
0
1
2
0.1 1 10 100 1000 10000
Normalized Gain (dB)
Frequency (MHz)
+ 85degC
- 40degC
+ 25degC
V
OUT
= .2V
pp
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 11
Typical Performance Characteristics - Continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
Closed Loop Output Impedance vs. Frequency Input Voltage Noise
-3dB Bandwidth vs. VOUT -3dB Bandwidth vs. VOUT at VS = 5V
Gain Flatness Gain Flatness at VS = 5V
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
0.1 1 10 100
Normalized Gain (dB)
Frequency (MHz)
V
OUT
= 2V
pp
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.1 1 10 100 1000
Normalized Gain (dB)
Frequency (MHz)
V
OUT
= 2V
pp
150
250
350
450
550
650
750
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
-3dB Bandwidth (MHz)
VOUT (VPP)
100
200
300
400
500
600
0.0 0.5 1.0 1.5 2.0 2.5
-3dB Bandwidth (MHz)
VOUT (VPP)
Output Resistance (Ω)
Frequency (Hz)
10k 100k 1M 10M 100M 1G
0.01
0.1
1
10
VS = ±5.0V
Input Voltage Noise (nV/√Hz)
Frequency (MHz)
0.0001 0.001 0.01 0.1 1 10
0
5
10
15
20
25
30
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 12
Typical Performance Characteristics - Continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
CMRR vs. Frequency PSRR vs. Frequency
2nd Harmonic Distortion vs. VOUT 3rd Harmonic Distortion vs. VOUT
2nd Harmonic Distortion vs. RL 3rd Harmonic Distortion vs. RL
-100
-90
-80
-70
-60
-50
-40
0 5 10 15 20
Distortion (dBc)
Frequency (MHz)
R
L
= 150Ω
V
OUT
= 2V
pp
R
L
= 499Ω
-100
-90
-80
-70
-60
-50
0 5 10 15 20
Distortion (dBc)
Frequency (MHz)
R
L
= 150Ω
V
OUT
= 2V
pp
R
L
= 499Ω
-100
-90
-80
-70
-60
0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5
Distortion (dBc)
Output Amplitude (Vpp)
10MHz
5MHz
1MHz
-100
-90
-80
-70
0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5
Distortion (dBc)
Output Amplitude (Vpp)
10MHz
5MHz
1MHz
CMRR (dB)
Frequency (Hz)
10k 100k 1M 10M 100M
-55
-50
-45
-40
-35
-30
-25
-20
VS = ±5.0V
PSRR (dB)
Frequency (MHz)
0.01 0.1 1 10 100
-70
-60
-50
-40
-30
-20
-10
0
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 13
Typical Performance Characteristics - Continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
Differential Gain & Phase AC Coupled Output Differential Gain & Phase DC Coupled Output
Large Signal Pulse Response Large Signal Pulse Response at VS = 5V
Small Signal Pulse Response Small Signal Pulse Response at VS = 5V
-0.150
-0.100
-0.050
0.000
0.050
0.100
0.150
0 20 40 60 80 100
Voltage (V)
Time (ns)
2.35
2.40
2.45
2.50
2.55
2.60
2.65
0 20 40 60 80 100
Voltage (V)
Time (ns)
-3
-2
-1
0
1
2
3
0 20 40 60 80 100
Voltage (V)
Time (ns)
1
1.5
2
2.5
3
3.5
4
0 20 40 60 80 100
Voltage (V)
Time (ns)
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
-0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7
Diff Gain (%) and Diff Phase (°)
Input Voltage (V)
DG
R
L
= 150Ω
AC coupled
DP
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
-0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7
Diff Gain (%) and Diff Phase (°)
Input Voltage (V)
DG
R
L
= 150Ω
DC coupled
DP
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 14
Typical Performance Characteristics - Continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
Differential Gain & Phase AC Coupled Output at VS = ±2.5V Differential Gain & Phase DC Coupled at VS = ±2.5V
-0.2
-0.15
-0.1
-0.05
0
0.05
0.1
-0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4
Diff Gain (%) and Diff Phase (°)
Input Voltage (V)
DG
R
L
= 150Ω
AC coupled
DP
-0.3
-0.25
-0.2
-0.15
-0.1
-0.05
0
0.05
0.1
-0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4
Diff Gain (%) and Diff Phase (°)
Input Voltage (V)
DG
R
L
= 150Ω
DC coupled
DP
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 15
Application Information
Basic Operation
Figures 1 and 2 illustrate typical circuit congurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
+
-
Rf
0.1μF
6.8μF
Output
G = 1 + (Rf/Rg)
Input
+Vs
-Vs
Rg
0.1μF
6.8μF
RL
Figure 1. Typical Non-Inverting Gain Circuit
Figure 2. Typical Inverting Gain Circuit
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 1000 ohm load condition. However, ap-
plications with low impedance, DC coupled loads should
be analyzed to ensure that maximum allowed junction
temperature is not exceeded. Guidelines listed below can
be used to verify that the particular application will not
cause the device to operate beyond it’s intended operat-
ing range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction tem-
perature, the package thermal resistance value ThetaJA
(ӨJA) is used along with the total die power dissipation.
TJunction = TAmbient + (ӨJA × PD)
Where TAmbient is the temperature of the working environment.
In order to determine PD, the power dissipated in the load
needs to be subtracted from the total power delivered by
the supplies.
PD = Psupply - Pload
Supply power is calculated by the standard power equa-
tion.
Psupply = Vsupply × IRMS supply
Vsupply = VS+ - VS-
Power delivered to a purely resistive load is:
Pload = ((VLOAD)RMS2)/Rloadeff
The effective load resistor (Rloadeff) will need to include
the effect of the feedback network. For instance,
Rloadeff in gure 3 would be calculated as:
RL || (Rf + Rg)
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, PD can be found from
PD = PQuiescent + PDynamic - PLoad
Quiescent power can be derived from the specied IS val-
ues along with known supply voltage, VSupply. Load power
can be calculated as above with the desired signal ampli-
tudes using:
(VLOAD)RMS = VPEAK / √2
( ILOAD)RMS = ( VLOAD)RMS / Rloadeff
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS
Assuming the load is referenced in the middle of the pow-
er rails or Vsupply/2.
Figure 3 shows the maximum safe power dissipation in
the package vs. the ambient temperature for the pack-
ages available.
+
-
Rf
0.1μF
6.8μF
Output
G = - (Rf/Rg)
For optimum input offset
voltage set R1 = Rf || Rg
Input
+Vs
-Vs
0.1μF
6.8μF
RL
Rg
R1
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 16
0
0.5
1
1.5
2
2.5
-40 -20 0 20 40 60 80
Maximum Power Dissipation (W)
Ambient Temperature (°C)
SOT23-6
SOT23-5
SOIC-16
Figure 3. Maximum Power Derating
Driving Capacitive Loads
Increased phase delay at the output due to capacitive load-
ing can cause ringing, peaking in the frequency response,
and possible unstable behavior. Use a series resistance,
RS, between the amplier and the load to help improve
stability and settling performance. Refer to Figure 4.
+
-
Rf
Input
Output
Rg
Rs
CLRL
Figure 4. Addition of RS for Driving
Capacitive Loads
Table 1 provides the recommended RS for various capaci-
tive loads. The recommended RS values result in <=1dB
peaking in the frequency response. The Frequency Re-
sponse vs. CL plots, on page 7, illustrates the response of
the CLCx004.
CL (pF) RS (Ω) -3dB BW (MHz)
20 20 400
50 15 270
100 10 195
500 5 80
1000 3.3 58
Table 1: Recommended RS vs. CL
For a given load capacitance, adjust RS to optimize the
tradeoff between settling time and bandwidth. In general,
reducing RS will increase bandwidth at the expense of ad-
ditional overshoot and ringing.
Overdrive Recovery
An overdrive condition is dened as the point when ei-
ther one of the inputs or the output exceed their specied
voltage range. Overdrive recovery is the time needed for
the amplier to return to its normal or linear operating
point. The recovery time varies, based on whether the
input or output is overdriven and by how much the range
is exceeded. The CLCx004 will typically recover in less
than 20ns from an overdrive condition. Figure 5 shows the
CLC1004 in an overdriven condition.
Figure 5. Overdrive Recovery
Layout Considerations
General layout and supply bypassing play major roles
in high frequency performance. CaDeKa has evaluation
boards to use as a guide for high frequency layout and as
aid in device testing and characterization. Follow the steps
below as a basis for high frequency layout:
• Include 6.8µF and 0.1µF ceramic capacitors for power
supply decoupling
• Place the 6.8µF capacitor within 0.75 inches of the power pin
• Place the 0.1µF capacitor within 0.1 inches of the power pin
• Remove the ground plane under and around the part,
especially near the input and output pins to reduce para-
sitic capacitance
• Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts below for more in-
formation.
-3
-2
-1
0
1
2
3
-3
-2
-1
0
1
2
3
0 20 40 60 80 100 120 140 160 180 200
Output Voltage (V)
Input Voltage (V)
Time (ns)
Output
Input
VIN = 2.5Vpp
G = 5
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 17
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
Evaluation Board # Products
CEB002 CLC1004, CLC1014
CEB012 CLC3004
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in Fig-
ures 9-14. These evaluation boards are built for dual- sup-
ply operation. Follow these steps to use the board in a
single-supply application:
1. Short -Vs to ground.
2. Use C3 and C4, if the -VS pin of the amplier is not
directly connected to the ground plane.
Figure 9. CEB002 Schematic
Figure 10. CEB002 Top View
Figure 11. CEB002 Bottom View
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 18
ROUT1RF1
RIN1
RG1
IN1
OUT1
Board Mounting Holes
ROUT3RF3
RIN3
RG3
IN3
OUT3
ROUT2RF2
RIN2
RG2
IN2
OUT2
DIS
14
14
14
15
1
2
12
4
5
3,6,9
16,13,11
10
7
8
Figure 12. CEB012 Schematic
Figure 13. CEB012 Top View
Figure 14. CEB012 Bottom View
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
©2007-2010 CADEKA Microcircuits LLC www.cadeka.com 19
Mechanical Dimensions
SOT23-5 Package
SOT23-6 Package
For additional information regarding our products, please visit CADEKA at: cadeka.com
CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of
CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies.
CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any
responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in
writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights,
copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties.
Copyright ©2007-2010 by CADEKA Microcircuits LLC. All rights reserved.
CADEKA Headquarters Loveland, Colorado
T: 970.663.5452
T: 877.663.5452 (toll free)
Data Sheet
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Ampliers with Disable Rev 1B
Mechanical Dimensions
SOIC-16 Package
