ESURGENT Data Sheet S E M I C O N D U C T O R Comlinear CLC1004, CLC1014, CLC3004 (R) General Description FEATURES n 0.1dB gain flatness to 200MHz n 0.02%/0.01 differential gain/phase n 750MHz -3dB bandwidth at G = 2 n 350MHz large signal bandwidth n 1,400V/s slew rate n 4nV/Hz input voltage noise n 100mA output current n 20ns enable time n Stable for gains of 2V/V or larger n Fully specified at 5V and 5V supplies n CLC1004: Pb-free TSOT23-6 n CLC1014: Pb-free TSOT23-5 n CLC3004: Pb-free SOIC-16 The COMLINEAR CLC1004 (single with disable), CLC1014 (single), and CLC3004 (triple with disable) are high-performance, voltage feedback amplifiers that provide 750MHz gain of 2 bandwidth, 0.1dB gain flatness to 200MHz, and 1,400V/s slew rate. This high performance exceeds the requirements of high-definition television (HDTV) and other multimedia applications. These COMLINEAR high-performance amplifiers also provide ample output current to drive multiple video loads. The COMLINEAR CLC1004, CLC1014, and CLC3004 are designed to operate from 5V or +5V supplies. The CLC1004 and CLC3004 offer a fast enable/ disable feature to save power. While disabled, the outputs are in a highimpedance state to allow for multiplexing applications. The combination of high-speed, low-power, and excellent video performance make these amplifiers well suited for use in many general purpose, high-speed applications including video line driving and imaging applications. APPLICATIONS n RGB video line drivers n High definition video driver n Video switchers and routers n ADC buffer n Active filters n Cable drivers n Imaging applications n Radar/communication receivers Typical Application - Driving Multiple Video Loads +Vs 75 Cable Input 75 75 Cable Output A 75 75 Rf Rg 75 75 Cable Output B 75 -Vs Ordering Information Package Pb-Free RoHS Compliant Operating Temperature Range Packaging Method CLC1004IST6X* TSOT-6 Yes Yes -40C to +85C Reel CLC1014IST5X TSOT-5 Yes Yes -40C to +85C Reel CLC3004ISO16X* SOIC-16 Yes Yes -40C to +85C Reel Rev 1C.R Part Number Moisture sensitivity level for all parts is MSL-1. *Contact Resurgent Semiconductor for availability. (c) 2018 Resurgent Semiconductor, LLC 1 / 20 Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable Single and Triple, 750MHz Amplifiers with Disable Rev 1C.R Data Sheet CLC1004 Pin Configuration 1 -V S 2 +IN 3 + - 6 +VS 5 DIS 4 -IN CLC3004 Pin Configuration Pin No. Pin Name Description 1 OUT Output 2 -VS Negative supply 3 +IN Positive input 4 -IN Negative input 5 DIS Disable pin. Enabled if pin is grounded, left floating or pulled below VON, disabled if pin is pulled above VOFF. 6 +VS Positive supply CLC3004 Pin Configuration Pin No. Pin Name 1 -IN1 Description Negative input, channel 1 Positive input, channel 1 -IN1 1 16 +VS 2 +IN1 +IN1 2 15 OUT1 3 -VS Negative supply -VS 3 14 DIS 4 -IN2 Negative input, channel 2 -IN2 4 13 +VS 5 +IN2 Positive input, channel 2 6 5 12 OUT2 -VS Negative supply +IN2 7 -IN3 Negative input, channel 3 -VS 6 11 +VS 8 +IN3 Positive input, channel 3 -IN3 7 10 OUT3 9 -VS +IN3 8 9 -VS 10 OUT3 Negative supply Output, channel 3 11 +VS 12 OUT2 Positive supply 13 +VS Positive supply 14 DIS Disable pin. Enabled if pin is grounded, left floating or pulled below VON, disabled if pin is pulled above VOFF. 15 OUT1 16 +VS Output, channel 2 Output, channel 1 Positive supply Disable Pin Truth Table Pin High Low* DIS Disabled Enabled *Default Open State Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable OUT CLC1004 Pin Assignments Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 2 / 20 Rev 1C.R Data Sheet CLC1014 Pin Configuration 1 -V S 2 +IN 3 5 + +VS 4 -IN Pin No. Pin Name Description 1 OUT Output 2 -VS Negative supply 3 +IN Positive input 4 -IN Negative input 5 +VS Positive supply Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable OUT CLC1014 Pin Assignments Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 3 / 20 Rev 1C.R Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the "Absolute Maximum Ratings". The device should not be operated at these "absolute" limits. Adhere to the "Recommended Operating Conditions" for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. Supply Voltage Input Voltage Range Continuous Output Current Min Max Unit 0 -Vs -0.5V 14 +Vs +0.5V 100 V V mA Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable Parameter Reliability Information Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance 5-Lead TSOT23 6-Lead TSOT23 16-Lead SOIC Min Typ -65 Max Unit 150 150 260 C C C 215 192 68 C/W C/W C/W Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air. ESD Protection Product Human Body Model (HBM) Charged Device Model (CDM) TSOT23-5 TSOT23-6 SOIC-16 2kV 1kV 2kV 1kV 2kV 1kV Recommended Operating Conditions Parameter Min Operating Temperature Range Supply Voltage Range -40 4.5 Typ Max Unit +85 12 C V Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 4 / 20 Rev 1C.R Data Sheet Electrical Characteristics at +5V TA = 25C, Vs = +5V, Rf = Rg =150, RL = 150 to VS/2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response -3dB Bandwidth G = +2, VOUT = 0.2Vpp 600 MHz BWLS Large Signal Bandwidth G = +2, VOUT = 1Vpp 400 MHz BW0.1dBSS 0.1dB Gain Flatness G = +2, VOUT = 0.2Vpp 150 MHz BW0.1dBLS 0.1dB Gain Flatness G = +2, VOUT = 1Vpp 120 MHz Time Domain Response tR, tF Rise and Fall Time VOUT = 1V step; (10% to 90%) 1.2 ns tS Settling Time to 0.1% VOUT = 1V step 10 ns OS Overshoot VOUT = 0.2V step 2 % SR Slew Rate 1V step 750 V/s Distortion/Noise Response HD2 2nd Harmonic Distortion VOUT = 1Vpp, 5MHz -72 dBc HD3 3rd Harmonic Distortion VOUT = 1Vpp, 5MHz -85 dBc THD Total Harmonic Distortion VOUT = 1Vpp, 5MHz 70 dB DG Differential Gain NTSC (3.58MHz), AC-coupled, RL = 150 0.08 % DP Differential Phase NTSC (3.58MHz), AC-coupled, RL = 150 0.04 IP3 Third Order Intercept VOUT = 1Vpp, 10MHz 38 dBm SFDR Spurious Free Dynamic Range VOUT = 1Vpp, 5MHz 63 dBc en Input Voltage Noise > 1MHz 4 nV/Hz in Input Current Noise > 1MHz 4 pA/Hz XTALK Crosstalk Channel-to-channel 5MHz, VOUT = 1Vpp 70 dB DC Performance VIO Input Offset Voltage 0 mV dVIO Average Drift 4 V/C Ib Input Bias Current 3.2 A dIb Average Drift 20 nA/C dB PSRR Power Supply Rejection Ratio DC 56 AOL Open-Loop Gain VOUT = VS / 2 65 dB IS Supply Current per channel 11 mA ns Disable Characteristics TON Turn On Time 20 TOFF Turn Off Time 40 ns OFFIOS Off Isolation 5MHz -78 dB VOFF Power Down Input Voltage DIS pin, disabled if pin is pulled above VOFF = Vs - 2V Disabled if > (Vs - 2V) V VON Enable Input Voltage DIS pin, enabled if pin is grouned, left open, or pulled below VON = Vs - 4V Enabled if < (Vs - 4V) V ISD Disable Supply Current CLC1004; DIS pin is pulled to VS 0.4 mA CLC3004; DIS pin is pulled to VS 0.4 mA Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR Common Mode Input Range CMRR Common Mode Rejection Ratio Non-inverting DC 4.5 M 1.0 pF 1.5 to 3.5 V 50 dB Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable BWSS Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 5 / 20 Rev 1C.R Data Sheet Electrical Characteristics at +5V continued TA = 25C, Vs = +5V, Rf = Rg =150, RL = 150 to VS/2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Output Characteristics Output Resistance Closed Loop, DC VOUT Output Voltage Swing RL = 150 IOUT Output Current 0.1 1.5 to 3.5 V 100 mA Notes: 1. 100% tested at 25C Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable RO Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 6 / 20 Rev 1C.R Data Sheet Electrical Characteristics at 5V TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response -3dB Bandwidth G = +2, VOUT = 0.2Vpp 750 MHz BWLS Large Signal Bandwidth G = +2, VOUT = 2Vpp 350 MHz BW0.1dBSS 0.1dB Gain Flatness G = +2, VOUT = 0.2Vpp 200 MHz BW0.1dBLS 0.1dB Gain Flatness G = +2, VOUT = 2Vpp 120 MHz Time Domain Response tR, tF Rise and Fall Time VOUT = 2V step; (10% to 90%) 1.3 ns tS Settling Time to 0.1% VOUT = 2V step 10 ns OS Overshoot VOUT = 0.2V step SR Slew Rate 2V step 1.5 % 1400 V/s Distortion/Noise Response HD2 2nd Harmonic Distortion VOUT = 2Vpp, 5MHz -71 dBc HD3 3rd Harmonic Distortion VOUT = 2Vpp, 5MHz -82 dBc THD Total Harmonic Distortion VOUT = 2Vpp, 5MHz 70 dB DG Differential Gain NTSC (3.58MHz), AC-coupled, RL = 150 0.02 % DP Differential Phase NTSC (3.58MHz), AC-coupled, RL = 150 0.01 IP3 Third Order Intercept VOUT = 2Vpp, 10MHz 41 dBm SFDR Spurious Free Dynamic Range VOUT = 1Vpp, 5MHz 65 dBc en Input Voltage Noise > 1MHz 4 nV/Hz in Input Current Noise > 1MHz 4 pA/Hz XTALK Crosstalk Channel-to-channel 5MHz, VOUT = 2Vpp 70 dB DC Performance VIO dVIO Ib dIb Input Offset Voltage(1) -10 Average Drift 0 10 4 Input Bias Current (1) -20 Average Drift 40 3.2 mV V/C 20 A 20 nA/C 56 dB PSRR Power Supply Rejection Ratio (1) DC AOL Open-Loop Gain VOUT = VS / 2 70 IS Supply Current (1) per channel 12 dB 17 mA Disable Characteristics TON Turn On Time 20 TOFF Turn Off Time 40 ns ns OFFIOS Off Isolation 5MHz -78 dB VOFF Power Down Input Voltage DIS pin, disabled if pin is pulled above VOFF = Vs - 1V Disabled if > (Vs - 1V) V VON Enable Input Voltage DIS pin, enabled if pin is grouned, left open, or pulled below VON = Vs - 2V Enabled if < (Vs - 2V) V ISD Disable Supply Current (1) CLC1004; DIS pin is pulled to VS 0.4 0.8 mA CLC3004; DIS pin is pulled to VS 0.4 0.9 mA Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR Common Mode Input Range CMRR Common Mode Rejection Ratio (1) Non-inverting DC 40 4.5 M 1.0 pF 3.2 V 60 dB Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable BWSS Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 7 / 20 Rev 1C.R Data Sheet Electrical Characteristics at 5V continued TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Output Characteristics Output Resistance Closed Loop, DC VOUT Output Voltage Swing RL = 150 IOUT Output Current 0.1 3.0 (1) 3.8 V 220 mA Notes: 1. 100% tested at 25C Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable RO Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 8 / 20 Rev 1C.R Data Sheet Typical Performance Characteristics TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. Non-Inverting Frequency Response Inverting Frequency Response 3 G = -1 -1 Normalized Gain (dB) Normalized Gain (dB) 0 0 G=2 -3 G=5 G = -2 -3 G = -5 -4 G = -10 -5 G = 10 -6 -2 -6 VOUT = 0.2Vpp -9 VOUT = 0.2Vpp -7 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 1 2 0 1 CL = 1000pF Rs = 3.3 CL = 500pF Rs = 5 -2 -3 CL = 100pF Rs = 10 -4 CL = 50pF Rs = 15 -5 -6 100 1000 Frequency Response vs. RL Normalized Gain (dB) Normalized Gain (dB) Frequency Response vs. CL -1 10 Frequency (MHz) 0 -1 RL = 100 -2 RL = 50 -3 RL = 25 -4 -5 CL = 20pF Rs = 20 VOUT = 0.2Vpp RL = 1k RL = 500 -7 VOUT = 0.2Vpp -6 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 10 100 1000 Frequency (MHz) Frequency Response vs. VOUT Frequency Response vs. Temperature 3 2 0 0 Normalized Gain (dB) Normalized Gain (dB) 1 VOUT = 1Vpp VOUT = 2Vpp -3 VOUT = 4Vpp -6 -1 + 25degC -2 - 40degC -3 + 85degC -4 -5 VOUT = 0.2Vpp -6 -9 -7 0.1 1 10 100 1000 0.1 Frequency (MHz) 1 10 100 1000 10000 Frequency (MHz) Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable 1 6 Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 9 / 20 Rev 1C.R Data Sheet Typical Performance Characteristics TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. Non-Inverting Frequency Response at VS = 5V Inverting Frequency Response at VS = 5V 3 G = -1 -1 Normalized Gain (dB) Normalized Gain (dB) 0 0 G=2 -3 G=5 G = -2 -3 G = -5 -4 G = -10 -5 G = 10 -6 -2 -6 VOUT = 0.2Vpp -9 VOUT = 0.2Vpp -7 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 1 2 0 1 CL = 1000pF Rs = 3.3 CL = 500pF Rs = 5 -2 -3 CL = 100pF Rs = 10 -4 CL = 50pF Rs = 15 -5 -6 VOUT = 0.2Vpp 100 1000 Frequency Response vs. RL at VS = 5V Normalized Gain (dB) Normalized Gain (dB) Frequency Response vs. CL at VS = 5V -1 10 Frequency (MHz) RL = 1k RL = 500 0 -1 RL = 100 -2 RL = 50 -3 RL = 25 -4 -5 CL = 20pF Rs = 20 -7 VOUT = 0.2Vpp -6 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 10 100 1000 Frequency (MHz) Frequency Response vs. VOUT at VS = 5V Frequency Response vs. Temperature at VS = 5V 3 2 0 0 Normalized Gain (dB) Normalized Gain (dB) 1 VOUT = 1Vpp VOUT = 2Vpp -3 VOUT = 2.5Vpp -6 -1 + 25degC -2 - 40degC -3 + 85degC -4 -5 VOUT = .2Vpp -6 -9 -7 0.1 1 10 100 1000 0.1 Frequency (MHz) 1 10 100 1000 10000 Frequency (MHz) Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable 1 6 Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 10 / 20 Rev 1C.R Data Sheet Typical Performance Characteristics - Continued TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. Gain Flatness at VS = 5V 0.6 1 0.5 0.8 0.4 0.6 0.3 Normalized Gain (dB) 1.2 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 VOUT = 2Vpp VOUT = 2Vpp -0.5 -1.2 -0.6 0.1 1 10 100 0.1 1 Frequency (MHz) -3dB Bandwidth vs. VOUT 1000 600 650 -3dB Bandwidth (MHz) -3dB Bandwidth (MHz) 100 -3dB Bandwidth vs. VOUT at VS = 5V 750 550 450 350 500 400 300 200 250 150 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.5 VOUT (VPP) 1.0 1.5 2.0 2.5 VOUT (VPP) Closed Loop Output Impedance vs. Frequency Input Voltage Noise 10 30 Input Voltage Noise (nV/Hz) VS = 5.0V Output Resistance () 10 Frequency (MHz) 1 0.1 100k 1M 10M 100M 20 15 10 5 0 0.0001 0.01 10k 25 1G 0.001 0.01 0.1 1 10 Frequency (MHz) Frequency (Hz) Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable Normalized Gain (dB) Gain Flatness Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 11 / 20 Rev 1C.R Data Sheet Typical Performance Characteristics - Continued TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL 3rd Harmonic Distortion vs. RL -50 -50 -60 RL = 150 -60 Distortion (dBc) Distortion (dBc) RL = 150 -70 -80 -70 RL = 499 -80 RL = 499 -90 -90 VOUT = 2Vpp VOUT = 2Vpp -100 -100 0 5 10 15 20 0 5 10 Frequency (MHz) 2nd Harmonic Distortion vs. VOUT -70 10MHz 10MHz -70 Distortion (dBc) Distortion (dBc) 20 3rd Harmonic Distortion vs. VOUT -60 -80 5MHz 1MHz -80 -90 -90 1MHz -100 5MHz -100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 0.5 0.75 1 Output Amplitude (Vpp) 1.5 1.75 2 2.25 2.5 PSRR vs. Frequency -20 -25 1.25 Output Amplitude (Vpp) CMRR vs. Frequency 0 VS = 5.0V -10 -30 -20 PSRR (dB) CMRR (dB) 15 Frequency (MHz) -35 -40 -30 -40 -45 -50 -50 -60 -55 10k 100k Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable -40 1M 10M -70 0.01 100M 0.1 1 10 100 Frequency (MHz) Frequency (Hz) Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 12 / 20 Rev 1C.R Data Sheet Typical Performance Characteristics - Continued TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. Small Signal Pulse Response at VS = 5V 2.65 0.100 2.60 0.050 2.55 Voltage (V) 0.150 0.000 2.50 -0.050 2.45 -0.100 2.40 -0.150 2.35 0 20 40 60 80 100 0 20 40 Time (ns) 80 100 Large Signal Pulse Response at VS = 5V 3 4 2 3.5 1 3 Voltage (V) Voltage (V) Large Signal Pulse Response 0 2.5 -1 2 -2 1.5 -3 1 0 20 40 60 80 100 0 20 40 Time (ns) 0.02 0.03 Diff Gain (%) and Diff Phase () 0.04 0.01 DP 0 -0.01 DG -0.03 80 100 Differential Gain & Phase DC Coupled Output 0.03 -0.02 60 Time (ns) Differential Gain & Phase AC Coupled Output Diff Gain (%) and Diff Phase () 60 Time (ns) RL = 150 AC coupled -0.04 0.02 0.01 DP 0 -0.01 DG -0.02 -0.03 RL = 150 DC coupled -0.04 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 -0.7 Input Voltage (V) -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 Input Voltage (V) Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable Voltage (V) Small Signal Pulse Response Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 13 / 20 Rev 1C.R Data Sheet Typical Performance Characteristics - Continued TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. Differential Gain & Phase AC Coupled Output at VS = 2.5V Differential Gain & Phase DC Coupled at VS = 2.5V 0.05 0 Diff Gain (%) and Diff Phase () Diff Gain (%) and Diff Phase () 0.1 DP -0.05 -0.1 DG -0.15 RL = 150 AC coupled -0.2 0.05 DP 0 -0.05 -0.1 DG -0.15 -0.2 -0.25 RL = 150 DC coupled -0.3 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 -0.4 Input Voltage (V) -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 Input Voltage (V) Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable 0.1 Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 14 / 20 Rev 1C.R Data Sheet Application Information perature, the package thermal resistance value ThetaJA (JA) is used along with the total die power dissipation. Basic Operation +Vs Input 6.8F Output RL 0.1F Rf 6.8F Figure 1. Typical Non-Inverting Gain Circuit R1 Input Rg Pload = ((VLOAD)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, RL || (Rf + Rg) 6.8F Output 0.1F 6.8F -Vs Vsupply = VS+ - VS- Rloadeff in figure 3 would be calculated as: 0.1F + Psupply = Vsupply x IRMS supply Power delivered to a purely resistive load is: G = 1 + (Rf/Rg) -Vs +Vs In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. Supply power is calculated by the standard power equation. - Rg Where TAmbient is the temperature of the working environment. PD = Psupply - Pload 0.1F + TJunction = TAmbient + (JA x PD) RL Rf These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg Figure 2. Typical Inverting Gain Circuit Power Dissipation Power dissipation should not be a factor when operating under the stated 1000 ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it's intended operating range. (c) 2018 Resurgent Semiconductor, LLC (VLOAD)RMS = VPEAK / 2 ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS x ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. 15 / 20 Rev 1C.R Rev 1C.R Maximum power levels are set by the absolute maximum junction rating of 150C. To calculate the junction tem- Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable Figures 1 and 2 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. Data Sheet reducing RS will increase bandwidth at the expense of additional overshoot and ringing. SOIC-16 2 Overdrive Recovery 1.5 SOT23-6 1 0.5 SOT23-5 0 -40 -20 0 20 40 60 80 Ambient Temperature (C) Figure 3. Maximum Power Derating An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLCx004 will typically recover in less than 20ns from an overdrive condition. Figure 5 shows the CLC1004 in an overdriven condition. 3 Driving Capacitive Loads 2 + Rs - Input Voltage (V) Input 1 1 0 0 Output -1 -1 -2 -2 -3 Output CL Rf 2 -3 0 RL Output Voltage (V) Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 4. Input 3 VIN = 2.5Vpp G=5 20 40 60 80 100 120 140 160 180 200 Time (ns) Figure 5. Overdrive Recovery Rg Figure 4. Addition of RS for Driving Capacitive Loads Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in <=1dB peaking in the frequency response. The Frequency Response vs. CL plots, on page 7, illustrates the response of the CLCx004. CL (pF) RS () -3dB BW (MHz) 20 20 400 Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Resurgent has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: * Include 6.8F and 0.1F ceramic capacitors for power supply decoupling * Place the 6.8F capacitor within 0.75 inches of the power pin 50 15 270 * Place the 0.1F capacitor within 0.1 inches of the power pin 100 10 195 500 5 80 1000 3.3 58 * Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, (c) 2018 Resurgent Semiconductor, LLC * Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. 16 / 20 Rev 1C.R Rev 1C.R Table 1: Recommended RS vs. CL Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable Maximum Power Dissipation (W) 2.5 Data Sheet Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Products Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable Evaluation Board # CEB002 CEB012 CLC1004, CLC1014 CLC3004 Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 9-14. These evaluation boards are built for dual- supply operation. Follow these steps to use the board in a single-supply application: Figure 10. CEB002 Top View 1. Short -Vs to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane. Figure 11. CEB002 Bottom View Figure 9. CEB002 Schematic Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 17 / 20 Rev 1C.R Data Sheet DIS 2 IN1 14 15 1 RIN1 RF1 ROUT1 OUT1 Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable RG1 5 IN2 14 12 4 RIN2 RF2 16,13,11 ROUT2 OUT2 3,6,9 RG2 8 IN3 14 10 7 RIN3 RF3 ROUT3 Figure 14. CEB012 Bottom View OUT3 RG3 Board Mounting Holes Figure 12. CEB012 Schematic Figure 13. CEB012 Top View Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 18 / 20 Rev 1C.R Data Sheet Mechanical Dimensions TSOT23-5 Package Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable TSOT23-6 Package Rev 1C.R (c) 2018 Resurgent Semiconductor, LLC 19 / 20 Rev 1C.R Data Sheet Mechanical Dimensions SOIC-16 Package Revision 1C.R Date July 2018 Description Updated to Resurgent Semiconductor. For Further Assistance: ESURGENT S E M I C O N D U C T O R www.resurgentsemi.net NOTICE Resurgent Semiconductor reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. Resurgent Semiconductor assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. Reproduction, in part or whole, without the prior written consent of Resurgent Semiconductor is prohibited. (c) 2018 Resurgent Semiconductor, LLC 20 / 20 Rev 1C.R Rev 1C.R Resurgent Semiconductor does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Resurgent Semiconductor receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of Resurgent Semiconductor is adequately protected under the circumstances. Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable Revision History