Type Package Type Package
TLE 4263 GS PG-DSO-8-16 TLE 4263 GM PG-DSO-14-30
TLE 4263 G PG-DSO-20-35
5-V Low Drop Voltage Regulator
TLE 4263
^
P-DSO-14-3, -8, -9, -11, 14
P-DSO-20-1, -6, -7, -9, -14, -15, -17,
-
P/PG-DSO-8-3, -6, -7, -8, -9,
Data Sheet 1 Rev. 2.8, 2007-03-20
Features
• Output voltage tolerance ≤ ±2%
• 200 mA output current capability
• Low-drop voltage
• Very low standby current consumption
• Overtemperature protection
• Reverse polarity protection
• Short-circuit proof
• Adjustable reset threshold
• Watchdog
• Wide temperature range
• Suitable for use in automotive electronics
• Green Product (RoHS compliant)
• AEC Qualified
Functional Description
TLE 4263 is a 5-V low drop voltage regulator in a SMD
package PG-DSO-14-30, PG-DSO-20-35, or
PG-DSO-8-16. The maximum input voltage is 45 V. The
maximum output current is more than 200 mA. The IC is
short-circuit proof and incorporates temperature
protection which turns off the IC at overtemperature.
The IC regulates an input voltage
V
I
in the range of 6 V <
V
I
< 45 V to
V
Q,nom
= 5.0 V. A reset signal is generated for
an output voltage of
V
Q,rt
< 4.5 V. This voltage threshold
can be decreased to 3.5 V by external connection of a
voltage divider. The reset delay can be set externally by a capacitor. The integrated
watchdog logic supervises the connected microcontroller. The IC can be switched off via
the inhibit input, which causes the current consumption to drop from 900
µ
A to typical 0
µ
A.
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Data Sheet 2 Rev. 2.8, 2007-03-20
TLE 4263
Choosing External Components
The input capacitor CI is necessary for compensation of line influences. Using a resistor
of approx. 1 Ω in series with CI, the oscillating circuit consisting of input inductivity and
input capacitance can be damped. The output capacitor is necessary for the stability of
the regulating circuit. Stability is guaranteed at values ≥22 µF and an ESR of ≤3Ω
within the operating temperature range. For small tolerances of the reset delay the
spread of the capacitance of the delay capacitor and its temperature coefficient should
be noted.
Figure 1 Pin Configuration (top view)
10
9
I
1
2
3
4
5
6
7
14
13
12
11
AEP03067
8
GND
GND
GND
W
N.C.
GND
GND
GND
D
RADJ
RO
Q
INH
TLE 4263 GM TLE 4263 GSTLE 4263 G
D
RADJ
W
GND 5
6
7
RO
8
4
3
2
1
AEP01668_4263
Q
INH
I
1
4
3
2
5
6
7
8
9
10
20
17
18
19
16
15
14
13
12
11
INH
GND
V
I
N.C.
GND
GND
GND
N.C.
V
Q
W
N.C.
GND
RO
N.C.
GND
GND
GND
N.C.
D
RADJ
AEP01099_4263
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TLE 4263
Data Sheet 3 Rev. 2.8, 2007-03-20
Table 1 Pin Definitions and Functions
Pin
PG-DSO-14
-30
Pin
PG-DSO-20-
35
Pin
PG-DSO-8
-16
Symbol Function
13 3ROReset output; open-collector
output connected to the output via
a resistor of 30 kΩ.
2 1, 2, 19, 13 – N.C. Not connected
3 - 5, 10 - 12 4-7, 14-17 4 GND Ground
69 5DReset delay; connected to
ground with a capacitor.
7 10 6 RADJ Reset threshold; to adjust the
switching threshold connect a
voltage divider (output to GND) to
the pin. If this input is connected
to GND, reset is triggered at an
output voltage of 4.5 V.
8117WWatchdog; rising edge triggered
input for monitoring a
microcontroller.
9128Q5-V output voltage; block to
ground with a capacitor,
C≥22 µF, ESR ≤3Ω at 10 kHz
13 18 1 I Input voltage; block to ground
directly at the IC with a ceramic
capacitor.
14 20 2 INH Inhibit; TTL-compatible,
low-active input.
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Data Sheet 4 Rev. 2.8, 2007-03-20
TLE 4263
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of the series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturation of the power element. If the externally scaled down
output voltage at the reset threshold input drops below 1.35 V, the external reset delay
capacitor is discharged by the reset generator. When the voltage of the capacitor
reaches the lower threshold VDRL, a reset signal occurs at the reset output and is held
until the upper threshold VDU is exceeded. If the reset threshold input is connected to
GND, reset is triggered at an output voltage of typ. 4.65 V. A connected microcontroller
will be monitored through the watchdog logic. In case of missing pulses at pin W, the
reset output is set to low. The pulse sequence time can be set in a wide range with the
reset delay capacitor. The IC can be switched at the TTL-compatible, low-active inhibit
input. The IC also incorporates a number of internal circuits for protection against:
• Overload
• Overtemperature
• Reverse polarity
Figure 2 Block Diagram
Input
AEB03068
INH
GND
Output
D
RO
RADJ
Reset
Delay
Reset
Output
Reset
Threshold
Watchdog
W
Temperature
Sensor
Generator
Reset
Reference
Bandgap
Adjustment
Buffer
Control
Amplifier
Saturation
Control and
Protection
Circuit
Inhibit
ΙQ
GND
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TLE 4263
Data Sheet 5 Rev. 2.8, 2007-03-20
Table 2 Absolute Maximum Ratings
Parameter Symbol Limit Values Unit Remarks
Min. Max.
Input I
Input voltage
Input current
VI
II
-42
–
45
–
V
–
–
internally limited
Reset Output RO
Voltage
Current
VR
IR
-0.3
–
42
–
V
–
–
internally limited
Reset Threshold RADJ
Voltage VRADJ -0.3 6 V –
Reset Delay D
Voltage
Current
VD
ID
-0.3
–
42
–
V
–
–
internally limited
Output Q
Voltage
Current
VQ
IQ
-0.3
–
7
–
V
–
–
internally limited
Inhibit INH
Voltage VINH -42 45 V –
Watchdog W
Voltage VW-0.3 6 V –
Ground GND
Current IGND -0.5 – A –
Temperature
Junction temperature
Storage temperature
Tj
Tstg
–
-50
150
150 °C
°C
–
–
Operating Range
Input voltage VI–45V–
Junction temperature Tj-40 150 °C–
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Data Sheet 6 Rev. 2.8, 2007-03-20
TLE 4263
Thermal Resistance
Junction-ambient Rthj-a –
–
–
–
112
92
185
164
K/W
K/W
K/W
K/W
PG-DSO-14-301);
Footprint only
PG-DSO-14-301);
300 mm2 Heat sink
PG-DSO-8-161);
Footprint only
PG-DSO-8-161);
300 mm2 Heat sink
Junction-pin Rthj-p – 32 K/W PG-DSO-14-302)
1) Worst case; package mounted on PCB 80 × 80 × 1.5 mm3; 35µ Cu; 5µ Sn; zero airflow.
2) Measured to pin 4.
Table 2 Absolute Maximum Ratings (cont’d)
Parameter Symbol Limit Values Unit Remarks
Min. Max.
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TLE 4263
Data Sheet 7 Rev. 2.8, 2007-03-20
Table 3 Characteristics
VI = 13.5 V; -40 °C < Tj < 125 °C; VINH > 3.5 V; (unless specified otherwise)
Parameter Symbol Limit Values Unit Test Condition
Min. Typ. Max.
Normal Operation
Output voltage VQ4.90 5.00 5.10 V 5 mA ≤ IQ ≤ 150 mA;
6 V ≤ VI ≤ 28 V
Output voltage VQ4.90 5.00 5.10 V 6 V ≤ VI ≤ 32 V;
IQ = 100 mA;
Tj = 100 °C
Output current IQ200 250 400 mA 1)
Current consumption;
Iq = II - IQ
Iq
Iq
Iq
Iq
–
–
–
–
0
900
10
15
50
1300
18
23
µA
µA
mA
mA
VINH = 0
IQ = 0 mA
IQ = 150 mA
IQ = 150 mA; VI = 4.5 V
Drop voltage Vdr – 0.350.50V IQ = 150 mA1)
Load regulation ∆VQ,lo ––25mVIQ = 5 mA to 150 mA
Line regulation ∆VQ.li –325mVVI = 6 V to 28 V;
IQ = 150 mA
Power Supply Ripple
Rejection
PSRR –54–dBfr = 100 Hz;
Vr = 0.5 Vpp
Reset Generator
Switching threshold VQ,rt 4.5 4.65 4.8 V VRADJ = 0 V
Reset adjust
threshold
VRADJ,th 1.26 1.35 1.44 V VQ > 3.5 V
Reset low voltage VRO,l – 0.100.40V IRO = 1 mA
Saturation voltage VD,sat – 50 100 mV VQ < VR,th
Upper timing
threshold
VDU 1.45 1.70 2.05 V –
Lower reset timing
threshold
VDRL 0.20 0.35 0.55 V –
Charge current ID,ch 40 60 85 µA–
Reset delay time trd 1.3 2.8 4.1 ms CD = 100 nF
Reset reaction time trr 0.5 1.2 4 µsCD = 100 nF
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Data Sheet 8 Rev. 2.8, 2007-03-20
TLE 4263
Note: The reset output is low within the range VQ = 1 V to VQ,rt.
Watchdog
Discharge current ID,wd 4.40 6.25 9.10 µAVD = 1.0 V
Upper timing
threshold
VDU 1.45 1.70 2.05 V –
Lower timing
threshold
VDWL 0.20 0.35 0.55 V –
Watchdog trigger time TWI,tr 16 22.5 27 ms CD = 100 nF
Inhibit
Switching voltage VINH,ON 3.6 – – V IC turned on
Turn-OFF voltage VINH,OFF – – 0.8 V IC turned off
Input current IINH 51025µAVINH = 5 V
1) Drop voltage = Vi - VQ (measured when the output voltage has dropped 100 mV from the nominal value
obtained at 6 V input).
Table 3 Characteristics (cont’d)
VI = 13.5 V; -40 °C < Tj < 125 °C; VINH > 3.5 V; (unless specified otherwise)
Parameter Symbol Limit Values Unit Test Condition
Min. Typ. Max.
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TLE 4263
Data Sheet 9 Rev. 2.8, 2007-03-20
Figure 3 Application Circuit
Figure 4 Test Circuit
AES03069
22 Fµ
GND
D
RO
470 nF INH
100 nF
Output
KL 15
To MC
Input
Reset
TLE 4263G
W
Watchdog
from MC
ΙQ
RADJ
6 V...45 V 100 kΩ
56 kΩ
AES03070_4263
22 F
Ι
Q
Ι
RD
V
RADJ
Ω5.6 k
D
ROINH
E
Ι
1000 F 470 nF
Ι
Ι
V
ED
C
V
C
GND
Ι
D, ch
Ι
V
RO
Q
V
V
Ι
TLE 4263G
µ µ
GND
W
V
W RADJ
100 nF
ΙQ
V
r
+
PSRR = 20 log
V
r
Q, r
V
∆
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Data Sheet 10 Rev. 2.8, 2007-03-20
TLE 4263
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
CD which can be calculated as follows:
CD = (trd × ID,ch)/∆V(1)
Definitions:
•CD = delay capacitor
•trd = reset delay time
•ID,ch = charge current, typical 60 µA
•∆V = VDU, typical 1.70 V
•VDU = upper delay switching threshold at CD for reset delay time
Figure 5 Time Response, Watchdog with High-Frequency Clock
AET03066
I
V
V
Q
Q, rt
V
V
D
DU
V
V
DRL
RO
V
rd
t trr
<
rr
t
V
d
t
d=
D, ch
I
D
C
Power-ON
Reset Over-
temperature at Input
Voltage Drop Under-
voltage Spike
Secondary Bounce
Load
t
t
t
t
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TLE 4263
Data Sheet 11 Rev. 2.8, 2007-03-20
Reset Switching Threshold
The present default value is typ. 4.65 V. When using the TLE 4263 the reset threshold
can be set to 3.5 V < VQ,rt < 4.6 V by connecting an external voltage divider to pin RADJ.
The calculation can be easily done since the reset adjust input current can be neglected.
If this feature is not needed, the pin has to be connected to GND.
VQ,rt = (1 + R1/R2) × VRADJ,th (2)
Definitions:
•VQ,rt = reset threshold
•VRADJ,th = comparator reference voltage, typical 1.35 V
Watchdog Timing
The frequency of the watchdog pulses has to be higher than the minimum pulse
sequence which is set by the external reset delay capacitor CD. Calculation can be done
according to the formula given in Figure 6.
Figure 6 Timing of the Watchdog Function Reset
AED03099_4263
W
V
V
V
Q
D
V
V
RO WD, L
t
WD, p
T
WI, tr
T
T
=
VV
(
DU
-
DWL
)
Ι
D, wd
DU
V
V
DWL
Ι
WI, tr D
C
t
t
t
t
t
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Data Sheet 12 Rev. 2.8, 2007-03-20
TLE 4263
Reset Switching Threshold versus
Output Voltage
Reset Switching Threshold versus
Temperature
Timing Threshold Voltage VDU and VDRL
versus Temperature
Current Consumption of Inhibit versus
Temperature
0.8
0.4
0.6
0.2
1
02
0
1.6
1.2
1.4
1.0
RADJ
V
V
V
4
35
V
Q
AED01098_4263
Ι
V
= 13.5 V
AED01088
-40 04080120 ˚C 160
0
j
T
RADJ
V
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
V
AED03062
-40
0
I
V
= 13.5 V
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
V
04080120 160˚C
V
T
j
V
DRL
DU
V
AED03063
V
INH
= 5 V
µA
INH
I
80-40
4
2
0
6
8
400
10
12
14
16
160˚C120
T
j
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Data Sheet 13 Rev. 2.8, 2007-03-20
TLE 4263
Drop Voltage versus
Output Current
Current Consumption versus
Input Voltage
Current Consumption versus
Output Current
Output Voltage versus
Input Voltage
AED03060_4263
0
0
Q
I
50 100 150 200 300
mA
100
200
300
400
500
600
700
800
mV
V
dr
j
T
= 125 ˚C
25 ˚C
15
10
5
20010
0
20
mA
30
25
q
Ι
= 25
R
L
50
V
30 40
V
Ι
AED01096
Ω
AED03061
0
0
Q
I
q
I
50 100 150 200 300
I
V
= 13.5 V
mA
4
8
12
16
20
24
28
32
mA
R
6
4
2
04
02
8
12
10
Q
VV
10
V
68
V
Ι
AED01097
= 25
L
Ω
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Data Sheet 14 Rev. 2.8, 2007-03-20
TLE 4263
Charge Current and Discharge
Current versus Temperature
Pulse Time versus
Temperature
Output Voltage versus
Temperature
Output Current versus
Input Voltage
40
20
30
10
0-40 40
0
80
60
70
50
Ι
A
C
12080 160
T
j
AED03064
µ
= 13.5 V
= 1.5 V
Ι
V
V
D
Ι
D, ch
D, dis
Ι
20
10
15
5
0-40 40
0
40
30
35
25
WI,tr
T
C
12080 160
T
j
AED03065_4263
ms
V
Ι= 13.5 V
= 100 nF
C
D
AED01090
-40 04080120 ˚C 160
4.6
j
T
Q
V
V
I= 13.5 V
4.7
4.8
4.9
5.0
5.1
V
5.2
T
100
0
50
100
20
250
300
Q
Ι
mA
200
150
V
40
30 V
Ι
50
= 25 C
j
AED01091
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TLE 4263
Data Sheet 15 Rev. 2.8, 2007-03-20
Package Outlines
Figure 7 PG-DSO-14-30 (Plastic Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
-0.2
8.75 1)
0.64
0.19
+0.06
Index Marking
1.27
+0.10
0.41
0.1
1
14
2)
7
14x
8
0.175
(1.47)
±
0.07
±0.2
6
0.35 x 45˚
-0.2
1.75 MAX.
41)
±0.25
8˚MAX.
-0.06
0.2
M
AB
M
0.2 C
C
B
A
GPS01230
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
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Data Sheet 16 Rev. 2.8, 2007-03-20
TLE 4263
Figure 8 PG-DSO-20-35 (Plastic Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
-0.2
Index Marking
110
+0.15
0.35
0.2
0.2
20
2)
11
20x
2.45
2.65 MAX.
0.1 10.3
-0.1
-0.2
7.6
±0.3
1)
Does not include plastic or metal protrusion of 0.15 max. per side
2)
1)
Does not include dambar protrusion of 0.05 max. per side
1.27
0.23
+0.09
MAX.8˚
0.35 x 45˚
+0.8
0.4
12.8 -0.2 1)
GPS05094
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
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TLE 4263
Data Sheet 17 Rev. 2.8, 2007-03-20
Figure 9 PG-DSO-8-16 (Plastic Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
1) Does not include plastic or metal protrusion of 0.15 max. per side
-0.06
-0.2
+0.1
5
0.41
8x
1
1)
4
8
1.27
5
A
0.1
0.2
M
A
(1.45)
0.175
1.75 MAX.
B
B
6
±0.2
0.64
4
-0.2
0.19
+0.06
0.35 x 45°
1)
±0.25
MAX.8°
Index
Marking
±0.07
2) Lead width can be 0.61 max. in dambar area
GPS01229
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
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TLE 4263
Revision History
Data Sheet 18 Rev. 2.8, 2007-03-20
Version Date Changes
Rev. 2.8 2007-03-20 Initial version of RoHS-compliant derivate of TLE 4263
Page 1: AEC certified statement added
Page 1 and Page 15 ff:RoHS compliance statement and
Green product feature added
Page 1 and Page 15 Package changed to RoHS
compliant version
Legal Disclaimer updated
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Edition 2007-03-20
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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