1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
TP2104
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures,
this device is free from thermal runaway and thermally-
induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching
speeds are desired.
P-Channel Enhancement Mode
Vertical DMOS FETs
Absolute Maximum Ratings
Pin Configuration
Product Marking
TO-236AB (SOT-23) (K1)
P1LW W = Code for week sealed
= “Green” Packaging
DRAIN
SOURCE
GATE
Ordering Information
Device
Package Options BVDSS/BVDGS
(V)
RDS(ON)
(max)
(Ω)
VGS(th)
(max)
(V)
TO-236AB (SOT-23) TO-92
TP2104 TP2104K1-G TP2104N3-G -40 6.0 -2.0
-G indicates package is RoHS compliant (‘Green’)
Parameter Value
Drain-to-source voltage BVDSS
Drain-to-gate voltage BVDGS
Gate-to-source voltage ±20V
Operating and storage temperature -55°C to +150°C
Soldering temperature* +300°C
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
GATE
SOURCE
DRAIN
TO-92 (N3)
TO-236AB (SOT-23) (K1)
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
SiTP
2104
Y Y W W
TO-92 (N3)
Features
High input impedance and high gain
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral source-drain diode
Free from secondary breakdown
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Analog switches
Power management
Telecom switches
Package may or may not include the following marks: Si or
Package may or may not include the following marks: Si or
2
TP2104
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Thermal Characteristics
Package
ID
(continuous)
(mA)
ID
(pulsed)
(A)
Power Dissipation
@ TA = 25OC
(W)
θjc
OC/W
θja
OC/W
IDR
(mA)
IDRM
(A)
TO-236AB (SOT-23) -160 -0.8 0.36 200 350 -160 -0.8
TO-92 -250 -1.0 0.74 125 170 -250 -1.0
† ID (continuous) is limited by max rated Tj .
Switching Waveforms and Test Circuit
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
V
DD
RL
Output
D.U.T.
t(ON)
td(ON)
t(OFF)
td(OFF) tF
tr
INPUT
INPUT
OUTPUT
0V
V
DD
RGEN
0V
-10V
Sym Parameter Min Typ Max Units Conditions
Electrical Characteristics (TA = 25°C unless otherwise specified)
BVDSS Drain-to-source breakdown voltage -40 - - V VGS = 0V, ID = -1.0mA
VGS(th) Gate threshold voltage -1.0 - -2.0 V VGS = VDS, ID= -1.0mA
∆VGS(th) Change in VGS(th) with temperature - 5.8 6.5 mV/OC VGS = VDS, ID= -1.0mA
IGSS Gate body leakage - -1.0 -100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current -
- -10 μA VGS = 0V, VDS = Max Rating
--1.0 mA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current -0.6 - - A VGS = -10V, VDS = -25V
RDS(ON)
Static drain-to-source on-state
resistance -- 10 ΩVGS = -4.5V, ID = -50mA
- 6.0 VGS = -10V, ID = -500mA
∆RDS(ON) Change in RDS(ON) with temperature - 0.55 1.0 %/OC VGS = -10V, ID = -500mA
GFS Forward transconductance 150 200 - mmho VDS = -25V, ID = -500mA
CISS Input capacitance - 35 60
pF
VGS = 0V,
VDS = -25V,
f = 1.0 MHz
COSS Common source output capacitance - 22 30
CRSS Reverse transfer capacitance - 8.0 10
td(ON) Turn-on delay time - 4.0 6.0
ns
VDD = -25V,
ID = -500mA,
RGEN = 25Ω
trRise time - 4.0 8.0
td(OFF) Turn-off delay time - 5.0 9.0
tfFall time - 5.0 8.0
VSD Diode forward voltage drop - -1.2 -2.0 V VGS = 0V, ISD = -500mA
trr Reverse recovery time - 400 - ns VGS = 0V, ISD = -500mA
Notes:
All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
All A.C. parameters sample tested.
1.
2.
3
TP2104
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Typical Performance Curves
Output Characteristics
-2.0
-1.6
-1.2
-0.8
-0.4
0
Saturation Characteristics
-2.0
-1.6
-1.2
-0.8
-0.4
0
Maximum Rated Safe Operating Area
-0.1 -100-10-1.0
-0.01
-0.1
-1.0
-0.001
Thermal Response Characteristics
)de
zil
amron(
ecn
at
siseR
l
amrehT
1.0
0.8
0.6
0.4
0.2
0
0.001 100.01 0.1 1.0
Transconductance vs. Drain Current Power Dissipation vs. Temperature
0 15010050
1.0
0.8
0.6
0.4
0.2
0
1257525
TO-92
SOT-23
SOT-23 (DC)
0 -10 -20 -30 -50-40 0 -2 -4 -6 -10-8
SOT-23 (pulsed)
T
A
= 25°C
0.5
0.4
0.3
0.2
0.1
0
0 -0.2 -0.4 -0.6 -1.0-0.8
-6V
-4V
-3V
-8V
-6V
-3V
-4V
-8V
T
A
= -55°C
25°C
125°C
SOT-23
T
A
= 25°C
P
D
= 0.36W
VDS (volts)
ID)serepma(
V
GS
= -10V
V
GS
= -10V
VDS (volts)
ID)
s
er
ep
m
a(
GSF )s
n
emeis(
ID (amperes) TA (°C)
PD)sttaw(
V
DS
= -25V
VDS (volts)
ID)
sere
pm
a(
tp (seconds)
TO-92
P
D
= 1W
T
C
= 25°C
4
TP2104
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Typical Performance Curves (cont.)
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
VSG )
s
tlo
v
(
Tj
)ht(S
G
V)
d
e
z
ilamr
o
n(
)
N
O(S
D
R)de
z
ilamron(
VDS(ON)GS(th) and R Variation with Temperature
C)°(
On-Resistance vs. Drain Current
(amperes)
D
)smh
o(
)NO(SD
R
Variation with Temperature
DSS
SSD )dezi
l
amron
(
VB
C)°(Tj
Transfer Characteristics
VGS (volts)
I)sere
pma
(
D
Capacitance vs. Drain-to-Source Voltage
100
)
sda
ra
fo
cip( C
VDS (volts)
I
BV
0 -10 -20 -30 -40
50
75
25
0
0 -2 -4 -6 -8 -10
-2.0
-1.6
-1.2
-0.8
-0.4
0
-50 0 50 100 150
1.1
1.0
20
16
12
8
4
0
1.2
1.1
1.0
0.9
0.8
0.7
-10
-8
-6
-4
-2
0 0.5 1.0 1.5 2.0 2.5
-50 0 50 100 150
35 pF
VDS = -40V
VDS = -10V
V
GS = -4.5V
VGS = -10V
T= -55°C
A
VDS = -25V
125°C
0 -0.4 -0.8 -1.2 -2.0-1.6
f = 1MHz
C
ISS
C
OSS
C
RSS
0.9
125 pF
1.6
1.4
1.2
1.0
0.8
V @ -1mA
25°C
0
RDS(ON) @ -10V, -0.5A
GS(th)
5
TP2104
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
3-Lead TO-236AB (SOT-23) Package Outline (K1)
2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch
Symbol A A1 A2 b D E E1 e e1 L L1 θ
Dimension
(mm)
MIN 0.89 0.01 0.88 0.30 2.80 2.10 1.20 0.95
BSC
1.90
BSC
0.20
0.54
REF
0O
NOM - - 0.95 - 2.90 - 1.30 0.50 -
MAX 1.12 0.10 1.02 0.50 3.04 2.64 1.40 0.60 8O
JEDEC Registration TO-236, Variation AB, Issue H, Jan. 1999.
† This dimension is a non-JEDEC dimension.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO236ABK1, Version B072208.
View B
View A - A
Side View
Top View
View B
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2009 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
6
TP2104
Doc.# DSFP-TP2104
A022309
3-Lead TO-92 Package Outline (N3)
Symbol A b c D E E1 e e1 L
Dimensions
(inches)
MIN .170 .014.014.175 .125 .080 .095 .045 .500
NOM - - - - - - - - -
MAX .210 .022.022.205 .165 .105 .105 .055 .610*
JEDEC Registration TO-92.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
† This dimension is a non-JEDEC dimension.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version D080408.
Seating Plane
1
2
3
Front View Side View
Bottom View
E1 E
D
e1
L
e
c
1 2 3
b
A