KA3525A SMPS CONTROLLER
VOLTAGE-MODE PWM CONTROLLER
The KA3525A is a monolithic integrated circuit that Included all of
the control circuit necessary for a pulse width modulating regulator.
There are a voltage reference, an error amplifier, a pulse width
modulator, an oscillator, under-voltage lockout, soft start circuit, and
output drivers in the chip.
FEATURES
5V
ä
1% Reference
Oscillator Sync Terminal
Internal Soft Start
Deadtime Control
Under-Voltage Lockout
ORDERING INFORMATION
BLOCK DIAGRAM
5.5K
5.5K
43K
Device Package Operating Temperature
KA3525A 16 DIP -30 ~ +85
Î
KA3525AD 16-SOP-225A -30 ~ +85
Î
16-DIP
16-SOP-225A
©1 999 Fairchild S em iconductor Corporation
Rev. B
KA3525A SMPS CONTROLLER
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = 20V, TA = -35
Î
to + 85
Î
, unless otherwise specified)
Characteristic Symbol Value Unit
Supply Voltage VCC 40 V
Collector Supply Voltage VC40 V
Output Current, Sink or Source IO500 mA
Reference Output Current IREF 50 mA
Oscillator Charging Current ICHG(OSC) 5mA
Power Dissipation (TA = 25
Î
)PD1000 m/W
Operating Temperature TOPR 0 ~ +70
Î
Storage Temperature TSTG -65 ~ +150
Î
Lead Temperature (Soldering, 10 sec) TLEAD +300
Î
Characteristic Sy m bol Test Conditions Min Typ Max Unit
REFERENCE SECTION
Reference Output Voltage VREF TJ = 25
Î
5.0 5.1 5.2 V
Line Regulation
L
VREF VCC = 8 to 35V 9 20 mV
Load Regulation
L
VREF IREF = 0 to 20mA 20 5 0 mV
Short Circuit Output Current ISC VREF = 0, TJ = 25
Î
80 100 mA
Total Output Variation (Note 1)
L
VREF Line, Load and Temperature 4.95 5.25 V
Temperature Stability (Note 1) STT20 50 mV
Long Term Stability (No te 1) ST TJ = 125
Î
, 1 KHRS 20 50 mV
OSCILLATOR SECTION
Initial Accuracy (Note 1, 2) ACCUR TJ = 25
Î
ä
3
ä
6%
Frequency Change With Voltage
L
f/
L
VCC VCC = 8 to 35V (Note 1, 2)
ä
0.8
ä
2%
Maximum Frequency f(MAX) RT = 2K
`
, CT = 470pF 400 430 KHz
Minimum Frequency f(MIN) RT = 200K
`
, CT = 0.1
s
F60 120 Hz
Clock Amplitude (Note 1, 2) V(CLK) 34 V
Clock Width (Note 1, 2) tW(CLK) TJ = 25
Î
0.3 0.6 1
s
s
Sync Threshold VTH(SYNC) 1.222.8V
Sync Input Current II(SYNC) Sync = 3.5V 1.3 2.5 mA
KA3525A SMPS CONTROLLER
ELECTRICAL CHARACTERISTICS
(VCC = 20V, TA = -35
Î
to +85
Î
, unless otherwise specified)
(Note)
1. These parameters. although guaranteed over the recommended operating conditions, are not 100% tested in
production
2. Tested at fOSC=40 KHz (RT =3.6K, CT =0.01
s
F, RI = 0
`
)
Characteristic Symbol Test Conditions Min Typ Max Unit
ERROR AMPLIFIER SECTION (VCM = 5.1V)
Input Offset Voltage VIO 1.5 10 mV
Input Bias Current IBAIS 110
s
A
Input Offset Current I IO 0.1 1
s
A
Open Loop Voltage Gain GVO RL
(
10M
`
60 80 dB
Common Mode Rejection Ratio CMRR VCM = 1.5 to 5.2V 60 90 dB
Power Supply Rejection Ratio PSRR VCC = 8 to 3.5V 50 60 dB
PWM COMPARATOR SECTION
Minimum Duty Cycle D(MIN) 0%
Maximum Duty Cycle D(MAX) 45 49 %
Input Threshold Voltage (Note 2) VTH1 Zero Duty Cycle 0.7 0.9 V
Input Threshold Voltage (N0te 2) VTH2 Max Duty Cycle 3.2 3.6 V
SOFT-START SECTION
Soft Start Current ISOFT VSD = 0V, VSS = 0V 25 51 80
s
A
Soft Start Low Level Voltage VSL VSD = 25V 0.3 0.7 V
Shutdown Threshold Voltage VTH(SD) 0.7 1.3 1.7 V
Shutdown Input Current IN(SD) VSD = 2.5V 0.3 1 mA
OUTPUT SECTION
Low Output Voltage I VOL I ISINK = 20mA 0.1 0.4 V
Low Output Voltage II VOL II ISINK = 100mA 0.05 2 V
High Output Voltage I VCH I ISOURCE = 20mA 18 19 V
High Output Voltage II VCH II ISOURCE = 100mA 17 18 V
Under Voltage Lockout VUV V8 and V9 = High 6 7 8 V
Collector Leakage Current I LKG VCC = 35V 80 200
s
A
Rise Time (Note 1) tRCL = 1
s
F, TJ = 26
Î
80 600 nS
Fall Time (Note 1) tFCL = 1
s
F, TJ = 25
Î
70 300 nS
STANDBY CURRENT
Supply Cuttent ICC VCC = 35V 12 20 mA
KA3525A SMPS CONTROLLER
TEST CIRCUIT
TRADEMARKS
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Definition of Terms
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Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
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changes at any time without notice in order to improve
design.
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any time without notice in order to improve design.
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In Design
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