Supertex inc. HV9961 LED Driver with Average-Mode Constant Current Control Features General Description The HV9961 is an average current mode control LED driver IC operating in a constant off-time mode. Unlike HV9910B, this control IC does not produce a peak-to-average error, and therefore greatly improves accuracy, line and load regulation of the LED current without any need for loop compensation or high-side current sensing. The output LED current accuracy is 3%. Fast average current control Programmable constant off-time switching Linear dimming input PWM dimming input Output short circuit protection with skip mode Ambient operating temperature -40OC to +125OC Pin-compatible with the HV9910B The IC is equipped with a current limit comparator for hiccupmode output short circuit protection. Applications The HV9961 can be powered from an 8.0 - 450V supply. A PWM dimming input is provided that accepts an external control TTL compatible signal. The output current can be programmed by an internal 275mV reference, or controlled externally through a 0 - 1.5V dimming input. DC/DC or AC/DC LED driver applications LED backlight driver for LCD displays General purpose constant current source LED signage and displays Architectural and decorative LED lighting LED street lighting HV9961 is pin-to-pin compatible with HV9910B and it can be used as a drop-in replacement for many applications to improve the LED current accuracy and regulation. Typical Application Circuit LED Load 8.0 - 450VDC 1 VIN 5 PWMD GATE 4 HV9961 6 VDD 7 LD CS 2 GND 3 RT 8 RT RCS Sets LED Current Supertex inc. www.supertex.com HV9961 Pin Description Ordering Information Part Number Package Packing HV9961LG-G 8-Lead SOIC (Narrow Body) 2500/Reel HV9961NG-G 16-Lead SOIC (Narrow Body) 45/Tube HV9961NG-G M934 16-Lead SOIC (Narrow Body) 2500/Reel -G indicates package is RoHS compliant (`Green') VIN 1 16 NC NC 2 15 NC NC 3 14 RT CS 4 13 LD VIN 1 8 RT GND 5 CS 2 7 LD NC 6 11 NC 6 VDD NC 7 10 NC GND 3 5 PWMD GATE 4 GATE 8 8-Lead SOIC (LG) ja 8-Lead SOIC 101OC/W 16-Lead SOIC 83OC/W PWMD 16-Lead SOIC (NG) Y = Last Digit of Year Sealed WW = Week Sealed L = Lot Number = "Green" Packaging YWW H9961 LLLL Package may or may not include the following marks: Si or 8-Lead SOIC (LG) Absolute Maximum Ratings Parameter Value VIN to GND -0.5V to +470V VDD to GND 12V CS, LD, PWMD, GATE, RT to GND 9 Product Marking Typical Thermal Resistance Package 12 VDD -0.3V to (VDD +0.3V) Junction temperature range -40C to +150C Storage temperature range -65C to +150C Continuous power dissipation (TA = +25C) 8-Lead SOIC 16-Lead SOIC Top Marking HV9961NG YWW LLLLLLLL Bottom Marking CCCCCCCCC AAA Y = Last Digit of Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks: Si or 16-Lead SOIC (NG) 650mW 1000mW Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (Specifications are at T A Sym Description = 25C. VIN = 12V, VLD = VDD, PWMD = VDD unless otherwise noted)) Min Typ Max Units Conditions Input VINDC Input DC supply voltage range1 * 8.0 - 450 V IINSD Shut-down mode supply current * - 0.5 1.0 mA DC input voltage Pin PWMD to GND Notes: 1. Also limited by package power dissipation limit, whichever is lower. * Denotes the specifications which apply over the full operating ambient temperature range of -40C < TA < +125C. Supertex inc. 2 www.supertex.com HV9961 Electrical Characteristics (Specifications are at T A Sym Description = 25C. VIN = 12V, VLD = VDD, PWMD = VDD unless otherwise noted)) Min Typ Max Units Conditions Internal Regulator Internally regulated voltage - 7.25 7.50 7.75 V VIN = 8.0V, IDD(ext) = 0, 500pF at GATE; RT = 226k VDD, line Line regulation of VDD - 0 - 1.0 V VIN = 8.0 - 450V, IDD(ext) = 0, 500pF at GATE; RT = 226k VDD, load Load regulation of VDD - 0 - 100 mV IDD(ext) = 0 - 1.0mA, 500pF at GATE; RT = 226k * 6.45 6.70 6.95 V VIN rising - - 500 - mV VIN falling # 3.5 - - # 1.5 - - VDD UVLO UVLO IIN,MAX VDD undervoltage lockout threshold VDD undervoltage lockout hysteresis Maximum input current (limited by UVLO) mA VIN = 8.0V, TA = 25OC VIN = 8.0V, TA = 125OC PWM Dimming VEN(lo) PWMD input low voltage * - - 0.8 V VIN = 8.0 - 450V VEN(hi) PWMD input high voltage * 2.2 - - V VIN = 8.0 - 450V Internal pull-down resistance at PWMD - 50 100 150 k VPWMD = 5.0V Current sense reference voltage - 268 - 286 mV --- AV(LD) LD-to-CS voltage ratio - 0.182 - 0.188 - --- AVLD(OFFSET) LD-to-CS voltage offset - 0 - 10 mV Offset = VCS - AV(LD) * VLD; VLD = 1.2V CS threshold temp regulation * - - 5.0 mV --- LD input voltage, shutdown - - 150 - mV VLD falling LD input voltage, enable - - 200 - mV VLD rising TBLANK Current sense blanking interval * 150 - 320 ns --- TON(min) Minimum on-time - - - 1000 ns CS = VCS +30mV Maximum steady-state duty cycle - 75 - - % Reduction in output LED current may occur beyond this duty cycle Hiccup threshold voltage - 410 - 470 mV --- TDELAY Current limit delay CS-to-GATE - - - 150 ns CS = VCS +30mV THICCUP Short circuit hiccup time - 350 - 550 s --- TON(min) Minimum on-time (short circuit) - - - 430 ns CS = VDD REN Average Current Sense Logic VCS VLD(OFF) VLD(OFF) DMAX Short Circuit Protection VCS Notes: * Denotes the specifications which apply over the full operating ambient temperature range of -40C < TA < +125C. # Guaranteed by design. Supertex inc. 3 www.supertex.com HV9961 Electrical Characteristics (Specifications are at T A Sym Description = 25C. VIN = 12V, VLD = VDD, PWMD = VDD unless otherwise noted)) Min Typ Max Units Conditions - 32 40 48 - 8.0 10 12 GATE sourcing current - 0.165 - - A VGATE = 0V, VDD = 7.5V ISINK GATE sinking current - 0.165 - - A VGATE = VDD, VDD = 7.5V tRISE GATE output rise time - - 30 50 ns CGATE = 500pF, VDD = 7.5V tFALL GATE output fall time - - 30 50 ns CGATE = 500pF, VDD = 7.5V TOFF Timer TOFF Off time s RT = 1.00M RT = 226k GATE Driver ISOURCE Notes: * Denotes the specifications which apply over the full operating ambient temperature range of -40C < TA < +125C. # Guaranteed by design. Functional Block Diagram VDD Regulator VIN UVLO POR 0.15/0.20V LD MIN (VLD * 0.185, 0.275V) GATE Auto-REF CS L/E Blanking IN Average Current Control Logic OUT PWMD GND R Q 0.44V S Q CLK HV9961 400s TOFF Timer i Current Mirror RT Supertex inc. 4 www.supertex.com HV9961 Application Information General Description feedback operates in a fast open-loop mode. No compensation is required. Output current is programmed simply as: Peak-current control (as in HV9910B) of a buck converter is the most economical and simple way to regulate its output current. However, it suffers accuracy and regulation problems that arise from the so-called peak-to-average current error, contributed by the current ripple in the output inductor and the propagation delay in the current sense comparator. The full inductor current signal is unavailable for direct sensing at the ground potential in a buck converter when the control switch is referenced to the same ground potential because the control switch is only conducting for small periods. While it is very simple to detect the peak current in the switch, controlling the average inductor current is usually implemented by level translating the sense signal from +VIN. Though this is practical for relatively low input voltage VIN, this type of average-current control may become excessively complex and expensive in the offline AC or other highvoltage DC applications. ILED = I = LED LO = RCS (3) VO(MAX) * TOFF 0.4 * IO (4) Reducing the output LED voltage VO below VO(MIN) = VIN * DMIN, where DMIN = 1.0s/(TOFF +1.0s), may also result in the loss of regulation of the LED current. This condition, however, causes an increase in the LED current and can potentially trip the short-circuit protection comparator. The typical output characteristic of the HV9961 LED driver is shown in Fig.1. The corresponding HV9910B characteristic is given for the comparison. Output Characteristics 0.60 0.55 LED Current (A) 25 VLD * 0.185 The duty-cycle range of the current control feedback is limited to D 0.75. A reduction in the LED current may occur when the LED string voltage VO is greater than 75% of the input voltage VIN of the HV9961 LED driver. The timing resistor connected to RT determines the off-time of the gate driver, and it must be wired to GND. (Wiring this resistor to GATE as with HV9910B is no longer supported.) The equation governing the off-time of the GATE output is given by: + 0.3 (2) The above equations are only valid for continuous conduction of the output inductor. It is a good practice to design the inductor such that the switching ripple current in it is 30~40% of its average peak-to-peak, full load, DC current. Hence, the recommended inductance can be calculated as: OFF Timer RT (k) when the voltage at the LD input VLD 1.5V. Otherwise: The HV9961 employs Supertex' proprietary control scheme, achieving fast and very accurate control of average current in the buck inductor through sensing the switch current only. No compensation of the current control loop is required. The LED current response to PWMD input is similar to that of the HV9910B. The inductor current ripple amplitude does not affect this control scheme significantly, and therefore, the LED current is independent of the variation in inductance, switching frequency or output voltage. Constant off-time control of the buck converter is used for stability and to improve the LED current regulation over a wide range of input voltages. (Note that, unlike HV9910B, the HV9961 does not support the constant-frequency mode of operation.) TOFF (s) = 0.275V RCS (1) within the range of 30k RT 1.0M. VIN = 170VDC 0.50 0.45 0.40 HV9961 0.35 0.30 Average Current Control Feedback and Output Short Circuit Protection 0.25 HV9910B 0 10 20 30 40 50 60 Output Voltage (V) The current through the switching MOSFET source is averaged and used to give constant-current feedback. This current is detected using a sense resistor at the CS pin. The Fig.1. Typical output characteristic of an HV9961 LED driver. Supertex inc. 5 www.supertex.com HV9961 The short circuit protection comparator trips when the voltage at CS exceeds 0.44V. When this occurs, the GATE offtime THICCUP = 400s is generated to prevent stair-casing of the inductor current and potentially its saturation due to insufficient output voltage. The typical short-circuit current is shown in the waveform of Fig. 2. pulse-width modulated signal of a measured amplitude below 1.5V should be applied at LD. Input Voltage Regulator The HV9961 can be powered directly from an 8.0 ~ 450VDC supply through its VIN input. When this voltage is applied at the VIN pin, the HV9961 maintains a constant 7.5V level at VDD. This voltage can be used to power the IC and external circuitry connected to VDD within the rated maximum current or within the thermal ratings of the package, whichever limit is lower. The VDD pin must be bypassed by a low ESR capacitor to provide a low impedance path for the high frequency current of the GATE output. The HV9961 can also be powered through the VDD pin directly with a voltage greater than the internally regulated 7.5V, but less than 12V. 0.44V/RCS 400s Fig.2. Short-circuit inductor current. A leading-edge blanking delay is provided at CS to prevent false triggering of the current feedback and the short circuit protection. Despite the instantaneous voltage rating of 450V, continuous voltage at VIN is limited by the power dissipation in the package. For example, when HV9961 draws IIN = 2.0mA from the VIN input, and the 8-pin SOIC package is used, the maximum continuous voltage at VIN is limited to: Linear Dimming When the voltage at LD falls below 1.5V, the internal 275mV reference to the constant-current feedback becomes overridden by VLD * 0.185. As long as the current in the inductor remains continuous, the LED current is given by the equation (3) above. However, when VLD falls below 150mV, the GATE output becomes disabled. The GATE signal recovers, when VLD exceeds 200mV. This is required in some applications to be able to shut the LED lamp off with the same signal input that controls the brightness. The typical linear dimming response is shown in Fig.3. VIN(MAX) = 0.30 LED Current (A) = 390V (5) In such cases, when it is needed to operate the HV9961 from a higher voltage, a resistor or a Zener diode can be added in series with the VIN input to divert some of the power loss from the HV9961. In the above example, using a 100V Zener diode will allow the circuit to work up to 490V. The input current drawn from the VIN pin is represented by the following equation: 0.35 0.25 0.20 IIN 1.0mA + QG * fS 0.15 (6) In the above equation, fS is the switching frequency, and QG is the GATE charge of the external FET obtained from the manufacturer's datasheet. 0.10 0.05 0 R,J-A * IIN where the ambient temperature TA = 25OC, the maximum working junction temperature TJ(MAX) = 125OC, the junctionto-ambient thermal resistance R,JA = 128OC/W. LD Response Characteristics 0.40 (TJ(MAX) - TA ) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 LD (V) GATE Output Fig.3. Typical linear dimming response of an HV9961 LED driver The GATE output of the HV9961 is used to drive an external MOSFET. It is recommended that the gate charge QG of the external MOSFET be less than 25nC for switching frequencies 100kHz and less than 15nC for switching frequencies >100kHz. The linear dimming input could also be used for "mixedmode" dimming to expand the dimming ratio. In such case a Supertex inc. 6 www.supertex.com HV9961 PWM Dimming The rising and falling edges are limited by the current slew rate in the inductor. The first switching cycle is terminated upon reaching the 275mV (VLD * 0.185) level at CS. The circuit is further reaching its steady-state within 3~4 switching cycles regardless of the switching frequency. Due to the fast open-loop response of the average-current control loop of the HV9961, its PWM dimming performance nearly matches that of the HV9910B. The inductor current waveform comparison is shown in Fig. 4. Fig.4. Typical PWM dimming response of an HV9961 LED driver. [CH2 (red): PWMD; CH4 (green): Inductor Current; CH3 (blue): Same as HV9910B for comparison] Pin Description Pin # Function Description 8-Lead SOIC 16-Lead SOIC 1 1 VIN This pin is the input of an 8.0 - 450V linear regulator. 2 4 CS This pin is the current sense pin used to sense the FET current by means of an external sense resistor. 3 5 GND Ground return for all internal circuitry. This pin must be electrically connected to the ground of the power train. 4 8 GATE This pin is the output GATE driver for an external N-channel power MOSFET. 5 9 PWMD This is the PWM dimming input of the IC. When this pin is pulled to GND, the gate driver is turned off. When the pin is pulled high, the gate driver operates normally. 6 12 VDD This is the power supply pin for all internal circuits. It must be bypassed with a low ESR capacitor to GND (at least 0.1F). 7 13 LD This pin is the linear dimming input, and it sets the current sense threshold as long as the voltage at this pin is less than 1.5V. If voltage at LD falls below 150mV, the GATE output is disabled. The GATE signal recovers at 200mV at LD. 8 14 RT A resistor connected between this pin and GND programs the GATE offtime. - 2, 3, 6, 7, 10, 11, 15, 16 NC No connection Supertex inc. 7 www.supertex.com HV9961 8-Lead SOIC (Narrow Body) Package Outline (LG) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch 1 D 8 Note 1 (Index Area D/2 x E1/2) E1 E Gauge Plane L2 L 1 L1 Top View Seating Plane View B Note 1 View B h A h A A2 Seating Plane A1 e b Side View View A-A A Note: 1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (mm) A A1 A2 b MIN 1.35* 0.10 1.25 0.31 NOM - - - - MAX 1.75 0.25 1.65* 0.51 D E E1 4.80* 5.80* 3.80* 4.90 6.00 3.90 5.00* 6.20* 4.00* e 1.27 BSC h L 0.25 0.40 - - 0.50 1.27 L1 L2 1.04 REF 0.25 BSC 1 0O 5O - - 8O 15O JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-8SOLGTG, Version I041309. Supertex inc. 8 www.supertex.com HV9961 16-Lead SOIC (Narrow Body) Package Outline (NG) 9.90x3.90mm body, 1.75mm height (max), 1.27mm pitch D 1 16 Note 1 (Index Area D/2 x E1/2) E1 E Gauge Plane L2 e 1 L1 b Top View L Seating Plane View B View B A h h A A2 Seating Plane A1 Side View View A-A A Note: 1. This chamfer feature is optional. If it is not present, then a Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (mm) A A1 A2 b D E E1 MIN 1.35* 0.10 1.25 0.31 9.80* 5.80* 3.80* NOM - - - - 9.90 6.00 MAX 1.75 0.25 1.65* 0.51 3.90 10.00* 6.20* 4.00* e 1.27 BSC h L 0.25 0.40 - - 0.50 1.27 L1 L2 1.04 0.25 REF BSC 1 0O 5O - - 8O 15O JEDEC Registration MS-012, Variation AC, Issue E, Sept. 2005. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-16SONG, Version G041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate "product liability indemnification insurance agreement." Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. (c)2012 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV9961 C042612 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 9