LMC6062
LMC6062 Precision CMOS Dual Micropower Operational Amplifier
Literature Number: SNOS631C
LMC6062
Precision CMOS Dual Micropower Operational Amplifier
General Description
The LMC6062 is a precision dual low offset voltage, mi-
cropower operational amplifier, capable of precision single
supply operation. Performance characteristics include ultra
low input bias current, high voltage gain, rail-to-rail output
swing, and an input common mode voltage range that in-
cludes ground. These features, plus its low power consump-
tion, make the LMC6062 ideally suited for battery powered
applications.
Other applications using the LMC6062 include precision
full-wave rectifiers, integrators, references, sample-and-hold
circuits, and true instrumentation amplifiers.
This device is built with National’s advanced double-Poly
Silicon-Gate CMOS process.
For designs that require higher speed, see the LMC6082
precision dual operational amplifier.
PATENT PENDING
Features
(Typical Unless Otherwise Noted)
nLow offset voltage 100µV
nUltra low supply current 16µA/Amplifier
nOperates from 4.5V to 15V single supply
nUltra low input bias current 10fA
nOutput swing within 10mV of supply rail, 100k load
nInput common-mode range includes V
nHigh voltage gain 140dB
nImproved latchup immunity
Applications
nInstrumentation amplifier
nPhotodiode and infrared detector preamplifier
nTransducer amplifiers
nHand-held analytic instruments
nMedical instrumentation
nD/A converter
nCharge amplifier for piezoelectric transducers
Connection Diagram
8-Pin DIP/SO
01129801
Top View
Ordering Information
Package Temperature Range NSC
Drawing Transport MediaMilitary Industrial
−55˚C to +125˚C −40˚C to +85˚C
8-Pin LMC6062AMN LMC6062AIN N08E Rail
Molded DIP LMC6062IN
8-Pin LMC6062AIM M08A Rail
Small Outline LMC6062IM
8-Pin LMC6062AMJ/883 J08A Rail
Ceramic DIP
February 2001
LMC6062 Precision CMOS Dual Micropower Operational Amplifier
© 2001 National Semiconductor Corporation DS011298 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Differential Input Voltage ±Supply Voltage
Voltage at Input/Output Pin (V
+
) +0.3V,
(V
) −0.3V
Supply Voltage (V
+
−V
) 16V
Output Short Circuit to V
+
(Note 11)
Output Short Circuit to V
(Note 2)
Lead Temperature
(Soldering, 10 sec.) 260˚C
Storage Temp. Range −65˚C to +150˚C
Junction Temperature 150˚C
ESD Tolerance (Note 4) 2 kV
Current at Input Pin ±10 mA
Current at Output Pin ±30 mA
Current at Power Supply Pin 40 mA
Power Dissipation (Note 3)
Operating Ratings (Note 1)
Temperature Range
LMC6062AM −55˚C T
J
+125˚C
LMC6062AI, LMC6082I −40˚C T
J
+85˚C
Supply Voltage 4.5V V
+
15.5V
Thermal Resistance (θ
JA
) (Note 12)
8-Pin Molded DIP 115˚C/W
8-Pin SO 193˚C/W
Power Dissipation (Note 10)
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C. Boldface limits apply at the temperature extremes. V
+
= 5V, V
= 0V, V
CM
= 1.5V, V
O
= 2.5V and R
L
>1M unless otherwise specified.
Typ LMC6062AM LMC6062AI LMC6062I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
OS
Input Offset Voltage 100 350 350 800 µV
1200 900 1300 Max
TCV
OS
Input Offset Voltage 1.0 µV/˚C
Average Drift
I
B
Input Bias Current 0.010 pA
100 4 4 Max
I
OS
Input Offset Current 0.005 pA
100 2 2 Max
R
IN
Input Resistance >10 Tera
CMRR Common Mode 0V V
CM
12.0V 85 75 75 66 dB
Rejection Ratio V
+
= 15V 70 72 63 Min
+PSRR Positive Power Supply 5V V
+
15V 85 75 75 66 dB
Rejection Ratio V
O
= 2.5V 70 72 63 Min
−PSRR Negative Power Supply 0V V
−10V 100 84 84 74 dB
Rejection Ratio 70 81 71 Min
V
CM
Input Common-Mode V
+
= 5V and 15V −0.4 −0.1 −0.1 −0.1 V
Voltage Range for CMRR 60 dB 000Max
V
+
1.9 V
+
2.3 V
+
2.3 V
+
2.3 V
V
+
2.6 V
+
2.5 V
+
2.5 Min
A
V
Large Signal R
L
= 100 kSourcing 4000 400 400 300 V/mV
Voltage Gain (Note 7) 200 300 200 Min
Sinking 3000 180 180 90 V/mV
70 100 60 Min
R
L
=25kSourcing 3000 400 400 200 V/mV
(Note 7) 150 150 80 Min
Sinking 2000 100 100 70 V/mV
35 50 35 Min
LMC6062
www.national.com 2
DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C. Boldface limits apply at the temperature extremes. V
+
= 5V, V
= 0V, V
CM
= 1.5V, V
O
= 2.5V and R
L
>1M unless otherwise specified.
Typ LMC6062AM LMC6062AI LMC6062I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
O
Output Swing V
+
= 5V 4.995 4.990 4.990 4.950 V
R
L
= 100 kto 2.5V 4.970 4.980 4.925 Min
0.005 0.010 0.010 0.050 V
0.030 0.020 0.075 Max
V
+
= 5V 4.990 4.975 4.975 4.950 V
R
L
=25kto 2.5V 4.955 4.965 4.850 Min
0.010 0.020 0.020 0.050 V
0.045 0.035 0.150 Max
V
+
= 15V 14.990 14.975 14.975 14.950 V
R
L
= 100 kto 7.5V 14.955 14.965 14.925 Min
0.010 0.025 0.025 0.050 V
0.050 0.035 0.075 Max
V
+
= 15V 14.965 14.900 14.900 14.850 V
R
L
=25kto 7.5V 14.800 14.850 14.800 Min
0.025 0.050 0.050 0.100 V
0.200 0.150 0.200 Max
I
O
Output Current Sourcing, V
O
=0V 22 16 16 13 mA
V
+
=5V 8108Min
Sinking, V
O
=5V 21 16 16 16 mA
788Min
I
O
Output Current Sourcing, V
O
=0V 25 15 15 15 mA
V
+
= 15V 91010Min
Sinking, V
O
= 13V 35 20 20 20 mA
(Note 11) 788Min
I
S
Supply Current Both Amplifiers 32 38 38 46 µA
V
+
= +5V, V
O
= 1.5V 60 46 56 Max
Both Amplifiers 40 47 47 57 µA
V
+
= +15V, V
O
= 7.5V 70 55 66 Max
LMC6062
www.national.com3
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, Boldface limits apply at the temperature extremes. V
+
= 5V, V
= 0V, V
CM
= 1.5V, V
O
= 2.5V and R
L
>1M unless otherwise specified.
Typ LMC6062AM LMC6062AI LMC6062I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 8) 35 20 20 15 V/ms
8107Min
GBW Gain-Bandwidth Product 100 kHz
θ
m
Phase Margin 50 Deg
Amp-to-Amp Isolation (Note 9) 155 dB
e
n
Input-Referred Voltage
Noise F = 1 kHz 83 nV/Hz
i
n
Input-Referred Current
Noise F = 1 kHz 0.0002 pA/Hz
T.H.D. Total Harmonic Distortion F = 1 kHz, A
V
=−5
R
L
= 100 k,V
O
=2V
PP
0.01 %
±5V Supply
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 2: Applies to both single-supply and split-supply operation. Continous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C. Output currents in excess of ±30 mA over long term may adversely affect reliability.
Note 3: The maximum power dissipation is a function of TJ(Max),θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD=(T
J(Max)
−T
A
)/θJA.
Note 4: Human body model, 1.5 kin series with 100 pF.
Note 5: Typical values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V+= 15V, VCM = 7.5V and RLconnected to 7.5V. For Sourcing tests, 7.5V VO11.5V. For Sinking tests, 2.5V VO7.5V.
Note 8: V+= 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 9: Input referred V+= 15V and RL= 100 kconnected to 7.5V. Each amp excited in turn with 100 Hz to produce VO=12V
PP.
Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD=(T
J
–TA)/θJA.
Note 11: Do not connect output to V+, when V+is greater than 13V or reliability witll be adversely affected.
Note 12: All numbers apply for packages soldered directly into a PC board.
Note 13: For guaranteed Military Temperature Range parameters, see RETSMC6062X.
LMC6062
www.national.com 4
Typical Performance Characteristics V
S
=±7.5V, T
A
= 25˚C, Unless otherwise specified
Distribution of LMC6062 Input Offset Voltage
(T
A
= +25˚C) Distribution of LMC6062 Input Offset Voltage
(T
A
= −55˚C)
01129815 01129816
Distribution of LMC6062 Input Offset Voltage
(T
A
= +125˚C) Input Bias Current vs. Temperature
01129817 01129818
Supply Current vs. Supply Voltage Input Voltage vs. Output Voltage
01129819 01129820
LMC6062
www.national.com5
Typical Performance Characteristics V
S
=±7.5V, T
A
= 25˚C, Unless otherwise
specified (Continued)
Common Mode Rejection Ratio vs. Frequency Power Supply Rejection Ratio vs. Frequency
01129821 01129822
Input Voltage Noise vs. Frequency Output Characteristics Sourcing Current
01129823 01129824
Output Characteristics Sinking Current Gain and Phase Response vs. Temperature
(−55˚C to +125˚C)
01129825
01129826
LMC6062
www.national.com 6
Typical Performance Characteristics V
S
=±7.5V, T
A
= 25˚C, Unless otherwise
specified (Continued)
Gain and Phase Response vs. Capacitive Load
with R
L
=20kGain and Phase Response vs. Capacitive Load
with R
L
= 500 k
01129827 01129828
Open Loop Frequency Response Inverting Small Signal Pulse Response
01129829 01129830
Inverting Large Signal Pulse Response Non-Inverting Small Signal Pulse Response
01129831 01129832
LMC6062
www.national.com7
Typical Performance Characteristics V
S
=±7.5V, T
A
= 25˚C, Unless otherwise
specified (Continued)
Non-Inverting Large Signal Pulse Response Crosstalk Rejection vs. Frequency
01129833 01129834
Stability vs Capacitive Load, R
L
=20kStability vs. Capacitive Load R
L
=1M
01129835 01129836
LMC6062
www.national.com 8
Applications Hints
AMPLIFIER TOPOLOGY
The LMC6062 incorporates a novel op-amp design topology
that enables it to maintain rail-to-rail output swing even when
driving a large load. Instead of relying on a push-pull unity
gain output buffer stage, the output stage is taken directly
from the internal integrator, which provides both low output
impedance and large gain. Special feed forward compensa-
tion design techniques are incorporated to maintain stability
over a wider range of operating conditions than traditional
micropower op amps. These features make the LMC6062
both easier to design with, and provide higher speed than
products typically found in this ultra low power class.
COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resis-
tance for amplifiers with ultra-low input current, like the
LMC6062.
Although the LMC6062 is highly stable over a wide range of
operating conditions, certain precautions must be met to
achieve the desired pulse response when a large feedback
resistor is used. Large feedback resistors and even small
values of input capacitance, due to transducers, photo-
diodes, and circuit board parasitics, reduce phase margins.
When high input impedances are demanded, guarding of the
LMC6062 is suggested. Guarding input lines will not only
reduce leakage, but lowers stray input capacitance as well.
(See
Printed-Circuit-Board Layout for High Impedance
Work
).
The effect of input capacitance can be compensated for by
adding a capacitor. Place a capacitor, C
f
, around the feed-
back resistor (as in
Figure 1
) such that:
or
R
1
C
IN
R
2
C
f
Since it is often difficult to know the exact value of C
IN
,C
f
can
be experimentally adjusted so that the desired pulse re-
sponse is achieved. Refer to the LMC660 and the LMC662
for a more detailed discussion on compensating for input
capacitance.
CAPACITIVE LOAD TOLERANCE
All rail-to-rail output swing operational amplifiers have volt-
age gain in the output stage. A compensation capacitor is
normally included in this integrator stage. The frequency
location of the dominate pole is affected by the resistive load
on the amplifier. Capacitive load driving capability can be
optimized by using an appropriate resistive load in parallel
with the capacitive load (see typical curves).
Direct capacitive loading will reduce the phase margin of
many op-amps.Apole in the feedback loop is created by the
combination of the op-amp’s output impedance and the ca-
pacitive load. This pole induces phase lag at the unity-gain
crossover frequency of the amplifier resulting in either an
oscillatory or underdamped pulse response. With a few ex-
ternal components, op amps can easily indirectly drive ca-
pacitive loads, as shown in
Figure 2
.
In the circuit of
Figure 2
, R1 and C1 serve to counteract the
loss of phase margin by feeding the high frequency compo-
nent of the output signal back to the amplifier’s inverting
input, thereby preserving phase margin in the overall feed-
back loop.
Capacitive load driving capability is enhanced by using a pull
up resistor to V
+
(
Figure 3
). Typically a pull up resistor
conducting 10 µA or more will significantly improve capaci-
tive load responses. The value of the pull up resistor must be
determined based on the current sinking capability of the
amplifier with respect to the desired output swing. Open loop
gain of the amplifier can also be affected by the pull up
resistor (see Electrical Characteristics).
01129804
FIGURE 1. Canceling the Effect of Input Capacitance
01129805
FIGURE 2. LMC6062 Noninverting Gain of 10 Amplifier,
Compensated to Handle Capacitive Loads
01129814
FIGURE 3. Compensating for Large Capacitive Loads
with a Pull Up Resistor
LMC6062
www.national.com9
Applications Hints (Continued)
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6062, typically less
than 10 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6062’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals etc. connected to the op-amp’s inputs, as in
Figure
4
. To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
12
, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 100 times degradation from the LMC6062’s
actual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
11
would
cause only 0.05 pA of leakage current. See
Figure 5
for
typical connections of guard rings for standard op-amp con-
figurations.
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an
insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See
Figure
6
.
Latchup
CMOS devices tend to be susceptible to latchup due to their
internal parasitic SCR effects.The (I/O) input and output pins
look similar to the gate of the SCR. There is a minimum
current required to trigger the SCR gate lead. The LMC6062
and LMC6082 are designed to withstand 100 mA surge
current on the I/O pins. Some resistive method should be
used to isolate any capacitance from supplying excess cur-
rent to the I/O pins. In addition, like an SCR, there is a
minimum holding current for any latchup mode. Limiting
current to the supply pins will also inhibit latchup suscepti-
bility.
01129806
FIGURE 4. Example of Guard Ring in P.C. Board
Layout
01129807
(a) Inverting Amplifier
01129808
(b) Non-Inverting Amplifier
01129809
(c) Follower
FIGURE 5. Typical Connections of Guard Rings
LMC6062
www.national.com 10
Latchup (Continued) Typical Single-Supply Applications
(V
+
= 5.0 V
DC
)
The extremely high input impedance, and low power con-
sumption, of the LMC6062 make it ideal for applications that
require battery-powered instrumentation amplifiers. Ex-
amples of these types of applications are hand-held pH
probes, analytic medical instruments, magnetic field detec-
tors, gas detectors, and silicon based pressure transducers.
Figure 7
shows an instrumentation amplifier that features
high differential and common mode input resistance
(>10
14
), 0.01% gain accuracy at A
V
= 100, excellent
CMRR with 1 kimbalance in bridge source resistance.
Input current is less than 100 fA and offset drift is less than
2.5 µV/˚C. R
2
provides a simple means of adjusting gain
over a wide range without degrading CMRR. R
7
is an initial
trim used to maximize CMRR without using super precision
matched resistors. For good CMRR over temperature, low
drift resistors should be used.
01129810
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board).
FIGURE 6. Air Wiring
01129811
If R1=R
5
,R
3=R
6
, and R4=R
7
; then
AV100 for circuit shown (R2= 9.822k).
FIGURE 7. Instrumentation Amplifier
01129812
FIGURE 8. Low-Leakage Sample and Hold
LMC6062
www.national.com11
Typical Single-Supply Applications (Continued)
01129813
FIGURE 9. 1 Hz Square Wave Oscillator
LMC6062
www.national.com 12
Physical Dimensions inches (millimeters)
unless otherwise noted
8-Pin Ceramic Dual-In-Line Package
Order Number LMC6062AMJ/883
NS Package Number J08A
LMC6062
www.national.com13
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Pin Small Outline Package
Order Number LMC6062AIM or LMC6062IM
NS Package Number M08A
8-Pin Molded Dual-In-Line Package
Order Number LMC6062AIN, LMC6062AMN or LMC6062IN
NS Package Number N08E
LMC6062
www.national.com 14
Notes
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COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
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Corporation
Americas
Tel: 1-800-272-9959
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www.national.com
LMC6062 Precision CMOS Dual Micropower Operational Amplifier
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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