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1
May, 2013
DS2579 Rev. A 05/13
HI-2579, HI-2581
3.3V MIL-STD-1553/1760 Dual Transceiver
with Integrated Transformers
PIN CONFIGURATION (TOP)
HI-2579CLIF
HI-2579CLTF
HI-2581CLIF
HI-2581CLTF
TXA - 3
VDDA - 5
VDDB - 8
RXENA - 6
RXENB - 9
GNDA - 7
GNDB - 10
BUSA - 2
BUSA - 1
DNC - 12
DNC - 11
TXA - 4
24 - DNC
22 - TXINHA
17 - TXINHB
16 - RXB
18 - TXB
23 - DNC
13 - BUSB
14 - BUSB
21 - RXA
20 - RXA
19 - TXB
15 - RXB
DNC = Do Not Connect
GENERAL DESCRIPTION
The HI-2579 / HI-2581 are low power CMOS dual
transceivers with integrated transformers designed
to meet the requirements of the MIL-STD-1553 /
MIL-STD-1760 specications. The dual transceivers with
integrated transformers provide a single part solution for
interfacing a protocol IC or FPGA to a dual redundant
MIL-STD-1553 bus.
The transmitter section of each bus takes complementary
CMOS / TTL Manchester II bi-phase data and converts it
to differential voltages suitable for driving the integrated
isolation transformer. Separate transmitter inhibit control
signals are provided for each transmitter.
The receiver section of the each bus converts the 1553
bus differential data to complementary CMOS / TTL data
suitable for inputting to a Manchester decoder. Each
receiver has a separate enable input which can be used
to force both receiver outputs to logic “0” (HI-2579) or
logic 1 (HI-2581).
The family of parts are available in Industrial -40oC to
+85oC, or Extended, -55oC to +125oC temperature
ranges.
FEATURES
Dual-redundant MIL-STD-1553 transceivers with
integrated transformers
Small footprint package
Compliant to MIL-STD-1553A and B,
MIL-STD-1760, ARINC 708A
3.3V single supply operation
Less than 1.0W maximum power dissipation
Industrial and extended temperature ranges
HI-2579, HI-2581
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BLOCK DIAGRAM
TXA/B
TXA/B
TXINHA/B
RXA/B
RXA/B
RXENA/B
Each Bus
Not Used
Not Used
BUSA/B
BUSA/B
Comparator
Transmit
Logic
Slope
Control
Input
Filter
Receive
Logic
GND
VDD
Isolation
Transformer
Figure 1. Block Diagram
TXA/B
TXA/B
BUSA/B - BUSA/B
RXA/B (HI-2579)
RXA/B (HI-2579)
RXA/B (HI-2581)
RXA/B (HI-2581)
Vin
(Line to Line)
tDR tDR tDR
tRG
tRG
tRG
tRG
tDR
Figure 2. Example Waveforms
HI-2579, HI-2581
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PIN DESCRIPTIONS
Table 1. Pin Descriptions
Pin Symbol Function Description
1BUSA Analog O/P MIL-STD-1553 Bus A driver, negative signal (Transformer coupled or direct
coupled bus connections)
2BUSA Analog O/P MIL-STD-1553 Bus A driver, positive signal (Transformer coupled or direct
coupled bus connections)
3TXA Digital I/P Transmitter A digital data input, non-inverted
4TXA Digital I/P Transmitter A digital data input, inverted
5VDDA Power Transceiver A 3.3V supply
6RXENA Digital I/P Receiver A enable. If low, forces both RXA and RXA low (HI-2579) or High
(HI-2581)
7GNDA Power Transceiver A ground connection
8VDDB Power Transceiver B 3.3V supply
9RXENB Digital I/P Receiver B enable. If low, forces both RXB and RXB low (HI-2579) or High
(HI-2581)
10 GNDB Power Transceiver B ground connection
11 DNC Not Used. Do Not Connect.
12 DNC Not Used. Do Not Connect.
13 BUSB Analog O/P MIL-STD-1553 Bus B driver, positive signal (Transformer coupled or direct
coupled bus connections)
14 BUSB Analog O/P MIL-STD-1553 Bus B driver, negative signal (Transformer coupled or direct
coupled bus connections)
15 RXB Digital I/P Receiver B output, inverted
16 RXB Digital I/P Receiver B output, non-inverted
17 TXINHB Digital I/P Transmit inhibit, Bus B. If high BUSB, BUSB outputs are disabled
18 TXB Digital I/P Transmitter B digital data input, non-inverted
19 TXB Power Transmitter B digital data input, inverted
20 RXA Power Receiver A output, inverted
21 RXA Digital I/P Receiver A output, non-inverted
22 TXINHA Digital I/P Transmit inhibit, Bus A. If high BUSA, BUSA outputs are disabled
23 DNC Not Used. Do Not Connect.
24 DNC Not Used. Do Not Connect.
HI-2579, HI-2581
HOLT INTEGRATED CIRCUITS
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FUNCTIONAL DESCRIPTION
The HI-2579 family of data bus transceivers contains
differential voltage source drivers, differential receivers
and integrated transformers. They are intended for
applications using a MIL-STD-1553 A/B data bus.
Transmitter
Data is input to the device’s transmitter section from
the complementary CMOS inputs TXA/B and TXA/B.
The transmitter accepts Manchester II bi-phase data
and converts it to differential voltages which drive the
internal transformers on BUSA/B and BUSA/B. The
transformer outputs are either direct or transformer
coupled to the MIL-STD-1553 data bus. Both coupling
methods produce a nominal voltage on the main bus of
7.5 volts peak to peak.
The transmitter is automatically inhibited and placed in
the high impedance state when both TXA/B and TXA/B
are either at a logic “1” or logic “0” simultaneously. A logic
“1” applied to the TXINHA/B input forces the transmitter
to the high impedance state, regardless of the state of
TXA/B and TXA/B.
Receiver
The receiver accepts bi-phase differential data from
the MIL-STD-1553 bus through the same direct or
transformer coupled interface as the transmitter. The
receivers differential input stage includes a lter and
threshold comparator that produces CMOS data at the
RXA/B and RXA/B output pins. When the MIL-STD-1553
bus is idle and RXENA or RXENB are high, RXA/B will
be logic “0” on HI-2579 and logic “1” on HI-2581.
Each set of receiver outputs can also be independently
forced to the bus idle state (logic “0” on HI-2579 or logic
“1” on HI-2581) by setting RXENA or RXENB low.
MIL-STD-1553 Bus Interface
There are two ways of connecting to the MIL-STD-1553
bus, using a direct coupled interface or a transformer
coupled interface (see Figure 3).
A direct coupled interface uses the internal 1:2.5 ratio
isolation transformer and two 55Ω isolation resistors
between the transformer and the bus.
In a transformer coupled interface, the transceiver is
connected to the internal 1:2.5 isolation transformer
which in turn is connected to a 1:1.4 coupling transformer.
The transformer coupled method also requires two
coupling resistors equal to 75% of the bus characteristic
impedance (Zo) between the coupling transformer and
the bus. The coupling transformer and coupling resistors
are commonly integrated in a single device known as a
stub coupler.
Figure 4 and Figure 5 show test circuits for measuring
electrical characteristics of both direct and transformer
coupled interfaces respectively (see “electrical
characteristics” on the following pages) .
ABSOLUTE MAXIMUM RATINGS
Supply voltage (VDD)-0.3 V to +5 V
Logic input voltage range -0.3 V DC to +3.6 V
Receiver differential voltage 50 Vp-p
Driver peak output current +1.0 A
Power dissipation at 25°C 1.0 W
Solder Temperature 245oC max.
Junction Temperature 175oC
Storage Temperature -65oC to +150oC
RECOMMENDED OPERATING
CONDITIONS
Supply Voltage VDD 3.3V ± 5%
Temperature Range
Industrial Screening
Hi-Temp Screening
-40oC to +85oC
-55oC to +125oC
NOTE: Stresses above absolute maximum ratings or outside
recommended operating conditions may cause permanent
damage to the device. These are stress ratings only. Operation
at the limits is not recommended.
HI-2579, HI-2581
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ELECTRICAL CHARACTERISTICS
Table 2. DC Electrical Characteristics
VDD = +3.3V, GND = 0V, TA = Operating Temperature Range (unless otherwise stated)
Parameter Symbol Test Conditions Min Typ Max Units
Operating Voltage VDD 3.15 3.3 3.45 V
Total Supply Current
ICC1 Not Transmitting 417 mA
ICC2
Transmit one bus @ 50%
duty cycle 225 320 mA
ICC3
Transmit one bus @ 100%
duty cycle 425 640 mA
Power Dissipation
PD1 Not Transmitting 0.06 W
PD2
Transmit one bus @ 100%
duty cycle 0.5 1.0 W
Min. Input Voltage (HI) VIH Digital Inputs 70% VDD
Max. Input Voltage (LO) VIL Digital Inputs 30% VDD
Min. Input Current (HI) IIH Digital Inputs 20 μA
Max. Input Current (LO) IIL Digital Inputs -20 μA
Min. Output Voltage (HI) VOH
IOUT = -1.0mA, Digital Out-
puts 90% VDD
Max. Output Voltage (LO) VOL
IOUT = +1.0mA, Digital
Outputs 10% VDD
RECEIVER (MeasuredatPoint“AD”inFigure2unlessotherwisespecied)
Input Resistance RIN Differential 2
Input Capacitance CIN Differential 5pF
Common Mode Rejection Ratio CMRR 45 dB
Input Common Mode Voltage VICM -10.0 +10.0 V-pk
Threshold Voltage - Direct
Coupled
Detect VTHD 1MHz Sine Wave
(measured at point “AD” in
Figure 4)
0.86 Vp-p
No Detect VTHND 0.28 Vp-p
Threshold Voltage - Transformer
Coupled
Detect VTHD 1MHz Sine Wave
(measured at point “AT” in
Figure 5)
0.86 Vp-p
No Detect VTHND 0.20 Vp-p
HI-2579, HI-2581
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Parameter Symbol Test Conditions Min Typ Max Units
TRANSMITTER(MeasuredatPoint“AD”inFigure2unlessotherwisespecied)
Output Voltage
Direct
Coupled VOUT
35Ω Load (measured at
point “AD” in Figure 4)6.1 9.0 Vp-p
Transformer
Coupled VOUT
70Ω Load (measured at
point “AT” in Figure 5)20.0 27.0 Vp-p
Output Noise VON Differential, Inhibited 10 mVp-p
Output Dynamic Offset Voltage
Direct
Coupled VDYN
35Ω Load (measured at
point “AD” in Figure 4)-90 +90 mV
Transformer
Coupled VDYN
70Ω Load (measured at
point “AT” in Figure 5)-250 +250 mV
Output Capacitance COUT 1MHz Sine Wave 15 pF
Table 3. AC Electrical Characteristics
VDD = +3.3V, GND = 0V, TA = Operating Temperature Range (unless otherwise stated)
Parameter Symbol Test Conditions Min Typ Max Units
RECEIVER (Measured at Point “AT” in Figure 3)
Receiver Delay tDR
From input zero crossing to
RXA/B or RXA/B
450
Note 3 ns
Receiver Gap Time tRG
Spacing between RXA/B
and RXA/B pulses
90
Note 1
365
Note 3 ns
Receiver Enable Delay tREN
From RXENA/B rising or
falling edge to RXA/B or
RXA/B
40 ns
TRANSMITTER (Measured at Point “AD” in Figure 2)
Driver Delay tDT
TXA/B, TXA/B to BUSA/B,
BUSA/B 150 ns
Rise Time tr35Ω Load 100 300 ns
Fall Time tf35Ω Load 100 300 ns
Inhibit Delay
tDI-H Inhibited Output 100 ns
tDI-L Active Output 150 ns
Note 1. Measured using a 1 MHz sinusoid, 20 V peak to peak, line to line at point “AT” (Guaranteed but not tested).
Note 2. Measured using a 1 MHz sinusoid, 860 mV peak to peak, line to line at point “AT” (100% tested).
Note 3. Measured using a 1 MHz sinusoid, 860 mV peak to peak, line to line at point “AT”. Measured from input zero crossing point.
HI-2579, HI-2581
HOLT INTEGRATED CIRCUITS
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BUSB
BUSB
BUSA
BUSA
Transceiver A
Transceiver B
HI-2579
55Ω
55Ω
Isolation
Transformer
1:2.5
Isolation
Transformer
1:2.5
MIL-STD-1553
BUS A
(Direct Coupled)
MIL-STD-1553
BUS B
(Transformer Coupled)
MIL-STD-1553
Stub Coupler
52.5Ω
52.5Ω
1:1.4
Figure 3. Bus Connections Example using HI-2579
TXA/B
TXA/B
RXA/B
RXA/B
Each Bus
BUSA/B
BUSA/B
GND
VDD
Isolation
Transformer
HI-2579
MIL-STD-1553
Transceiver
55Ω
35Ω
55Ω
Point
“AD”
Figure 4. Direct Coupled Test Circuit
TXA/B
TXA/B
RXA/B
RXA/B
Each Bus
BUSA/B
BUSA/B
GND
VDD
Isolation
Transformer
HI-2579
MIL-STD-1553
Transceiver 70Ω
Point
“AT”
Figure 5. Transformer Coupled Test Circuit
HI-2579, HI-2581
HOLT INTEGRATED CIRCUITS
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ORDERING INFORMATION
PART NUMBER LEAD FINISH
FPb-free, RoHS compliant
PART NUMBER TEMPERATURE RANGE FLOW LEAD
FINISH
I-40oC to +85oC I Gold
T-55oC to +125oC T Gold
PART NUMBER
RXENA = 0 RXENB = 0
RXA RXA RXB RXB
2579 0000
2581 1111
HI - 25xx CL x F
HI-2579, HI-2581
HOLT INTEGRATED CIRCUITS
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REVISION HISTORY
Revision Date Description of Change
DS2579, Rev. New 10/8/12 Initial Release
Rev. A 5/23/13 Correct Note 1 on package dimensions to state that the Heatsink pad is connected
internally to ground.
HI-2579, HI-2581
HOLT INTEGRATED CIRCUITS
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PACKAGE DIMENSIONS
Bottom View Dimensions in inches (mm)
.660 ± .007
(16.76 ± .18)
.218
(5.54) .044 SQ.
(1.12 SQ.)
R.017
(R.43)
2X
.080
(2.03)
.080
(2.03)
.060
(1.52)
.025
(.64)
.183
(4.65)
24X
R.008
(R.20)
.600 ± .007
(15.24 ± .18)
.510 ± .007
(12.95 ± .18)
.050
(1.27)
PIN 1 INDEX
TYP.
24X
6X
23X
24X
Notes:
1. Heatsink pad is internally connected to device GND pins. Connection to external GND for heat extraction is not necessary.
2. The “keep out” zones (crosshatched) enclose test pads for the transformer primary windings. DO NOT CONNECT.
3. Routing traces under test pads is not recommended.
HI-2579, HI-2581
HOLT INTEGRATED CIRCUITS
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PACKAGE DIMENSIONS
PIN 1 INDEX
IN TOPMARK
.800 ± .015
(20.32 ± .38)
.440 ± .015
(11.18 ± .38)
.300 ± .005
(7.62 ± .13)
.370 ± .011
(9.40 ± .28)
.070 ± .007
(1.78 ± .18)
.004
(.10)
.005
(.13) max.
Top View Dimensions in inches (mm)