HI-2579, HI-2581 May, 2013 3.3V MIL-STD-1553/1760 Dual Transceiver with Integrated Transformers GENERAL DESCRIPTION PIN CONFIGURATION (TOP) The HI-2579 / HI-2581 are low power CMOS dual transceivers with integrated transformers designed to meet the requirements of the MIL-STD-1553 / MIL-STD-1760 specifications. The dual transceivers with integrated transformers provide a single part solution for interfacing a protocol IC or FPGA to a dual redundant MIL-STD-1553 bus. The transmitter section of each bus takes complementary CMOS / TTL Manchester II bi-phase data and converts it to differential voltages suitable for driving the integrated isolation transformer. Separate transmitter inhibit control signals are provided for each transmitter. The receiver section of the each bus converts the 1553 bus differential data to complementary CMOS / TTL data suitable for inputting to a Manchester decoder. Each receiver has a separate enable input which can be used to force both receiver outputs to logic "0" (HI-2579) or logic 1 (HI-2581). BUSA - 1 24 - DNC BUSA - 2 23 - DNC TXA - 3 TXA - 4 VDDA - 5 RXENA - 6 GNDA - 7 VDDB - 8 RXENB - 9 HI-2579CLIF HI-2579CLTF HI-2581CLIF HI-2581CLTF GNDB - 10 22 - TXINHA 21 - RXA 20 - RXA 19 - TXB 18 - TXB 17 - TXINHB 16 - RXB 15 - RXB DNC - 11 14 - BUSB DNC - 12 13 - BUSB DNC = Do Not Connect o The family of parts are available in Industrial -40 C to o o o +85 C, or Extended, -55 C to +125 C temperature ranges. FEATURES * Dual-redundant MIL-STD-1553 transceivers with integrated transformers * Small footprint package * Compliant to MIL-STD-1553A and B, MIL-STD-1760, ARINC 708A * 3.3V single supply operation * Less than 1.0W maximum power dissipation * Industrial and extended temperature ranges DS2579 Rev. A HOLT INTEGRATED CIRCUITS www.holtic.com 1 05/13 HI-2579, HI-2581 BLOCK DIAGRAM VDD Each Bus Isolation Transformer TXA/B Transmit Logic TXA/B Slope Control BUSA/B Not Used Not Used BUSA/B TXINHA/B RXA/B Receive Logic RXA/B Input Filter Comparator RXENA/B GND Figure 1. Block Diagram TXA/B TXA/B BUSA/B - BUSA/B Vin (Line to Line) tDR tDR tDR RXA/B (HI-2579) tRG tRG tRG tRG RXA/B (HI-2579) RXA/B (HI-2581) RXA/B (HI-2581) Figure 2. Example Waveforms HOLT INTEGRATED CIRCUITS 2 tDR HI-2579, HI-2581 PIN DESCRIPTIONS Table 1. Pin Descriptions Pin Symbol Function Description 1 BUSA Analog O/P MIL-STD-1553 Bus A driver, negative signal (Transformer coupled or direct coupled bus connections) 2 BUSA Analog O/P MIL-STD-1553 Bus A driver, positive signal (Transformer coupled or direct coupled bus connections) 3 TXA Digital I/P Transmitter A digital data input, non-inverted 4 TXA Digital I/P Transmitter A digital data input, inverted 5 VDDA Power 6 RXENA Digital I/P 7 GNDA Power Transceiver A ground connection 8 VDDB Power Transceiver B 3.3V supply 9 RXENB Digital I/P 10 GNDB Power 11 DNC - Not Used. Do Not Connect. 12 DNC - Not Used. Do Not Connect. 13 BUSB Analog O/P MIL-STD-1553 Bus B driver, positive signal (Transformer coupled or direct coupled bus connections) 14 BUSB Analog O/P MIL-STD-1553 Bus B driver, negative signal (Transformer coupled or direct coupled bus connections) 15 RXB Digital I/P Receiver B output, inverted 16 RXB Digital I/P Receiver B output, non-inverted 17 TXINHB Digital I/P Transmit inhibit, Bus B. If high BUSB, BUSB outputs are disabled 18 TXB Digital I/P Transmitter B digital data input, non-inverted 19 TXB Power Transmitter B digital data input, inverted 20 RXA Power Receiver A output, inverted 21 RXA Digital I/P Receiver A output, non-inverted 22 TXINHA Digital I/P Transmit inhibit, Bus A. If high BUSA, BUSA outputs are disabled 23 DNC - Not Used. Do Not Connect. 24 DNC - Not Used. Do Not Connect. Transceiver A 3.3V supply Receiver A enable. If low, forces both RXA and RXA low (HI-2579) or High (HI-2581) Receiver B enable. If low, forces both RXB and RXB low (HI-2579) or High (HI-2581) Transceiver B ground connection HOLT INTEGRATED CIRCUITS 3 HI-2579, HI-2581 FUNCTIONAL DESCRIPTION The HI-2579 family of data bus transceivers contains differential voltage source drivers, differential receivers and integrated transformers. They are intended for applications using a MIL-STD-1553 A/B data bus. Transmitter threshold comparator that produces CMOS data at the RXA/B and RXA/B output pins. When the MIL-STD-1553 bus is idle and RXENA or RXENB are high, RXA/B will be logic "0" on HI-2579 and logic "1" on HI-2581. Each set of receiver outputs can also be independently forced to the bus idle state (logic "0" on HI-2579 or logic "1" on HI-2581) by setting RXENA or RXENB low. Data is input to the device's transmitter section from the complementary CMOS inputs TXA/B and TXA/B. The transmitter accepts Manchester II bi-phase data and converts it to differential voltages which drive the internal transformers on BUSA/B and BUSA/B. The transformer outputs are either direct or transformer coupled to the MIL-STD-1553 data bus. Both coupling methods produce a nominal voltage on the main bus of 7.5 volts peak to peak. MIL-STD-1553 Bus Interface The transmitter is automatically inhibited and placed in the high impedance state when both TXA/B and TXA/B are either at a logic "1" or logic "0" simultaneously. A logic "1" applied to the TXINHA/B input forces the transmitter to the high impedance state, regardless of the state of TXA/B and TXA/B. Receiver In a transformer coupled interface, the transceiver is connected to the internal 1:2.5 isolation transformer which in turn is connected to a 1:1.4 coupling transformer. The transformer coupled method also requires two coupling resistors equal to 75% of the bus characteristic impedance (Zo) between the coupling transformer and the bus. The coupling transformer and coupling resistors are commonly integrated in a single device known as a stub coupler. The receiver accepts bi-phase differential data from the MIL-STD-1553 bus through the same direct or transformer coupled interface as the transmitter. The receiver's differential input stage includes a filter and Figure 4 and Figure 5 show test circuits for measuring electrical characteristics of both direct and transformer coupled interfaces respectively (see "electrical characteristics" on the following pages) . ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS Supply voltage (VDD) Logic input voltage range -0.3 V to +5 V -0.3 V DC to +3.6 V Receiver differential voltage 50 Vp-p Driver peak output current +1.0 A Power dissipation at 25C 1.0 W Solder Temperature Junction Temperature Storage Temperature 245 C max. o o A direct coupled interface uses the internal 1:2.5 ratio isolation transformer and two 55 isolation resistors between the transformer and the bus. Supply Voltage VDD 3.3V 5% Temperature Range o 175 C There are two ways of connecting to the MIL-STD-1553 bus, using a direct coupled interface or a transformer coupled interface (see Figure 3). o -65 C to +150 C o o Industrial Screening -40 C to +85 C Hi-Temp Screening -55 C to +125 C o o NOTE: Stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. These are stress ratings only. Operation at the limits is not recommended. HOLT INTEGRATED CIRCUITS 4 HI-2579, HI-2581 ELECTRICAL CHARACTERISTICS Table 2. DC Electrical Characteristics VDD = +3.3V, GND = 0V, TA = Operating Temperature Range (unless otherwise stated) Parameter Symbol Operating Voltage Test Conditions VDD Min Typ Max Units 3.15 3.3 3.45 V ICC1 Not Transmitting 4 17 mA ICC2 Transmit one bus @ 50% duty cycle 225 320 mA ICC3 Transmit one bus @ 100% duty cycle 425 640 mA PD1 Not Transmitting 0.06 W PD2 Transmit one bus @ 100% duty cycle 1.0 W Min. Input Voltage (HI) VIH Digital Inputs Max. Input Voltage (LO) VIL Digital Inputs 30% VDD Min. Input Current (HI) IIH Digital Inputs 20 A Max. Input Current (LO) IIL Digital Inputs -20 A VOH IOUT = -1.0mA, Digital Outputs 90% VDD VOL IOUT = +1.0mA, Digital Outputs Total Supply Current Power Dissipation Min. Output Voltage (HI) Max. Output Voltage (LO) RECEIVER 0.5 70% VDD 10% VDD (Measured at Point "AD" in Figure 2 unless otherwise specified) Input Resistance RIN Differential Input Capacitance CIN Differential Common Mode Rejection Ratio Input Common Mode Voltage Threshold Voltage - Direct Coupled Threshold Voltage - Transformer Coupled 2 5 CMRR 45 VICM -10.0 Detect VTHD No Detect VTHND Detect VTHD No Detect VTHND 1MHz Sine Wave (measured at point "AD" in Figure 4) 0.86 1MHz Sine Wave (measured at point "AT" in Figure 5) 0.86 HOLT INTEGRATED CIRCUITS 5 k pF dB +10.0 V-pk Vp-p 0.28 Vp-p Vp-p 0.20 Vp-p HI-2579, HI-2581 Parameter Symbol Test Conditions Min Typ Max Units TRANSMITTER (Measured at Point "AD" in Figure 2 unless otherwise specified) Output Voltage Direct Coupled VOUT 35 Load (measured at point "AD" in Figure 4) 6.1 9.0 Vp-p Transformer Coupled VOUT 70 Load (measured at point "AT" in Figure 5) 20.0 27.0 Vp-p VON Differential, Inhibited 10 mVp-p Direct Coupled VDYN 35 Load (measured at point "AD" in Figure 4) -90 +90 mV Transformer Coupled VDYN 70 Load (measured at point "AT" in Figure 5) -250 +250 mV COUT 1MHz Sine Wave 15 pF Max Units Output Noise Output Dynamic Offset Voltage Output Capacitance Table 3. AC Electrical Characteristics VDD = +3.3V, GND = 0V, TA = Operating Temperature Range (unless otherwise stated) Parameter Symbol Test Conditions Min Typ RECEIVER (Measured at Point "AT" in Figure 3) Receiver Delay tDR From input zero crossing to RXA/B or RXA/B Receiver Gap Time tRG Spacing between RXA/B and RXA/B pulses Receiver Enable Delay tREN From RXENA/B rising or falling edge to RXA/B or RXA/B 40 ns 150 ns 450 Note 3 90 Note 1 365 Note 3 ns ns TRANSMITTER (Measured at Point "AD" in Figure 2) Driver Delay tDT TXA/B, TXA/B to BUSA/B, BUSA/B Rise Time tr 35 Load 100 300 ns Fall Time tf 35 Load 100 300 ns tDI-H Inhibited Output 100 ns tDI-L Active Output 150 ns Inhibit Delay Note 1. Measured using a 1 MHz sinusoid, 20 V peak to peak, line to line at point "AT" (Guaranteed but not tested). Note 2. Measured using a 1 MHz sinusoid, 860 mV peak to peak, line to line at point "AT" (100% tested). Note 3. Measured using a 1 MHz sinusoid, 860 mV peak to peak, line to line at point "AT". Measured from input zero crossing point. HOLT INTEGRATED CIRCUITS 6 HI-2579, HI-2581 MIL-STD-1553 BUS A (Direct Coupled) Isolation Transformer BUSA 55 BUSA 55 Transceiver A MIL-STD-1553 BUS B (Transformer Coupled) 1:2.5 MIL-STD-1553 Stub Coupler Isolation Transformer 52.5 BUSB Transceiver B BUSB 52.5 1:2.5 1:1.4 HI-2579 Figure 3. Bus Connections Example using HI-2579 VDD Isolation Transformer TXA/B TXA/B RXA/B Each Bus BUSA/B 55 MIL-STD-1553 Transceiver 35 RXA/B BUSA/B 55 HI-2579 Point "AD" GND Figure 4. Direct Coupled Test Circuit VDD Isolation Transformer TXA/B TXA/B RXA/B Each Bus BUSA/B MIL-STD-1553 Transceiver 70 RXA/B BUSA/B HI-2579 GND Figure 5. Transformer Coupled Test Circuit HOLT INTEGRATED CIRCUITS 7 Point "AT" HI-2579, HI-2581 ORDERING INFORMATION HI - 25xx CL x F PART NUMBER LEAD FINISH F Pb-free, RoHS compliant PART NUMBER TEMPERATURE RANGE FLOW LEAD FINISH I -40oC to +85oC I Gold T -55oC to +125oC T Gold PART NUMBER RXENA = 0 RXENB = 0 RXA RXA RXB RXB 2579 0 0 0 0 2581 1 1 1 1 HOLT INTEGRATED CIRCUITS 8 HI-2579, HI-2581 REVISION HISTORY Revision DS2579, Date Description of Change Rev. New 10/8/12 Initial Release Rev. A 5/23/13 Correct Note 1 on package dimensions to state that the Heatsink pad is connected internally to ground. HOLT INTEGRATED CIRCUITS 9 HI-2579, HI-2581 PACKAGE DIMENSIONS Bottom View Dimensions in inches (mm) .660 .007 (16.76 .18) .218 (5.54) .060 TYP. (1.52) R.017 24X (R.43) 23X .050 (1.27) 24X R.008 (R.20) PIN 1 INDEX .510 .007 (12.95 .18) .080 (2.03) 2X .080 (2.03) .025 (.64) .183 (4.65) 24X .044 SQ. 6X (1.12 SQ.) .600 .007 (15.24 .18) Notes: 1. Heatsink pad is internally connected to device GND pins. Connection to external GND for heat extraction is not necessary. 2. The "keep out" zones (crosshatched) enclose test pads for the transformer primary windings. DO NOT CONNECT. 3. Routing traces under test pads is not recommended. HOLT INTEGRATED CIRCUITS 10 HI-2579, HI-2581 PACKAGE DIMENSIONS Top View Dimensions in inches (mm) .440 .015 (11.18 .38) .800 .015 (20.32 .38) .005 max. (.13) .370 .011 (9.40 .28) .300 .005 (7.62 .13) PIN 1 INDEX IN TOPMARK .004 (.10) .070 .007 (1.78 .18) HOLT INTEGRATED CIRCUITS 11