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To all our customers
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contained therein.
HD74CBT32160C
16-bit to 32-bit Demux PCI Hot-plug Bus Switch
ADE-205-673 (Z)
Preliminary
Rev. 0
Feb. 2002
Description
The HD74CBT32160C device provides 16-bit to 32-bit demux PCI Hot-plug bus switching. The low on
state resistance of the switch allows connections to be made with minimal propagation delay. Select
control (SEL1, SEL2) inputs, select the appropriate B1 and B2 outputs for the A-input data.
Features
Minimal propagation delay through the switch.
5 switch connection between two ports.
Pullup on B1 and B2 ports.
TTL-compatible input levels.
Ultra low quiescent power.
-Ideally suited for notebook applications.
Package type
Product code example: HD74CBT32160CTEL
Package type Package code Package suffix Taping code
TSSOP-56pin TTP-56DAV T EL (1,000 pcs / Reel)
Function Table
Inputs
SEL1 SEL2 Function
L H nA to nB1
H L nA to nB2
L L nA to nB1 and nB2
H H nB1, nB2 = VBIAS
H: High level
L: Low level
HD74CBT32160C
Rev.0, Feb. 2002, page 2 of 2
Pin Arrangement
(Top view)
1
2
3
4
5
6
7
8
9
10
1B1
2B1
2A
3B1
4B1
4A
5B1
6B1
6A
7B1
8B1
8A
GND
Vcc
9B1
10B1
11B1
12B1
12A
13B1
14B1
15B1
14A
11
12
13
14
15
16
17
18
19
20
21
22
23
24 33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
15A
14B2
13A
13B2
16B1
16A
SEL1
VBIAS1
25
26
27
28 29
30
31
32
SEL2
VBIAS2
15B2
16B2
12B2
11B2
10B2
9B2
9A
Vcc
GND
8B2
7B2
7A
6B2
5B2
4B2
5A
3B2
2B2
3A
1B2
11A
10A
1A
HD74CBT32160C
Rev.0, Feb. 2002, page 3 of 3
Absolute Maximum Ratings
Item Symbol Ratings Unit Conditions
Supply voltage range VCC 0.5 to 7.0 V
Input voltage range *1 V
I 0.5 to 7.0 V
Input clamp current IIK 50 mA VI < 0
Continuous output current IO 128 mA VO = 0 to VCC
Continuous current through
VCC or GND
ICC or IGND ±100 mA
Maximum power dissipation
at Ta = 25°C (in still air) *2
PT 1.32 W
Storage temperature Tstg 65 to 150 °C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current
ratings are observed.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Recommended Operating Conditions
Item Symbol Min Max Unit Conditions
VCC 4.5 5.5 Supply voltage range
VBIAS 1.3 VCC
V
Input voltage range VI 0 5.5 V
Output voltage range VI/O 0 5.5 V
Input transition rise or fall rate t / v 0 5 ns / V VCC = 4.5 to 5.5 V
Operating free-air temperature Ta 40 85 °C
Note: Unused or floating inputs must be held high or low.
HD74CBT32160C
Rev.0, Feb. 2002, page 4 of 4
Logic Diagram
1A 1B1
1B2
SEL1
SEL2
16A 16B1
16B2
VBIAS2
VBIAS2
VBIAS1
VBIAS1
HD74CBT32160C
Rev.0, Feb. 2002, page 5 of 5
DC Electrical Characteristics
(Ta = 40 to 85°C)
Item Symbol VCC (V) Min Typ *1 Max Unit Test conditions
Clamp diode voltage VIK 4.5 1.2 V IIN = 18 mA
Input voltage VIH 4.0 to 5.5 2.0 V
V
IL 4.0 to 5.5 0.8
On-state switch
resistance *2
RON 4.5 5 8 V
IN = 0 V,
IIN = 48 mA
4.5 10 15 VIN = 2.4 V,
IIN = 15 mA
Input current IIN 0 to 5.5 ±1.0 µA VIN = 5.5 V or GND
20 A = 5.5 V, VBIAS = 5.5 V
IOZA
1.0 A = 0 V, VBIAS = 5.5 V
±1.0
µA
B = 5.5 V, VBIAS = 5.5 V
Off-state leakage
current
IOZB
5.5
5 0.25 mA B = 0 V, VBIAS = 5.5 V
Quiescent supply
current
ICC 5.5 3 µA VIN = VCC or GND,
IO = 0 mA
Increase in ICC
per input *3
ICC 5.5 2.5 mA One input at 3.4 V,
other inputs at VCC or
GND
Notes: For condition shown as Min or Max use the appropriate values under recommended operating
conditions.
1. All typical values are at VCC = 5 V (unless otherwise noted), Ta = 25°C.
2. Measured by the voltage drop between the A and B terminals at the indicated current through the
switch. On-state resistance is determined by the lower voltage of the two (A or B) terminals.
3. This is the increase in supply current for each input that is at the specified TTL voltage level
rather than VCC or GND.
Capacitance
(Ta = 25°C)
Item Symbol VCC (V) Min Typ Max Unit Test conditions
Control input
capacitance
CIN 5.0 5 pF VIN = 0 or 3 V
A port 10 Input / output
capacitance B port
CI/O (OFF) 5.0
7
pF VO = 0 or 3 V
SEL1, SEL2 = VCC
Note: This parameter is determined by device characterization is not production tested.
HD74CBT32160C
Rev.0, Feb. 2002, page 6 of 6
Switching Characteristics
(Ta = 40 to 85°C)
VCC = 5.0±0.5 V, VBIAS = VCC
Item
Symbol
Min
Max
Unit
Test
conditions
FROM
(Input)
TO
(Output)
Propagation delay
time *1
tPLH
tPHL
0.25 ns CL = 50 pF
RL = 500
A or B B or A
Enable time tZH
tZL
2.0 7.0 ns CL = 50 pF
RL = 500
SEL A or B
tHZ 2.0 6.0 Disable time
tLZ 2.0 7.0
ns CL = 50 pF
RL = 500
SEL A or B
Notes: 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the
switch and the specified load capacitance, when driven by an ideal voltage source (zero output
impedance).
Test Circuit
OPEN
S1
CL = 50 pF
*1
500
Load circuit for outputs
Symbol
t / t
PLH PHL
t / t
ZH HZ
t / t
ZL LZ
S1
OPEN
OPEN
7 V
500
See under table
GND
Note: 1. CL includes probe and jig capacitance.
HD74CBT32160C
Rev.0, Feb. 2002, page 7 of 7
Waveforms – 1
Input
10 %
1.5 V 1.5 V
90 %
tr
90 % 3 V
GND
10 %
tf
Output 1.5 V 1.5 V
tPLH
V
tPHL
OH
VOL
Waveforms – 2
Waveform - B
Notes: 1. All input pulses are supplied by generators having the following characteristics :
PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns.
2. Waveform - A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Waveform - A
VOH
VOL
V + 0.3 V
OL
V - 0.3 V
OH
Output
Control 10 % 10 %
1.5 V 1.5 V
90 %
tf
90 % 3 V
3.5 V
GND
GND
tr
1.5 V
1.5 V
tHZ
tLZ
tZH
tZL
HD74CBT32160C
Rev.0, Feb. 2002, page 8 of 8
Package Dimensions
Hitachi Code
JEDEC
JEITA
Mass
(reference value)
TTP-56DAV
0.32 g
*Pd plating
0.08
M
0.10
*0.15 ± 0.05
8.10 ± 0.20
0.50 ± 0.1
0.65 Max
128
2956
14.0
6.10
0˚ – 8˚
0.50
1.20 Max
0.10 ± 0.05
14.2 Max
1.0
*0.19 ± 0.05
As of July, 2001
Unit: mm
HD74CBT32160C
Rev.0, Feb. 2002, page 9 of 9
Disclaimer
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copyright, trademark, or other intellectual property rights for information contained in this document.
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intellectual property rights, in connection with use of the information contained in this document.
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of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
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5. This product is not designed to be radiation resistant.
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