Low Power JFET Input
Operational Amplifiers
These JFET input operational amplifiers are designed for low power
applications. They feature high input impedance, low input bias current and
low input offset current. Advanced design techniques allow for higher slew
rates, gain bandwidth products and output swing. The LF441C device
provides for the external null adjustment of input offset voltage.
These devices are specified over the commercial temperature range. All
are available in plastic dual in–line and SOIC packages.
Low Supply Current: 200 µA/Amplifier
Low Input Bias Current: 5.0 pA
High Gain Bandwidth: 2.0 MHz
High Slew Rate: 6.0 V/µs
High Input Impedance: 1012
Large Output Voltage Swing: ±14 V
Output Short Circuit Protection
Representative Schematic Diagram
(Each Amplifier)
1
5
VEE
LF441C input offset voltage
null adjust circuit
100 k
1.5 k
15
**
Inputs
J1 J2
R1 R2
R3 R4
Q1 Q2
Q3 Q4
Q5
R5
C1
C2
Q6
D1
Q7
D2
VEE
Output
VCC
*Null adjustment pins for LF441 only.
+
+
ORDERING INFORMATION
Device Function Operating
Temperature Range Package
LF441CD
LF441CN Single SO–8
Plastic DIP
LF442CD
LF442CN Dual TA = 0° to +70°CSO–8
Plastic DIP
LF444CD
LF444CN Quad SO–14
Plastic DIP
ON Semiconductor
Semiconductor Components Industries, LLC, 2002
March, 2002 – Rev. 1 1Publication Order Number:
LF441C/D
LF441C
LF442C
LF444C
SEMICONDUCTOR
TECHNICAL DATA
LOW POWER
JFET INPUT
OPERATIONAL AMPLIFIERS
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
N SUFFIX
PLASTIC PACKAGE
CASE 626
8
1
8
1
1
+
Offset Null
Inputs
VEE
(Single, Top View)
NC
VCC
Output
Offset Null
Output 1
Inputs 1
VEE
(Dual, Top View)
Inputs 2
Output 2
VCC
1
2
3
4
8
7
6
5
+
-
+
2
1
2
3
4
8
7
6
5
PIN CONNECTIONS
D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO–14)
N SUFFIX
PLASTIC PACKAGE
CASE 646
Output 1
Inputs 1
VCC
Inputs 2
Output 2
Output 4
Inputs 4
VEE
Inputs 3
Output 3
(Quad, Top View)
1
2
3
4
5
6
78
9
10
11
12
13
14
4
23
++
++
1
14
1
14
1
--
--
PIN CONNECTIONS
LF441C LF442C LF444C
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2
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (from VCC to VEE) VS+36 V
Input Differential Voltage Range (Note 1) VIDR ±30 V
Input Voltage Range (Notes 1 and 2) VIR ±15 V
Output Short Circuit Duration (Note 3) tSC Indefinite sec
Operating Junction Temperature (Note 3) TJ+150 °C
Storage Temperature Range Tstg –60 to +150 °C
NOTES: 1.Differential voltages are at the noninverting input terminal with respect to the inverting
input terminal.
2.The magnitude of the input voltage must never exceed the magnitude of the supply
or 15 V, whichever is less.
3.Power dissipation must be considered to ensure maximum junction temperature (TJ)
is not exceeded (see Figure 1).
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 0° to 70°C, unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
Input Offset Voltage (RS = 10 k, VO = 0 V) VIO mV
Single: TA = +25°C 3.0 5.0
TA = 0° to +70°C 7.5
Dual: TA = +25°C 3.0 5.0
TA = 0° to +70°C 7.5
Quad: TA = +25°C 3.0 10
TA = 0° to +70°C 12
Average Temperature Coefficient of Offset Voltage VIO/T 10 µV/°C
(RS = 10 k, VO = 0 V)
Input Offset Current (VCM = 0 V, VO = 0 V) IIO
TA = +25°C 0.5 50 pA
TA = 0° to +70°C 1.5 nA
Input Bias Current (VCM = 0 V, VO = 0 V) IIB
TA = +25°C 3.0 100 pA
TA = 0° to +70°C 3.0 nA
Common Mode Input Voltage Range (TA = +25°C) VICR
–11 +14.5
–12 +11
V
Large Signal Voltage Gain (VO = ±10 V, RL = 10 k) AVOL V/mV
TA = +25°C 25 60
TA = 0° to +70°C 15
Output Voltage Swing (RL = 10 k) VO +
VO +12
+14
–14
–12 V
Common Mode Rejection (RS 10 kΩ, VCM = VICR, VO = 0 V) CMR 70 86 dB
Power Supply Rejection (RS = 100 Ω, VCM = 0 V, VO = 0 V) PSR 70 84 dB
Power Supply Current (No Load, VO = 0 V) IDµA
Single 200 250
Dual 400 500
Quad 800 1000
LF441C LF442C LF444C
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3
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = +25°C, unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
Slew Rate (Vin = –10 V to +10 V, RL = 10 k, CL = 10 pF, AV = +1.0) SR 0.6 6.0 V/ µs
Settling Time To within 10 mV ts 1.6 µs
(AV = –1.0, RL = 10 k, VO = 0 V to +10 V) To within 1.0 mV 2.2
Gain Bandwidth Product (f = 200 kHz) GBW 0.6 2.0 MHz
Equivalent Input Noise Voltage (RS = 100 , f = 1.0 kHz) en 47 nV/ Hz
Equivalent Input Noise Current (f = 1.0 kHz) in 0.01 pA/ Hz
Input Resistance Ri 1012
Channel Separation (f = 1.0 Hz to 20 kHz) CS 120 dB
ID, SUPPLY CURRENT PER AMPLIFIER ( A)
PD,MAXIMUM POWER DISSIPATION (mW)
IIB,INPUT BIAS CURRENT (nA)
IIB, INPUT BIAS CURRENT (pA)
TA, AMBIENT TEMPERATURE (°C) VICR, INPUT COMMON MODE VOLTAGE (V)
VCC, VEE, SUPPLY VOLTAGE (V)
2400
2000
1600
1200
800
400
0
-55 -40 -20 0 20 40 60 80 100 120 140 160
TA, AMBIENT TEMPERATURE (°C)
µ
Figure 1. Maximum Power Dissipation versus
Temperature for Package Variations Figure 2. Input Bias Current versus
Input Common Mode Voltage
Figure 3. Input Bias Current versus Temperature Figure 4. Supply Current versus Supply Voltage
8 & 14 Pin Plastic
Package
SO-14
SO-8
VCC = +15 V
VEE = -15 V
TA = 25°C
20
15
10
5.0
0
1000
100
10
1.0
0.1
0.01
0.001
300
260
220
180
140
100
-10 -5.0 0 5.0 10
-55 -25 0 25 50 75 100 125 0 5.0 10 15 20 25
VCC = +15 V
VEE = -15 V
VCM = 0 V
125°C
25°C
-55°C
LF441C LF442C LF444C
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VCC = +15 V
VEE = -15 V
25°C
-55°C
125°C
+VICR,POSITIVE INPUT COMMON MODE
VOLTAGE RANGE (V)
-VICR,NEGATIVE INPUT COMMON MODE
VOLTAGE RANGE (V)
VCC, POSITIVE SUPPLY VOLTAGE (V) VEE, NEGATIVE SUPPLY VOLTAGE (V)
20
15
10
5.0
0
2015105.00
-20
-15
-10
-5.0
0
0 -5.0 -10 -15 -20
Figure 5. Positive Input Common Mode Voltage
Range versus Positive Supply Voltage Figure 6. Negative Input Common Mode Voltage
Range versus Negative Supply Voltage
Figure 7. Output Voltage versus Output
Source Current Figure 8. Output Voltage versus
Output Sink Current
Figure 9. Output Voltage Swing
versus Supply Voltage Figure 10. Output Voltage Swing
versus Load Resistance
IO, OUTPUT SOURCE CURRENT (mA) -IO, OUTPUT SINK CURRENT (mA)
VCC, VEE, SUPPLY VOLTAGE (V) RL, LOAD RESISTANCE ()
20
15
10
5.0
0
0
-20
-15
-10
-5.0
0
0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
40
35
30
25
20
15
10
5.0
0
0 2.0 4.0 6.0 8.0 10 12 14 16 1.0 k 2.0 k 3.0 k 4.0 k 6.0 k 8.0 k 10 k
28
26
24
22
20
18
16
VO, OUTPUT VOLTAGE (V)
VO, OUTPUT VOLTAGE (V)
-55°C TA 125°C -55°C TA 125°C
RL = 10 k
-55°C TA 125°C
VCC = +15 V
VEE = -15 V
TA = 25°C
VO, OUTPUT VOLTAGE SWING (Vp-p)
VO, OUTPUT VOLTAGE SWING (Vp-p)
VCC = +15 V
VEE = -15 V
125°C25°C
-55°C
LF441C LF442C LF444C
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5
Figure 11. Normalized Gain Bandwidth
Product versus Temperature Figure 12. Open Loop Voltage Gain and
Phase versus Frequency
GBW, NORMALIZED GAIN BANDWIDTH PRODUCT
AVOL, OPEN LOOP VOLTAGE GAIN (dB)
TA, AMBIENT TEMPERATURE (°C) f, FREQUENCY (MHz)
VCC = +15 V
VEE = -15 V
RL = 10 k
CL = 100 pF
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
20
10
0
-10
-20
0.1 1.0 10
90
135
180
225
270
-75 -50 -25 0 25 50 75 100 125
EXCESS PHASE (DEGREES)φ,
Phase
Gain
Figure 13. Slew Rate versus Temperature Figure 14. Total Output Distortion
versus Frequency
Figure 15. Output Voltage Swing
versus Frequency Figure 16. Open Loop Voltage
Gain versus Frequency
TA, AMBIENT TEMPERATURE (°C) f, FREQUENCY (Hz)
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
SR, SLEW RATE (V/ µs)
THD, OUTPUT DISTORTION (%)
AVOL, OPEN LOOP VOLTAGE GAIN (dB)
8.0
7.0
6.0
5.0
4.0
-75 -50 -25 0 25 50 75 100 125
30
20
10
0
1.0 k 10 k 100 k 1.0 M
100
80
60
40
20
0
0.1 1.0 10 100 1.0 k 10 k 100 k 1.0 M 10 M
2.5
2.0
1.5
1.0
0.5
0
10 100 1.0 k 10 k 100 k
VCC = +15 V
VEE = -15 V
RL = 10 k
AV = +1.0
VCC = +15 V
VEE = -15 V
TA = 25°C
AV = 10
AV = 100
VCC = +15 V
VEE = -15 V
RL = 10 k
TA = 25°C
VCC = +15 V
VEE = -15 V
RL = 10 k
AV = +1.0
1% THD
TA = 25°C
VCC = +15 V
VEE = -15 V
RL = 10 k
CL = 100 pF
TA = 25°C
VO, OUTPUT VOLTAGE SWING (Vp-p)
LF441C LF442C LF444C
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6
-PSR
Figure 17. Common Mode Rejection
versus Frequency Figure 18. Power Supply Rejection
versus Frequency
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
CMR, COMMON MODE REJECTION (dB)
PSR, POWER SUPPLY REJECTION (dB)
140
120
100
80
60
40
20
0100 1.0 k 10 k 100 k 1.0 M
140
120
100
80
60
40
20
0
100 1.0 k 10 k 100 k 1.0 M
+
VCM VO
CMR = 20 Log VCM
VO
x ADM()
ADM
VCC
VO
VEE
+PSR
(VCC = ±1.5 V)
(VEE=±1.5 V)
-
+
ADM
VCC
+PSR = 20 Log VO /ADM
VEE
-PSR = 20 Log VO /ADM
)
)
(
(
10 mV
Figure 19. Input Noise Voltage versus Frequency Figure 20. Open Loop Voltage
Gain versus Supply Voltage
Figure 21. Output Impedance versus Frequency Figure 22. Inverter Settling Time
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
VCC, VEE, SUPPLY VOLTAGE (V)
ts, SETTLING TIME (µs)
e ,
n
AVOL, OPEN LOOP VOLTAGE GAIN (V V)
ZO, OUTPUT IMPEDANCE ()
VO, OUTPUT VOLTAGE STEP FROM 0 V (V)
70
60
50
40
30
20
10
010 100 1.0 k 10 k 100 k
1.0 M
100 k
10 k 0 5.0 10 15 20 25
350
300
250
200
150
100
50
0
100 1.0k 10k 100k 1.0M
10
5.0
0
-5.0
-10
0.1 1.0 10
RL = 10 k
125°C
-55°C
10 mV
1.0 mV
INPUT NOISE VOLTAGE ( nV/ Hz
)
1.0 mV
VCC = +15 V
VEE = -15 V
VCM = 0 V
VCM = ±1.5 V
TA = 25°C
VCC = +15 V
VEE = -15 V
TA = 25°C
VCC = +15 V
VEE = -15 V
VCM = 0 V
TA = 25°C
25°C
VCC = +15 V
VEE = -15 V
TA = 25°C
VCC = +15 V
VEE = -15 V
TA = 25°C
AV = 100 AV = 10 AV = 1.0
LF441C LF442C LF444C
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7
0
Figure 23. Inverting Figure 24. Noninverting
Figure 25. Inverting Figure 26. Noninverting
VO, OUTPUT VOLTAGE (50 mV/DIV)
VO, OUTPUT VOLTAGE (50 mV/DIV)
VO, OUTPUT VOLTAGE (5.0 V/DIV)
VO, OUTPUT VOLTAGE (5.0 V/DIV)
t, TIME (0.5 µs/DIV)
t, TIME (2.0 µs/DIV)
SMALL SIGNAL RESPONSE
LARGE SIGNAL RESPONSE
0
t, TIME (0.5 µs/DIV)
0
t, TIME (2.0 µs/DIV)
0
VCC = +15 V
VEE = -15 V
RL = 10 k
CL = 10 pF
AV = -1.0
TA = 25°C
VCC = +15 V
VEE = -15 V
RL = 10 k
CL = 10 pF
AV = +1.0
TA = 25°C
VCC = +15 V
VEE = -15 V
RL = 10 k
CL = 10 pF
AV = -1.0
TA = 25°C
VCC = +15 V
VEE = -15 V
RL = 10 k
CL = 10 pF
AV = +1.0
TA = 25°C
LF441C LF442C LF444C
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8
OUTLINE DIMENSIONS
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
58
F
NOTE 2 –A–
–B–
–T–
SEATING
PLANE
H
J
GDK
N
C
L
M
M
A
M
0.13 (0.005) B M
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.40 10.16 0.370 0.400
B6.10 6.60 0.240 0.260
C3.94 4.45 0.155 0.175
D0.38 0.51 0.015 0.020
F1.02 1.78 0.040 0.070
G2.54 BSC 0.100 BSC
H0.76 1.27 0.030 0.050
J0.20 0.30 0.008 0.012
K2.92 3.43 0.115 0.135
L7.62 BSC 0.300 BSC
M--- 10 --- 10
N0.76 1.01 0.030 0.040

D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
N SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
SEATING
PLANE
1
4
58
A0.25 MCB SS
0.25 MBM
h
C
X 45
L
DIM MIN MAX
MILLIMETERS
A1.35 1.75
A1 0.10 0.25
B0.35 0.49
C0.18 0.25
D4.80 5.00
E
1.27 BSCe
3.80 4.00
H5.80 6.20
h
0 7
L0.40 1.25
0.25 0.50
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
D
EH
A
Be
B
A1
CA
0.10
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9
OUTLINE DIMENSIONS
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
17
14 8
B
A
F
HG D K
C
N
L
J
M
SEATING
PLANE
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.715 0.770 18.16 19.56
B0.240 0.260 6.10 6.60
C0.145 0.185 3.69 4.69
D0.015 0.021 0.38 0.53
F0.040 0.070 1.02 1.78
G0.100 BSC 2.54 BSC
H0.052 0.095 1.32 2.41
J0.008 0.015 0.20 0.38
K0.115 0.135 2.92 3.43
L0.300 BSC 7.62 BSC
M0 10 0 10
N0.015 0.039 0.39 1.01

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A–
–B–
G
P7 PL
14 8
71 M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
–T–
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
 
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
ISSUE F
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
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