SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Meet or Exceed the Requirements of ANSI
Standard EIA/TIA-422-B, RS-423-B, and
RS-485
D
Meet ITU Recommendations V.10, V.11,
X.26, and X.27
D
Designed for Multipoint Bus Transmission
on Long Bus Lines in Noisy Environments
D
3-State Outputs
D
Common-Mode Input Voltage Range
–12 V to 12 V
D
Input Sensitivity...±200 mV
D
Input Hysteresis...50 mV Typ
D
High Input Impedance...12 kΩ Min
D
Operate From Single 5-V Supply
D
Low-Power Requirements
D
Plug-In Replacement for MC3486
description
The SN65175 and SN75175 are monolithic quadruple differential line receivers with 3-state outputs. They are
designed to meet the requirements of ANSI Standards EIA/TIA-422-B, RS-423-B, and RS-485, and several ITU
recommendations. These standards are for balanced multipoint bus transmission at rates up to 10 megabits
per second. Each of the two pairs of receivers has a common active-high enable.
The receivers feature high input impedance, input hysteresis for increased noise immunity , and input sensitivity
of ±200 mV over a common-mode input voltage range of ±12 V. The SN65175 and SN75175 are designed for
optimum performance when used with the SN75172 or SN75174 quadruple differential line drivers.
The SN65175 is characterized for operation from –40°C to 85°C. The SN75175 is characterized for operation
from 0°C to 70°C.
FUNCTION TABLE
(each receiver)
DIFFERENTIAL
ENABLE
OUTPUT
A – B
ENABLE
Y
VID ≥ 0.2 V H H
–0.2 V < VID < 0.2 V H ?
VID ≥ – 0.2 V H L
X L Z
Open circuit H ?
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
1,2EN
2Y
2A
2B
GND
VCC
4B
4A
4Y
3,4EN
3Y
3A
3B
D OR N PACKAGE
(TOP VIEW)
SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†
4Y
3Y
2Y
1Y
4B
4A
3B
3A
3,4EN
2B
2A
1B
1A
1,2EN
13
11
5
3
15
14
9
10
12
7
6
1
2
4
EN
EN
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
2B
2A
1B
1A
1,2EN
2Y
1Y
3
5
4B
4A
3B
3A
3,4EN
13
11 3Y
4Y15
14
9
10
12
7
6
1
2
4
schematics of inputs and outputs
TYPICAL OF ALL OUTPUTSEQUIVALENT OF EACH ENABLE INPUTEQUIVALENT OF EACH A OR B INPUT
Output
VCC
Input
VCC
VCC
Input
16.8 kΩ
NOM 960 Ω
NOM
8.3 kΩ
NOM
85 Ω
NOM
960 Ω
NOM
SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage VI, (A or B inputs) ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID (see Note 2) ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable input voltage, VI, EN 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-level output current, IOL 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: SN65175 –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN75175 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the noninverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
PACKAGE TA ≤ 25°C
POWER RATING DERATING
FACTOR TA = 70°C
POWER RATING TA = 85°C
POWER RATING
D950 mW 7.6 mW/°C 608 mW 494 mW
N 1150 mW 9.2 mW/°C 736 mW 598 mW
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, VCC 4.75 5 5.25 V
Common-mode input voltage, VIC ±12 V
Differential input voltage, VID ±12 V
High-level enable-input voltage, VIH 2 V
Low-level enable-input voltage, VIL 0.8 V
High-level output current, IOH –400 µA
Low-level output current, IOL 16 mA
O
p
erating free air tem
p
erature TA
SN65175 –40 85 °
C
Operating
free
-
air
temperat
u
re
,
T
ASN75175 0 70
°C
SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage and operating free-air temperature
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIT+ Positive-going input threshold voltage VO = 2.7 V, IO = –0.4 mA 0.2 V
VIT– Negative-going input threshold voltage VO = 0.5 V, IO = 16 mA –0.2‡V
Vhys Hysteresis voltage (VIT+ – VIT–)See Figure 4 50 mV
VIK Enable-input clamp voltage II = –18 mA –1.5 V
VOH High-level output voltage VID = 200 mV, IOH = –400 µA, See Figure 1 2.7 V
VOL
Low level out
p
ut voltage
VID = 200 mV
See Figure 1
IOL = 8 mA 0.45
V
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
V
ID = –
200
mV
,
See
Fig
u
re
1
IOL = 16 mA 0.5
V
IOZ High-impedance-state output current VO = 0.4 V to 2.4 V ±20 µA
II
Line in
p
ut current
Other in
p
ut at 0 V
See Note 3
VI = 12 V 1
mA
I
I
Line
inp
u
t
c
u
rrent
Other
inp
u
t
at
0
V
,
See
Note
3
VI = –7 V –0.8
mA
IIH High-level enable-input current VIH = 2.7 V 20 µA
IIL Low-level enable-input current VIL = 0.4 V –100 µA
riInput resistance 12 kΩ
IOS Short-circuit output current§–15 –85 mA
ICC Supply current Outputs disabled 70 mA
†All typical values are at VCC = 5 V, TA = 25°C.
‡The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold voltage
levels only.
§Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 3: Refer to ANSI Standards EIA/TIA-422-B, RS-423-B, and RS-485 for exact conditions.
switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low- to high-level output
22 35 ns
tPHL Propagation delay time, high- to low-level output
u
25 35 ns
tPZH Output enable time to high level
13 30 ns
tPZL Output enable time to low level
u
19 30 ns
tPHZ Output disable time from high level
26 35 ns
tPLZ Output disable time from low level
u
25 35 ns
SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOH
(–)
IOH
(+)
IOL
2 V
VID
VOL
S
Figure 1. VOH, VOL
VOL
VOH
0 V
3 V
Output
Input
tPHL
tPLH
1.3 V1.3 V
1.5 V
CL = 15 pF
(see Note B)
1.5 V
2 V
TEST CIRCUIT VOLTAGE WAVEFORMS
50 ΩOutput
Generator
(see Note A) 1.5 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr ≤ 6 ns, tf
≤6 ns, ZO = 50 Ω.
B. CL includes probe and stray capacitance.
Figure 2. Test Circuit and Voltage Waveforms
SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.5 V
VOLTAGE WAVEFORMS
TEST CIRCUIT
tPLZ
tPZL
1.4 V
tPHZ
SW2 Closed
tPHZ
Output
Input 1.5 V 0 V
VOH
3 V
SW1 to 1.5 V
SW3 Closed
SW3 Closed
SW2 Open
SW1 to 1.5 V
tPZH
3 V
tPZH
0 V
VOH
0 V
1.5 V
1.5 V
Input
Output Output
Input
3 V
3 V
SW3 Closed
3 V
1.4 V
0 V
VOL
tPLZ SW1 to –1.5 V
SW2 Closed
1.5 V4.5 V SW3 Open
SW2 Closed
SW1 to –1.5 V
tPZL
1.5 V
5 V
SW2
See Note C
SW3
5 kΩ
51 Ω
SW1
–1.5 V
1.5 V
VOL
0 V
Output
Input
CL
(see Note B)
Output
2 kΩ
0.5 V
0.5 V
Generator
(see Note A)
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, duty cycle = 50%, tf ≤6 ns,
tr ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and stray capacitance.
C. All diodes are 1N916 or equivalent.
Figure 3. Test Circuit and Voltage Waveforms
SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 4
2.5
2
1
0.5
0
4.5
1.5
–125 –100 –75 – 50 – 25 0 25
3.5
3
4
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
5
50 75 100 125
VID – Differential Input Voltage – mV
– Output Voltage – V
VO
VCC = 5 V IO = 0 TA = 25°C
VIT–
VIT+
VIC =
–12 V VIC =
0VIC =
12 V
VIT–
VIT+
VIT–
VIT+
Figure 5
2.5
2
1
0.5
0
4.5
1.5
0 – 5 –10 –15 – 20 – 25 – 30
– High-Level Output Voltage – V
3.5
3
4
5
– 35 – 40 – 45 – 50
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH – High-Level Output Current – mA
VOH
VID = 0.2 V
TA = 25°C
VCC = 5 V
VCC = 5.25 V
VCC = 4.75 V
Figure 6
2.5
2
1
0.5
0
4.5
1.5
0102030405060
3.5
3
4
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
5
70 80 90
– High-Level Output Voltage – V
VOH
TA – Free-Air Temperature – °C
VCC = 5 V
VID = 0.2 V
IOH = –400 µA
SN65175 Only
Figure 7
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
0.3
0.2
0.1
00510
0.4
0.5
0.6
15 20 25 30
– Low-Level Output Voltage – V
VOL
IOL – Low-Level Output Current – mA
VCC = 5 V
TA = 25°C
VID = – 0.2 V
SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 8
0.2
0.1
00102030405060
0.3
0.4
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.5
70 80 90
– Low-Level Output Voltage – V
VOL
TA – Free-Air Temperature – °C
VCC = 5 V
VID = –0.2 V
IOL = 8 mA
SN65175 Only
Figure 9
2
1
00 0.5 1 1.5
– Output Voltage – V
3
4
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
5
2 2.5 3
VCC = 5.25 V
VCC = 5 V VCC = 4.75 V
VID = 0.2 V
Load = 8 kΩ to GND
TA = 25°C
Enable G Voltage – V
VO
Figure 10
3
2
1
00 0.5 1
4
5
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
6
1.5 2 2.5 3
VID = –0.2 V
Load = 1 kΩ to VCC
TA = 25°C
VCC = 5.25 V
VCC = 5 V
VCC = 4.75 V
Enable G Voltage – V
– Output Voltage – V
VO
Figure 11
40
30
10
00123456
– Supply Current – mA
50
70
SUPPLY CURRENT (ALL RECEIVERS)
vs
SUPPLY VOLTAGE
80
78
20
60
No Load
Inputs Open
TA = 25°C
ICC
VCC – Supply Voltage – V
Outputs Disabled
Outputs Enabled
90
100
SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145B – OCTOBER 1990 – REVISED MAY 1995
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0
– 0.25
– 0.75
–1
–8 –6 –4 0 2 4 6
– Input Current – mA
0.25
0.75
INPUT CURRENT
vs
INPUT VOLTAGE
1
108
– 0.5
0.5
II
VI – Input Voltage – V
VCC = 5 V
TA = 25°C
The Unshaded Area
Conforms to
Figure 3.2 of
EIA RS-485
–2 12
Figure 12
APPLICATION INFORMATION
1/4 SN75172
1/4 SN75173
1/4 SN75172 1/4 SN75173 1/4 SN751741/4 SN75173
1/4 SN75175
1/4 SN75174
Up to 32
Driver/Receiver
Pairs
RTRT
NOTE A: The line should be terminated at both ends in its characteristicc impedance (R T = ZO). Stub lengths off the main line should be kept
as short as possible.
Figure 13. Typical Application Circuit
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
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Copyright 1998, Texas Instruments Incorporated
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Parameter Name SN75175
Receivers Per Package 4
Receiver tpd (ns) 35
Supply Voltage(s) (V) 5
ICC (max) (mA) 70
Footprint MC3486
The SN65175 and SN75175 are monolithic quadruple differential line receivers with 3-state
outputs. They are designed to meet the requirements of ANSI Standards EIA/TIA-422-B,
RS-423-B, and RS-
485, and several ITU recommendations. These standards are for balanced
multipoint bus transmission at rates up to 10megabits per second. Each of the two pairs of
receivers has a common active-high enable.
The receivers feature high input impedance, input hysteresis for increased noise immunity,
and input sensitivity of ±200 mV over a common-mode input voltage range of ±12 V. The
SN65175 and SN75175 are designed for optimum performance when used with the
SN75172 or SN75174 quadruple differential line drivers.
The SN65175 is characterized for operation from -40°C to 85°C. The SN75175 is
characterized for operation from 0°C to 70°C.
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
lMeet or Exceed the Requirements of ANSI Standard EIA/TIA-422-B, RS-423-B, and
RS-485
lMeet ITU Recommendations V.10, V.11, X.26, and X.27
l
Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments
l3-State Outputs
lCommon-Mode Input Voltage Range
-12 V to 12 V
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Datasheets
Full datasheet in Acrobat PDF: slls145b.pdf (152 KB)
Full datasheet in Zipped PostScript: slls145b.psz (133 KB)
Pricing/Samples/Availability
Application Reports
l422 AND 485 OVERVIEW AND SYSTEM CONFIGURATIONS (SLLA070 - Updated: 02/15/2000)
lANALOG APPLICATIONS JOURNAL, FEBRUARY 2000 (SLYT012A - Updated: 03/23/2000)
lANALOG APPLICATIONS JOURNAL, NOVEMBER 1999 (SLYT010A - Updated: 03/23/2000)
lCOMPARING BUS SOLUTIONS (SLLA067 - Updated: 03/06/2000)
lELECTROSTATIC DISCHARGE APPLICATION NOTE (SSYA008 - Updated: 05/05/1999)
lINTERFACE CIRCUITS FOR TIA/EIA-485 (SLLA036 - Updated: 03/26/2000)
lJITTER ANALYSIS (SLLA075 - Updated: 03/31/2000)
lSKEW DEFINITIONS (SLLA060 - Updated: 08/13/1999)
lTHERMAL CHARACTERISTICS OF LINEAR AND LOGIC PACKAGES USING JEDEC PCB
DESIGNS (SZZA017A - Updated: 09/15/1999)
Related Documents
lA STATISTICAL SURVEY OF COMMON-MODE NOISE (SLLA057, 131 KB - Updated: 12/23/1999)
Table Data Updated on: 6/2/2000
(c) Copyright 2000 Texas Instruments Incorporated. All rights reserved.
lInput Sensitivity...±200 mV
lInput Hysteresis...50 mV Typ
lHigh Input Impedance...12 k Min
lOperate From Single 5-V Supply
lLow-Power Requirements
lPlug-In Replacement for MC3486
Orderable Device Package Pins Temp (ºC) Status Price/unit
USD (100-999) Pack Qty Availability / Samples
SN75175D D16 0 TO 70 ACTIVE 2.54 40 Check stock or order
SN75175DR D16 0 TO 70 ACTIVE 2.12 2500 Check stock or order
SN75175J J16 OBSOLETE
SN75175N N16 0 TO 70 ACTIVE 2.00 25 Check stock or order
SN75175NS NS 16 0 TO 70 ACTIVE Check stock or order
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