OPA342UAG4 - Texas Instruments

Low-Cost, Low-Power, Rail-to-Rail

OPERATIONAL AMPLIFIERS

MicroAmplifier

™ Series

FEATURES

●LOW QUIESCENT CURRENT: 150µA typ

●RAIL-TO-RAIL INPUT

●RAIL-TO-RAIL OUTPUT (within 1mV)

●SINGLE SUPPLY CAPABILITY

●LOW COST

●

Micro

SIZE PACKAGE OPTIONS:

SOT23-5

MSOP-8

TSSOP-14

●BANDWIDTH: 1MHz

●SLEW RATE: 1V/µs

●THD + NOISE: 0.006%

APPLICATIONS

●COMMUNICATIONS

● PCMCIA CARDS

● DATA ACQUISITION

● PROCESS CONTROL

● AUDIO PROCESSING

●ACTIVE FILTERS

●TEST EQUIPMENT

●CONSUMER ELECTRONICS

DESCRIPTION

The OPA342 series rail-to-rail CMOS operational

amplifiers are designed for low-cost, low-power, min-

iature applications. They are optimized to operate on

a single supply as low as 2.5V with an input common-

mode voltage range that extends 300mV beyond the

supplies.

Rail-to-rail input/output and high-speed operation make

them ideal for driving sampling Analog-to-Digital Con-

verters (ADC). They are also well suited for general-

purpose and audio applications and providing I/V con-

version at the output of Digital-to-Analog Converters

(DAC). Single, dual, and quad versions have identical

specs for design flexibility.

The OPA342 series offers excellent dynamic response

with a quiescent current of only 250µA max. Dual and

quad designs feature completely independent circuitry

for lowest crosstalk and freedom from interaction.

OPA342

OPA2342

OPA4342

OPA342

OPA2342

OPA4342

SINGLE DUAL QUAD

PACKAGE OPA342 OPA2342 OPA4342

SOT23-5 ✔

MSOP-8 ✔

SO-8 ✔✔

TSSOP-14 ✔

SO-14 ✔

DIP-14 ✔

SPICE MODEL available at www.burr-brown.com.

www.ti.com

OPA342, 2342, 4342

2SBOS106A

SPECIFICATIONS: VS = 2.7V to 5.5V

At TA = +25°C, RL = 10kΩ connected to VS/ 2 and VOUT = VS/ 2, unless otherwise noted.

Boldface limits apply over the temperature range, TA = –40°C to +85°C.

OPA342NA, UA

OPA2342EA, UA

OPA4342EA, UA, PA

PARAMETER CONDITION MIN TYP MAX UNITS

OFFSET VOLTAGE

Input Offset Voltage VOS VCM = VS/2 ±1±6mV

TA = –40°C to +85°C±1±6mV

vs Temperature dVOS/dT ±3µV/°C

vs Power Supply PSRR VS = 2.7V to 5.5V, VCM < (V+) -1.8V 30 200 µV/V

TA = –40°C to +85°CV

S = 2.7V to 5.5V, VCM < (V+) -1.8V 250 µV/V

Channel Separation, dc 0.2 µV/V

f = 1kHz 132 dB

INPUT BIAS CURRENT

Input Bias Current IB±0.2 ±10 pA

TA = –40°C to +85°CSee Typical Curve pA

Input Offset Current IOS ±0.2 ±10 pA

NOISE

Input Voltage Noise, f = 0.1Hz to 50kHz 8µVrms

Input Voltage Noise Density, f = 1kHz en30 nV/√Hz

Current Noise Density, f = 1kHz in0.5 fA/√Hz

INPUT VOLTAGE RANGE

Common-Mode Voltage Range VCM –0.3 (V+) + 0.3 V

Common-Mode Rejection Ratio CMRR VS = +5.5V, –0.3V < VCM < (V+) - 1.8 76 88 dB

TA = –40°C to +85°CV

S = +5.5V, –0.3V < VCM < (V+) - 1.8 74 dB

Common-Mode Rejection Ratio CMRR VS = +5.5V, –0.3V < VCM < 5.8V 66 78 dB

TA = –40°C to +85°CV

S = +5.5V, –0.3V < VCM < 5.8V 64 dB

Common-Mode Rejection Ratio CMRR VS = +2.7V, –0.3V < VCM < 3V 62 74 dB

TA = –40°C to +85°CV

S = +2.7V, –0.3V < VCM < 3V 60 dB

INPUT IMPEDANCE

Differential 1013 || 3 Ω || pF

Common-Mode 1013 || 6 Ω || pF

OPEN-LOOP GAIN

Open-Loop Voltage Gain AOL RL = 100kΩ, 10mV < VO < (V+) – 10mV 104 124 dB

TA = –40°C to +85°CR

L = 100kΩ, 10mV < VO < (V+) – 10mV 100 dB

RL = 5kΩ, 400mV < VO < (V+) – 400mV 96 114 dB

TA = –40°C to +85°CR

L = 5kΩ, 400mV < VO < (V+) – 400mV 90 dB

FREQUENCY RESPONSE CL = 100pF

Gain-Bandwidth Product GBW G = 1 1 MHz

Slew Rate SR 1 V/µs

Settling Time, 0.1% VS = 5.5V, 2V Step 5 µs

0.01% VS = 5.5V, 2V Step 8 µs

Overload Recovery Time VIN • G = VS2.5 µs

Total Harmonic Distortion + Noise, f = 1kHz

THD+N VS = 5.5V, VO = 3Vp-p(1), G = 1 0.006 %

OUTPUT

Voltage Output Swing from Rail(2) RL = 100kΩ, AOL ≥ 96dB 1 mV

RL = 100kΩ, AOL ≥ 104dB 3 10 mV

TA = –40°C to +85°CR

L = 100kΩ, AOL ≥ 100dB 10 mV

RL = 5kΩ, AOL ≥ 96dB 20 400 mV

TA = –40°C to +85°CR

L = 5kΩ, AOL ≥ 90dB 400 mV

Short-Circuit Current ISC Per Channel ±15 mA

Capacitive Load Drive CLOAD See Typical Curve

POWER SUPPLY

Specified Voltage Range VS2.7 5.5 V

Operating Voltage Range 2.5 to 5.5 V

Quiescent Current (per amplifier) IQIO = 0A 150 250 µA

TA = –40°C to +85°C300 µA

TEMPERATURE RANGE

Specified Range –40 +85 °C

Operating Range –55 +125 °C

Storage Range –65 +150 °C

Thermal Resistance

SOT23-5 Surface Mount 200 °C/W

MSOP-8 Surface Mount 150 °C/W

SO-8 Surface Mount 150 °C/W

TSSOP-14 Surface Mount 100 °C/W

SO-14 Surface Mount 100 °C/W

DIP-14 100 °C/W

NOTES: (1) VOUT = 0.25V to 3.25V. (2) Output voltage swings are measured between the output and power-supply rails.

OPA342, 2342, 4342 3

SBOS106A

PACKAGE SPECIFIED

DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT

PRODUCT PACKAGE NUMBER RANGE MARKING NUMBER(1) MEDIA

OPA342NA SOT23-5 331 –40°C to +85°C B42 OPA342NA /250 Tape and Reel

"""""OPA342NA/3K Tape and Reel

OPA342UA SO-8 182 –40°C to +85°C OPA342UA OPA342UA Rails

"""""OPA342UA/2K5 Tape and Reel

OPA2342EA MSOP-8 337 –40°C to +85°C C42 OPA2342EA/250 Tape and Reel

"""""OPA2342EA /2K5 Tape and Reel

OPA2342UA SO-8 182 –40°C to +85°C OPA2342UA OPA2342UA Rails

"""""OPA2342UA /2K5 Tape and Reel

OPA4342EA TSSOP-14 357 –40°C to +85°C OPA4342EA OPA4342EA /250 Tape and Reel

"""""OPA4342EA /2K5 Tape and Reel

OPA4342UA SO-14 235 –40°C to +85°C OPA4342UA OPA4342UA Rails

"""""OPA4342UA /2K5 Tape and Reel

OPA4342PA DIP-14 010 –40°C to +85°C OPA4342PA OPA4342PA Rails

NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /3K indicates 3000 devices per reel). Ordering 3000 pieces

of “OPA342NA/3K” will get a single 3000-piece Tape and Reel.

PACKAGE/ORDERING INFORMATION

Supply Voltage, V+ to V- ................................................................... 7.5V

Signal Input Terminals, Voltage(2) .....................(V–) –0.5V to (V+) +0.5V

Current(2) .................................................... 10mA

Output Short-Circuit(3) .............................................................. Continuous

Operating Temperature ..................................................–55°C to +125°C

Storage Temperature .....................................................–65°C to +150°C

Junction Temperature...................................................................... 150°C

Lead Temperature (soldering, 10s)................................................. 300°C

ESD Tolerance (Human Body Model) ............................................ 4000V

NOTES: (1) Stresses above these ratings may cause permanent damage.

Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only. Functional opera-

tion of the device at these conditions, or beyond the specified operating

conditions, is not implied. (2) Input terminals are diode-clamped to the power

supply rails. Input signals that can swing more than 0.5V beyond the supply

rails should be current-limited to 10mA or less. (3) Short-circuit to ground,

one amplifier per package.

ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet its

published specifications.

PIN CONFIGURATIONS

V+

–In

Out

V–

+In

OPA342

SOT23-5

Out D

–In D

+In D

–V

+In C

–In C

Out C

Out A

–In A

+In A

+In B

–In B

Out B

OPA4342

TSSOP-14, SO-14, DIP-14

V+

Out B

–In B

+In B

Out A

–In A

+In A

V–

OPA2342

SO-8, MSOP-8

V+

Out

–In

+In

V–

OPA342

SO-8

OPA342, 2342, 4342

4SBOS106A

TYPICAL PERFORMANCE CURVES

At TA = +25°C, VS = +5V, and RL = 10kΩ connected to VS/2, unless otherwise noted.

POWER SUPPLY AND COMMON-MODE

REJECTION RATIO vs FREQUENCY

Rejection Ratio (dB)

Frequency (Hz)

100 1k 10k 100k

100

+PSRR

CMRR

–PSRR

CHANNEL SEPARATION vs FREQUENCY

100

Channel Separation (dB)

Frequency (Hz)

1k 10k 100k 1M

140

120

100

Dual and quad devices.

G = 1, all channels.

Quad measured channel

A to D or B to C—other

combinations yield improved

rejection.

VOLTAGE AND CURRENT NOISE

SPECTRAL DENSITY vs FREQUENCY

Voltage Noise (nV/√Hz)

Frequency (Hz)

10 100 1k 10k 100k 1M 10M

10000

1000

100

Current Noise (fA/√Hz)

100

0.1

TOTAL HARMONIC DISTORTION + NOISE

vs FREQUENCY

THD+N (%)

Frequency (Hz)

100 1k 10k 20k

0.1

0.010

0.001

OPEN-LOOP GAIN/PHASE vs FREQUENCY

0.1 1

Gain (dB)

120

150

180

Phase (°)

Frequency (Hz)

10 100 1k 10k 100k 1M 10M

120

100

Gain

Phase

MAXIMUM OUTPUT VOLTAGE vs FREQUENCY

10k

Maximum Output Voltage (Vp-p)

Frequency (Hz)

100k 1M

= +2.7V

= +5.5V

= +5V

OPA342, 2342, 4342 5

SBOS106A

TYPICAL PERFORMANCE CURVES (Cont.)

At TA = +25°C, VS = +5V, and RL = 10kΩ connected to VS/2, unless otherwise noted.

OPEN-LOOP GAIN, COMMON-MODE REJECTION RATIO,

AND POWER SUPPLY REJECTION vs TEMPERATURE

–75

, CMRR, PSRR (dB)

Temperature (°C)

–25 0 25–50 50 12575 100 150

140

120

100

CMRR

PSRR

INPUT BIAS CURRENT vs TEMPERATURE

–75

Input Bias Current (pA)

Temperature (°C)

–25 0 25–50 10050 75 125

10000

1000

100

0.1

QUIESCENT CURRENT AND

SHORT-CIRCUIT CURRENT vs TEMPERATURE

–75 –50 0

Quiescent Current (µA)

Temperature (°C)

25 50 100

–I

75–25 125

200

175

150

135

100

Short-Circuit Current (mA)

SLEW RATE vs TEMPERATURE

–75

Slew Rate (V/µs)

Temperature (°C)

250

–SR

+SR

7550–25–50 100 125

1.2

0.8

0.6

0.4

0.2

INPUT BIAS CURRENT

vs COMMON-MODE VOLTAGE

–1

Input Bias Current (pA)

Common-Mode Voltage (V)

012 4356

–2

–4

–6

V+

Supply

V–

Supply

Input voltage ≤ –0.3V

can cause op amp output

to lock up. See text.

QUIESCENT CURRENT AND

SHORT-CIRCUIT CURRENT vs SUPPLY VOLTAGE

Quiescent Current (µA)

Supply Voltage (V)

23456

–I

160

155

150

145

140

Short-Circuit Current (mA)

OPA342, 2342, 4342

6SBOS106A

TYPICAL PERFORMANCE CURVES (Cont.)

At TA = +25°C, VS = +5V, and RL = 10kΩ connected to VS/2, unless otherwise noted.

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

Output Voltage (V)

Output Current (mA)

≈≈

10 15 20

V+

(V+) – 1

(V+) – 2

85°C

25°C

–40°C

85°C

25°C

–40°C

OPEN-LOOP GAIN vs OUTPUT VOLTAGE SWING

120

110

100

Open-Loop Gain (dB)

Output Voltage Swing from Rail (mV)

120 100 80 60 40 20 0

= 5kΩ

= 100kΩ

OFFSET VOLTAGE

PRODUCTION DISTRIBUTION

Percent of Amplifiers (%)

Offset Voltage (mV)

–6

–5.4

–4.8

–4.2

–3.6

–3

–2.4

–1.8

–1.2

–0.6

0.6

1.2

1.8

2.4

3.6

4.2

4.8

5.4

Typical production

distribution of

packaged units.

OFFSET VOLTAGE DRIFT

PRODUCTION DISTRIBUTION

Percent of Amplifiers (%)

Offset Voltage Drift (µV/°C)

Typical production

distribution of

packaged units.

–10

–9

–8

–7

–6

–5

–4

–3

–2

–1

Quiescent Current (µA)

QUIESCENT CURRENT

PRODUCTION DISTRIBUTION

Percent of Amplifiers (%)

<25

<50

<75

<100

<125

<150

<175

<200

<225

<250

SETTLING TIME vs CLOSED-LOOP GAIN

Settling Time (µs)

Closed-Loop Gain (V/V)

10 100

0.01%

0.1%

1000

400

350

300

250

200

150

100

OPA342, 2342, 4342 7

SBOS106A

TYPICAL PERFORMANCE CURVES (Cont.)

At TA = +25°C, VS = +5V, and RL = 10kΩ connected to VS/2, unless otherwise noted.

SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE

Small-Signal Overshoot (%)

Load Capacitance (pF)

10 100 1k 10k

G = –1

G = –5

G = +5

G = +1

5µs/div

LARGE-SIGNAL STEP RESPONSE

G = +1, RL = 10kΩ, CL = 100pF

1V/div

5µs/div

SMALL-SIGNAL STEP RESPONSE

G = +1, RL = 10kΩ, CL = 100pF

20mV/div

OPA342, 2342, 4342

8SBOS106A

APPLICATIONS INFORMATION

OPA342 series op amps are unity gain stable and can operate

on a single supply, making them highly versatile and easy to

use.

Rail-to-rail input and output swing significantly increases

dynamic range, especially in low supply applications. Figure

1 shows the input and output waveforms for the OPA342 in

unity-gain configuration. Operation is from VS = +5V with

a 10kΩ load connected to VS/2. The input is a 5Vp-p

sinusoid. Output voltage is approximately 4.997Vp-p.

Power supply pins should be by passed with 0.01µF ceramic

capacitors.

OPERATING VOLTAGE

OPA342 series op amps are fully specified and guaranteed

from +2.7V to +5.5V. In addition, many specifications apply

from –40ºC to +85ºC. Parameters that vary significantly

with operating voltages or temperature are shown in the

Typical Performance Curves.

RAIL-TO-RAIL INPUT

The input common-mode voltage range of the OPA342

series extends 300mV beyond the supply rails. This is

achieved with a complementary input stage—an N-channel

input differential pair in parallel with a P-channel differen-

tial pair (see Figure 2). The N-channel pair is active for input

voltages close to the positive rail, typically (V+) – 1.3V to

300mV above the positive supply, while the P-channel pair

is on for inputs from 300mV below the negative supply to

approximately (V+) –1.3V. There is a small transition re-

gion, typically (V+) – 1.5V to (V+) – 1.1V, in which both

pairs are on. This 400mV transition region can vary 300mV

with process variation. Thus, the transition region (both

stages on) can range from (V+) – 1.8V to (V+) – 1.4V on the

low end, up to (V+) – 1.2V to (V+) – 0.8V on the high end.

Within the 400mV transition region PSRR, CMRR, offset

voltage, offset drift, and THD may be degraded compared to

operation outside this region. For more information on

designing with rail-to-rail input op amps, see Figure 3

“Design Optimization with Rail-to-Rail Input Op Amps.”

FIGURE 2. Simplified Schematic.

VBIAS1

VBIAS2

VIN+VIN–

Class AB

Control

Circuitry VO

V–

(Ground)

V+

Reference

Current

FIGURE 1. Rail-to-Rail Input and Output.

5µs/div

1V/div

Output (inverted on scope)

Input G = +1, VS = +5V

OPA342, 2342, 4342 9

SBOS106A

COMMON-MODE REJECTION

The CMRR for the OPA342 is specified in several ways so

the best match for a given application may be used. First, the

CMRR of the device in the common-mode range below the

transition region (VCM < (V+) – 1.8V) is given. This speci-

fication is the best indicator of the capability of the device

when the application requires use of one of the differential

input pairs. Second, the CMRR at VS = 5.5V over the entire

common-mode range is specified. Third, the CMRR at VS =

2.7V over the entire common-mode range is provided. These

last two values include the variations seen through the

transition region.

INPUT VOLTAGE BEYOND THE RAILS

If the input voltage can go more than 0.3V below the

negative power supply rail (single-supply ground), special

precautions are required. If the input voltage goes suffi-

ciently negative, the op amp output may lock up in an

inoperative state. A Schottky diode clamp circuit will pre-

vent this—see Figure 4. The series resistor prevents exces-

sive current (greater than 10mA) in the Schottky diode and

in the internal ESD protection diode, if the input voltage can

exceed the positive supply voltage. If the signal source is

limited to less than 10mA, the input resistor is not required.

RAIL-TO-RAIL OUTPUT

A class AB output stage with common-source transistors is

used to achieve rail-to-rail output. This output stage is

capable of driving 600Ω loads connected to any potential

between V+ and ground. For light resistive loads (> 50kΩ),

the output voltage can typically swing to within 1mV from

supply rail. With moderate resistive loads (2kΩ to 50kΩ),

the output can swing to within a few tens of milli-volts from

the supply rails while maintaining high open-loop gain. See

the typical performance curve “Output Voltage Swing vs

Output Current.”

V+

Non-Inverting Gain

= V

V+

Inverting Amplifier

= V

V+

G = 1 Buffer

= V

FIGURE 3. Design Optimization with Rail-to-Rail Input Op Amps.

Rail-to-rail op amps can be used in virtually any op amp

configuration. To achieve optimum performance, how-

ever, applications using these special double-input-stage

op amps may benefit from consideration of their special

behavior.

In many applications, operation remains within the com-

mon-mode range of only one differential input pair.

However some applications exercise the amplifier through

the transition region of both differential input stages.

Although the two input stages are laser trimmed for

excellent matching, a small discontinuity may occur in

this transition. Careful selection of the circuit configura-

tion, signal levels and biasing can often avoid this transi-

tion region.

DESIGN OPTIMIZATION WITH RAIL-TO-RAIL INPUT OP AMPS

With a unity-gain buffer, for example, signals will traverse

this transition at approximately 1.3V below V+ supply

and may exhibit a small discontinuity at this point.

The common-mode voltage of the non-inverting ampli-

fier is equal to the input voltage. If the input signal always

remains less than the transition voltage, no discontinuity

will be created. The closed-loop gain of this configura-

tion can still produce a rail-to-rail output.

Inverting amplifiers have a constant common-mode volt-

age equal to VB. If this bias voltage is constant, no

discontinuity will be created. The bias voltage can gener-

ally be chosen to avoid the transition region.

FIGURE 4. Input Current Protection for Voltages Exceed-

ing the Supply Voltage.

1kΩ

OPA342

10mA max

V+

OUT

OVERLOAD

IN5818

Schottky diode is required only

if input voltage can go more

than 0.3V below ground.

CAPACITIVE LOAD AND STABILITY

The OPA342 in a unity-gain configuration can directly drive

up to 250pF pure capacitive load. Increasing the gain en-

hances the amplifier’s ability to drive greater capacitive

loads. See the typical performance curve “Small-Signal

OPA342, 2342, 4342

10 SBOS106A

Overshoot vs Capacitive Load.” In unity-gain configura-

tions, capacitive load drive can be improved by inserting a

small (10Ω to 20Ω) resistor, RS, in series with the output, as

shown in Figure 5. This significantly reduces ringing while

maintaining dc performance for purely capacitive loads.

However, if there is a resistive load in parallel with the

capacitive load, a voltage divider is created, introducing a dc

error at the output and slightly reducing the output swing.

The error introduced is proportional to the ratio RS/RL, and

is generally negligible.

FIGURE 6. OPA342 in Noninverting Configuration Driving ADS7822.

FIGURE 7. Speech Bandpass Filtered Data Acquisition System.

DRIVING A/D CONVERTERS

The OPA342 series op amps are optimized for driving

medium-speed sampling ADCs. The OPA342 op amps buffer

the ADC’s input capacitance and resulting charge injection

while providing signal gain.

Figures 6 shows the OPA342 in a basic noninverting con-

figuration driving the ADS7822. The ADS7822 is a 12-bit,

micro-power sampling converter in the MSOP-8 package.

When used with the low-power, miniature packages of the

OPA342, the combination is ideal for space-limited, low-

power applications. In this configuration, an RC network at

the ADC’s input can be used to filter charge injection.

Figure 7 shows the OPA2342 driving an ADS7822 in a

speech bandpass filtered data acquisition system. This small,

low-cost solution provides the necessary amplification and

signal conditioning to interface directly with an electret

microphone. This circuit will operate with VS = +2.7V to

+5V with less than 500µA quiescent current.

FIGURE 5. Series Resistor in Unity-Gain Configuration

Improves Capacitive Load Drive.

10Ω to

20Ω

OPA342

V+

OUT

33pF

V+

GND

–IN

+IN

DCLOCK

Serial

Interface

1000pF

1.5kΩR

20kΩ

100kΩ

150kΩ

510kΩ

51kΩ

OUT

REF

V+ = +2.7V to 5V

CS/SHDN

1000pF

Electret

Microphone

(1)

G = 100

Passband 300Hz to 3kHz

1MΩ

NOTE: (1) Electret microphone

ADS7822

12-Bit A/D

1/2

OPA2342 1/2

OPA2342

ADS7822

12-Bit A/D

DCLOCK

DOUT

CS/SHDN

OPA342

+5V

VIN

V+

+In

–In

VREF

4GND

Serial

Interface

0.1µF 0.1µF

NOTE: A/D Input = 0 to VREF

VIN = 0V to 5V for

0V to 5V output.

RC network filters high frequency noise.

500Ω

3300pF

PACKAGE OPTION ADDENDUM

www.ti.com 16-Aug-2012

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status (1) Package Type Package

Drawing Pins Package Qty Eco Plan (2) Lead/

Ball Finish MSL Peak Temp (3) Samples

(Requires Login)

OPA2342EA/250 ACTIVE VSSOP DGK 8 250 Green (RoHS

& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR

OPA2342EA/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS

& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR

OPA2342EA/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR

OPA2342EA/2K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR

OPA2342UA ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA2342UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA2342UA/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA2342UAG4 ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA342NA/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA342NA/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA342NA/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA342NA/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA342UA ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA342UAG4 ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA4342EA/250 ACTIVE TSSOP PW 14 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA4342EA/250G4 ACTIVE TSSOP PW 14 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA4342PA ACTIVE PDIP N 14 25 Green (RoHS

& no Sb/Br) CU NIPDAU N / A for Pkg Type

PACKAGE OPTION ADDENDUM

www.ti.com 16-Aug-2012

Addendum-Page 2

Orderable Device Status (1) Package Type Package

Drawing Pins Package Qty Eco Plan (2) Lead/

Ball Finish MSL Peak Temp (3) Samples

(Requires Login)

OPA4342PAG4 ACTIVE PDIP N 14 25 Green (RoHS

& no Sb/Br) CU NIPDAU N / A for Pkg Type

OPA4342UA ACTIVE SOIC D 14 50 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA4342UAG4 ACTIVE SOIC D 14 50 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

OPA2342EA/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

OPA2342EA/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

OPA2342UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

OPA4342EA/250 TSSOP PW 14 250 180.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 16-Aug-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

OPA2342EA/250 VSSOP DGK 8 250 210.0 185.0 35.0

OPA2342EA/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0

OPA2342UA/2K5 SOIC D 8 2500 367.0 367.0 35.0

OPA4342EA/250 TSSOP PW 14 250 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 16-Aug-2012

Pack Materials-Page 2

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