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BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
© 2014 Fairchild Semiconductor Corporation www.fairchildsemi.com
BSS138L Rev. 1.0.1 1
October 2014
BSS138L
N-Channel Logic Level Enhancement Mode Field Effect
Transistor
Features
High Density Cell Design for Low RDS(ON)
Rugged and Reliable
Compact Industry Standard SOT-23 Surface Mount
Package
Very Low Capacitance
Fast Switching Speed
Ordering Information
Part Number Marking Package Packing Method
BSS138L SL SOT-23 3L Tape and Reel
SOT-23
G
S
D
D
SG
Description
This N-channel enhancement mode field effect transistor
is produced using high cell density, trench MOSFET
technology. This product minimizes on-state resistance
while providing rugged, reliable, and fast switching per-
formance. This product is particularly suited for low-volt-
age, low-current applications such as small servo motor
control, power MOSFET gate drivers, logic level transla-
tor, high speed line drivers, power management/power
supply and switching applications.
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
© 2014 Fairchild Semiconductor Corporation www.fairchildsemi.com
BSS138L Rev. 1.0.1 2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.
Thermal Characteristics
Values are at TA = 25°C unless otherwise noted.
Note:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference
is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is
determined by the user's board design.
Scale 1: 1 on letter size paper
ESD Rating(2)
Note:
2. ESD values are in typical, no over-voltage rating is implied, ESD CDM zap voltage is 2000 V maximum.
Symbol Parameter Value Unit
VDSS Drain-Source Voltage 50 V
VGSS Gate-Source Voltage ±20 V
IDMaximum Drain Current Continuous 0.20 A
Pulsed 0.80
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL
Maximum Lead Temperature for Soldering Purposes, 1/16 inch from Case
for 10 Seconds 300 °C
Symbol Parameter Value Unit
PD
Maximum Power Dissipation(1) 0.35 W
Derate Above 25°C2.8mW/°C
RθJA Thermal Resistance, Junction-to-Ambient(1) 380 °C/W
Symbol Parameter Value Unit
HBM Human Body Model per ANSI/ESDA/JEDEC JS-001-2012 50 V
CDM Charged Device Model per JEDEC C101C >2000
a) 380°C/W when mounted on a minimum pad.
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
© 2014 Fairchild Semiconductor Corporation www.fairchildsemi.com
BSS138L Rev. 1.0.1 3
Electrical Characteristics
Values are at TA = 25°C unless otherwise noted.
Note:
3. Pulse test: pulse width 300 μs, duty cycle 2.0%.
Symbol Parameter Conditions Min. Typ. Max. Unit
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA 50.0 65.4 V
ΔBVDSS
ΔTJ
Breakdown Voltage
Temperature Coefficient ID = 250 μA, Referenced to 25°C58mV/°C
IDSS Zero Gate Voltage Drain Current
VDS = 50 V, VGS = 0 V 0.263 500 nA
VDS = 50 V, VGS = 0 V,
TJ = 125°C0.109 5 μA
VDS = 30 V, VGS = 0 V 0.062 100 nA
IGSSF Gate-Body Leakage, Forward VGS = 20 V, VDS = 0 V 0.058 100 nA
IGSSR Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V -0.06 -100
On Characteristics(3)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 1 mA 0.80 1.25 1.50 V
ΔVGS(th)
ΔTJ
Gate Threshold Voltage
Temperature Coefficient ID = 1 mA, Referenced to 25°C -2.42 mV/°C
RDS(ON)
Static Drain-Source
On-Resistance
VGS = 5 V, ID = 0.20 A 2.78 3.50 Ω
VGS = 2.75 V, ID = 0.20 A 3.78 10
ID(ON) On-State Drain Current VGS = 10 V, VDS = 5 V 0.20 0.67 A
gFS Forward Transconductance VDS = 10 V, ID = 0.22 A 0.12 0.35 S
Dynamic Characteristics
Ciss Input Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
12.2 50 pF
Coss Output Capacitance 3.04 25 pF
Crss Reverse Transfer Capacitance 1.43 5 pF
RGGate Resistance VGS = 15 V, VGS = 1.0 MHz 26.6 Ω
Switching Characteristics(3)
td(on) Turn-On Delay
VDD = 30 V, ID = 0.29 A,
VGS = 10 V
2.2 5 ns
trTurn-On Rise Time 1.8 18 ns
td(off) Turn-Off Delay 5.3 36 ns
tfTurn-Off Fall Time 5.1 14 ns
QgTotal Gate Charge
VDS = 25 V, ID = 0.22 A,
VGS = 10 V, IG = 0.1 mA
0.549 2.4 nC
Qgs Gate-Source Charge 0.075 nC
Qgd Gate-Drain Charge 0.117 nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current 0.22 A
VSD
Drain-Source Diode
Forward Voltage VGS = 0 V, IS = 115 mA 0.93 1.4 V
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
© 2014 Fairchild Semiconductor Corporation www.fairchildsemi.com
BSS138L Rev. 1.0.1 4
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Gate Vol tage
and Drain Current
Figure 3. On-Resistance Variation with Temperature Figure 4. On-Resistance Variation with
Gate-to-Source Voltage
Figure 5. Transfer Characteristics F igure 6. Body Diode Forward Voltage Variation with
Source Current and Temperature
ID, DRAIN CURRENT (A)
0.0
0.2
0.4
0.6
0.8
1.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VDS, DRAIN-SOURCE VOLT AGE (V)
V
GS
=10V 6.0
4.5
3.5
3.0
2.5
2.0
RDS(ON), NORMALIZED
DRAIN-SOUCE ON-RESISTA NCE
1.0
1.4
1.8
2.2
2.6
3.0
0 0.2 0.4 0.6 0.8 1
ID, DRAIN CURRENT (A)
VGS=2.5V
6.0
4.5
3.5
3.0
10
RDS(ON), NORMALIZED
DRAIN-SOUCE ON-RESISTANCE
0.5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERA TURE (oC)
ID= 0.22A
VGS = 10V
RDS(ON), ON-RESISTANCE (OHM)
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
7
7.5
8
12345678910
VGS, GATE TO SOURCE VOLTAGE (V)
ID= 0.11 A
TJ= 125oC
TJ= 25oC
ID, DRAIN CURRENT (A)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0 1 2 3 4 5 6 7
VGS, GATE TO SOURCE VOLTAGE (V)
25oC
-55oC
TJ= 125oC
VDS = 10 V
IS, REVERSE DRAIN CURRENT (A)
0.001
0.01
0.1
1
0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOL TAGE (V)
TJ= 125oC25oC-55oC
VGS = 0V
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
© 2014 Fairchild Semiconductor Corporation www.fairchildsemi.com
BSS138L Rev. 1.0.1 5
Typical Performance Characteristics (Continued)
Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics
Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation
Figure 11. Transient Thermal Response Curve.
VGS, GATE-SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
0
2
4
6
8
10
0 0.2 0.4 0.6
VDS= 2 5 V
D
S
= 30V
D
S
= 8V
CAPACITANCE (pF)
1
10
0.01 0.1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Ciss
Crss
Coss
f = 1MHz
VGS = 0V
ID, DRAIN CURRENT (A)
0.002
0.02
0.2
0.01 0.1 1 10 100
VDS, DRAIN-SOURCE VOLT AGE (V)
DC
10s
1s
100ms
RDS(ON) LIMIT
SINGLE PULSE
RJA = 380oC/W
TA= 25oC
10ms
1ms
100 s
200
1
μ
θ
0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10 100 1000
SINGLE PULSE
RJA = 380oC/W
TA= 25oC
PEAK TRANSIENT POWER (W)
t1 (s)
θ
Normalized Thermal Impedance ZoJA
0.01
0.1
1
10
0.0001 0.001 0.01 0.1 1 10 100 1000
t, Rectangular Pulse Duration
TRANSIENT THERMAL IMPEDANCE
Single Pulse
0.01
0.02
0.05
0.1
0.2
0.5
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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